ARM: OMAP5: hwmod: add missing ocp2scp hwmod data

Add this hwmod data to allow USB3 to work in OMAP5 boards.

Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
[tony@atomide.com: updated to apply against Paul's changes]
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

1 files changed, 45 insertions, 0 deletions

diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
index 68a78ef1cbf3..9e08d6994a0b 100644
--- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c
@@ -1181,6 +1181,42 @@ static struct omap_hwmod omap54xx_spinlock_hwmod = {
 };
 
 /*
+ * 'ocp2scp' class
+ * bridge to transform ocp interface protocol to scp (serial control port)
+ * protocol
+ */
+
+static struct omap_hwmod_class_sysconfig omap54xx_ocp2scp_sysc = {
+        .rev_offs       = 0x0000,
+        .sysc_offs      = 0x0010,
+        .syss_offs      = 0x0014,
+        .sysc_flags     = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
+                        SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
+        .idlemodes      = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
+        .sysc_fields    = &omap_hwmod_sysc_type1,
+};
+
+static struct omap_hwmod_class omap54xx_ocp2scp_hwmod_class = {
+        .name   = "ocp2scp",
+        .sysc   = &omap54xx_ocp2scp_sysc,
+};
+
+/* ocp2scp1 */
+static struct omap_hwmod omap54xx_ocp2scp1_hwmod = {
+        .name           = "ocp2scp1",
+        .class          = &omap54xx_ocp2scp_hwmod_class,
+        .clkdm_name     = "l3init_clkdm",
+        .main_clk       = "l4_root_clk_div",
+        .prcm = {
+                .omap4 = {
+                        .clkctrl_offs = OMAP54XX_CM_L3INIT_OCP2SCP1_CLKCTRL_OFFSET,
+                        .context_offs = OMAP54XX_RM_L3INIT_OCP2SCP1_CONTEXT_OFFSET,
+                        .modulemode   = MODULEMODE_HWCTRL,
+                },
+        },
+};
+
+/*
  * 'timer' class
  * general purpose timer module with accurate 1ms tick
  * This class contains several variants: ['timer_1ms', 'timer']
@@ -2120,6 +2156,14 @@ static struct omap_hwmod_ocp_if omap54xx_l4_cfg__spinlock = {
         .user           = OCP_USER_MPU | OCP_USER_SDMA,
 };
 
+/* l4_cfg -> ocp2scp1 */
+static struct omap_hwmod_ocp_if omap54xx_l4_cfg__ocp2scp1 = {
+        .master         = &omap54xx_l4_cfg_hwmod,
+        .slave          = &omap54xx_ocp2scp1_hwmod,
+        .clk            = "l4_root_clk_div",
+        .user           = OCP_USER_MPU | OCP_USER_SDMA,
+};
+
 /* l4_wkup -> timer1 */
 static struct omap_hwmod_ocp_if omap54xx_l4_wkup__timer1 = {
         .master         = &omap54xx_l4_wkup_hwmod,
@@ -2340,6 +2384,7 @@ static struct omap_hwmod_ocp_if *omap54xx_hwmod_ocp_ifs[] __initdata = {
         &omap54xx_l4_per__mmc5,
         &omap54xx_l4_cfg__mpu,
         &omap54xx_l4_cfg__spinlock,
+        &omap54xx_l4_cfg__ocp2scp1,
         &omap54xx_l4_wkup__timer1,
         &omap54xx_l4_per__timer2,
         &omap54xx_l4_per__timer3,