diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-02-02 14:19:03 -0500 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-02-02 14:19:03 -0500 |
| commit | 24b36da33c64368775f4ef9386d44dce1d2bc8cf (patch) | |
| tree | 10d694d7ea4a32ce98d6b1dd211a2afffe07b34a | |
| parent | c84e295b304f7359ee89645d099d79d3a4648c0b (diff) | |
| parent | 52b53a0bf8026a322cfa6cfec6a10dd31fef8752 (diff) | |
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm/radeon/kms/blit: fix blit copy for very large buffers
drm/radeon/kms: fix TRAVIS panel setup
drm/radeon: fix use after free in ATRM bios reading code.
drm/radeon/kms: Fix device tree linkage of DP i2c buses too
drm/radeon: Set DESKTOP_HEIGHT register to the framebuffer (not mode) height.
drm/radeon/kms: disable output polling when suspended
drm/nv50/pm: signedness bug in nv50_pm_clocks_pre()
drm/nouveau/gem: fix fence_sync race / oops
drm/nouveau: fix typo on mxmdcb option
drm/nouveau/mxm: pretend to succeed, even if we can't shadow the MXM-SIS
drm/nouveau/disp: check that panel power gpio is enabled at init time
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_bios.h | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_display.c | 10 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_drv.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_gem.c | 23 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_mxm.c | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nv50_pm.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/atombios_crtc.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/atombios_dp.c | 18 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/r600_blit_kms.c | 35 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_atpx_handler.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_device.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_i2c.c | 1 |
12 files changed, 95 insertions, 23 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.h b/drivers/gpu/drm/nouveau/nouveau_bios.h index 1e382ad5a2b8..a37c31e358aa 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bios.h +++ b/drivers/gpu/drm/nouveau/nouveau_bios.h | |||
| @@ -54,9 +54,10 @@ struct bit_entry { | |||
| 54 | int bit_table(struct drm_device *, u8 id, struct bit_entry *); | 54 | int bit_table(struct drm_device *, u8 id, struct bit_entry *); |
| 55 | 55 | ||
| 56 | enum dcb_gpio_tag { | 56 | enum dcb_gpio_tag { |
| 57 | DCB_GPIO_TVDAC0 = 0xc, | 57 | DCB_GPIO_PANEL_POWER = 0x01, |
| 58 | DCB_GPIO_TVDAC0 = 0x0c, | ||
| 58 | DCB_GPIO_TVDAC1 = 0x2d, | 59 | DCB_GPIO_TVDAC1 = 0x2d, |
| 59 | DCB_GPIO_PWM_FAN = 0x9, | 60 | DCB_GPIO_PWM_FAN = 0x09, |
| 60 | DCB_GPIO_FAN_SENSE = 0x3d, | 61 | DCB_GPIO_FAN_SENSE = 0x3d, |
| 61 | DCB_GPIO_UNUSED = 0xff | 62 | DCB_GPIO_UNUSED = 0xff |
| 62 | }; | 63 | }; |
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c index 3cb52bc52b21..795a9e3c990a 100644 --- a/drivers/gpu/drm/nouveau/nouveau_display.c +++ b/drivers/gpu/drm/nouveau/nouveau_display.c | |||
| @@ -219,6 +219,16 @@ nouveau_display_init(struct drm_device *dev) | |||
| 219 | if (ret) | 219 | if (ret) |
| 220 | return ret; | 220 | return ret; |
| 221 | 221 | ||
| 222 | /* power on internal panel if it's not already. the init tables of | ||
| 223 | * some vbios default this to off for some reason, causing the | ||
| 224 | * panel to not work after resume | ||
| 225 | */ | ||
| 226 | if (nouveau_gpio_func_get(dev, DCB_GPIO_PANEL_POWER) == 0) { | ||
| 227 | nouveau_gpio_func_set(dev, DCB_GPIO_PANEL_POWER, true); | ||
| 228 | msleep(300); | ||
| 229 | } | ||
| 230 | |||
| 231 | /* enable polling for external displays */ | ||
| 222 | drm_kms_helper_poll_enable(dev); | 232 | drm_kms_helper_poll_enable(dev); |
| 223 | 233 | ||
| 224 | /* enable hotplug interrupts */ | 234 | /* enable hotplug interrupts */ |
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.c b/drivers/gpu/drm/nouveau/nouveau_drv.c index e4a7cfe7898d..81d7962e7252 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.c +++ b/drivers/gpu/drm/nouveau/nouveau_drv.c | |||
| @@ -124,7 +124,7 @@ MODULE_PARM_DESC(ctxfw, "Use external HUB/GPC ucode (fermi)\n"); | |||
| 124 | int nouveau_ctxfw; | 124 | int nouveau_ctxfw; |
| 125 | module_param_named(ctxfw, nouveau_ctxfw, int, 0400); | 125 | module_param_named(ctxfw, nouveau_ctxfw, int, 0400); |
| 126 | 126 | ||
| 127 | MODULE_PARM_DESC(ctxfw, "Santise DCB table according to MXM-SIS\n"); | 127 | MODULE_PARM_DESC(mxmdcb, "Santise DCB table according to MXM-SIS\n"); |
| 128 | int nouveau_mxmdcb = 1; | 128 | int nouveau_mxmdcb = 1; |
| 129 | module_param_named(mxmdcb, nouveau_mxmdcb, int, 0400); | 129 | module_param_named(mxmdcb, nouveau_mxmdcb, int, 0400); |
| 130 | 130 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c index 5f0bc57fdaab..7ce3fde40743 100644 --- a/drivers/gpu/drm/nouveau/nouveau_gem.c +++ b/drivers/gpu/drm/nouveau/nouveau_gem.c | |||
| @@ -380,6 +380,25 @@ retry: | |||
| 380 | } | 380 | } |
| 381 | 381 | ||
| 382 | static int | 382 | static int |
| 383 | validate_sync(struct nouveau_channel *chan, struct nouveau_bo *nvbo) | ||
| 384 | { | ||
| 385 | struct nouveau_fence *fence = NULL; | ||
| 386 | int ret = 0; | ||
| 387 | |||
| 388 | spin_lock(&nvbo->bo.bdev->fence_lock); | ||
| 389 | if (nvbo->bo.sync_obj) | ||
| 390 | fence = nouveau_fence_ref(nvbo->bo.sync_obj); | ||
| 391 | spin_unlock(&nvbo->bo.bdev->fence_lock); | ||
| 392 | |||
| 393 | if (fence) { | ||
| 394 | ret = nouveau_fence_sync(fence, chan); | ||
| 395 | nouveau_fence_unref(&fence); | ||
| 396 | } | ||
| 397 | |||
| 398 | return ret; | ||
| 399 | } | ||
| 400 | |||
| 401 | static int | ||
| 383 | validate_list(struct nouveau_channel *chan, struct list_head *list, | 402 | validate_list(struct nouveau_channel *chan, struct list_head *list, |
| 384 | struct drm_nouveau_gem_pushbuf_bo *pbbo, uint64_t user_pbbo_ptr) | 403 | struct drm_nouveau_gem_pushbuf_bo *pbbo, uint64_t user_pbbo_ptr) |
| 385 | { | 404 | { |
| @@ -393,7 +412,7 @@ validate_list(struct nouveau_channel *chan, struct list_head *list, | |||
| 393 | list_for_each_entry(nvbo, list, entry) { | 412 | list_for_each_entry(nvbo, list, entry) { |
| 394 | struct drm_nouveau_gem_pushbuf_bo *b = &pbbo[nvbo->pbbo_index]; | 413 | struct drm_nouveau_gem_pushbuf_bo *b = &pbbo[nvbo->pbbo_index]; |
| 395 | 414 | ||
| 396 | ret = nouveau_fence_sync(nvbo->bo.sync_obj, chan); | 415 | ret = validate_sync(chan, nvbo); |
| 397 | if (unlikely(ret)) { | 416 | if (unlikely(ret)) { |
| 398 | NV_ERROR(dev, "fail pre-validate sync\n"); | 417 | NV_ERROR(dev, "fail pre-validate sync\n"); |
| 399 | return ret; | 418 | return ret; |
| @@ -416,7 +435,7 @@ validate_list(struct nouveau_channel *chan, struct list_head *list, | |||
| 416 | return ret; | 435 | return ret; |
| 417 | } | 436 | } |
| 418 | 437 | ||
| 419 | ret = nouveau_fence_sync(nvbo->bo.sync_obj, chan); | 438 | ret = validate_sync(chan, nvbo); |
| 420 | if (unlikely(ret)) { | 439 | if (unlikely(ret)) { |
| 421 | NV_ERROR(dev, "fail post-validate sync\n"); | 440 | NV_ERROR(dev, "fail post-validate sync\n"); |
| 422 | return ret; | 441 | return ret; |
diff --git a/drivers/gpu/drm/nouveau/nouveau_mxm.c b/drivers/gpu/drm/nouveau/nouveau_mxm.c index 8bccddf4eff0..e5a64f0f4cb7 100644 --- a/drivers/gpu/drm/nouveau/nouveau_mxm.c +++ b/drivers/gpu/drm/nouveau/nouveau_mxm.c | |||
| @@ -656,7 +656,16 @@ nouveau_mxm_init(struct drm_device *dev) | |||
| 656 | 656 | ||
| 657 | if (mxm_shadow(dev, mxm[0])) { | 657 | if (mxm_shadow(dev, mxm[0])) { |
| 658 | MXM_MSG(dev, "failed to locate valid SIS\n"); | 658 | MXM_MSG(dev, "failed to locate valid SIS\n"); |
| 659 | #if 0 | ||
| 660 | /* we should, perhaps, fall back to some kind of limited | ||
| 661 | * mode here if the x86 vbios hasn't already done the | ||
| 662 | * work for us (so we prevent loading with completely | ||
| 663 | * whacked vbios tables). | ||
| 664 | */ | ||
| 659 | return -EINVAL; | 665 | return -EINVAL; |
| 666 | #else | ||
| 667 | return 0; | ||
| 668 | #endif | ||
| 660 | } | 669 | } |
| 661 | 670 | ||
| 662 | MXM_MSG(dev, "MXMS Version %d.%d\n", | 671 | MXM_MSG(dev, "MXMS Version %d.%d\n", |
diff --git a/drivers/gpu/drm/nouveau/nv50_pm.c b/drivers/gpu/drm/nouveau/nv50_pm.c index 03937212e9d8..ec5481dfcd82 100644 --- a/drivers/gpu/drm/nouveau/nv50_pm.c +++ b/drivers/gpu/drm/nouveau/nv50_pm.c | |||
| @@ -495,9 +495,9 @@ nv50_pm_clocks_pre(struct drm_device *dev, struct nouveau_pm_level *perflvl) | |||
| 495 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 495 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
| 496 | struct nv50_pm_state *info; | 496 | struct nv50_pm_state *info; |
| 497 | struct pll_lims pll; | 497 | struct pll_lims pll; |
| 498 | int ret = -EINVAL; | 498 | int clk, ret = -EINVAL; |
| 499 | int N, M, P1, P2; | 499 | int N, M, P1, P2; |
| 500 | u32 clk, out; | 500 | u32 out; |
| 501 | 501 | ||
| 502 | if (dev_priv->chipset == 0xaa || | 502 | if (dev_priv->chipset == 0xaa || |
| 503 | dev_priv->chipset == 0xac) | 503 | dev_priv->chipset == 0xac) |
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 891935271d34..742f17f009a9 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
| @@ -1184,7 +1184,7 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc, | |||
| 1184 | WREG32(EVERGREEN_GRPH_ENABLE + radeon_crtc->crtc_offset, 1); | 1184 | WREG32(EVERGREEN_GRPH_ENABLE + radeon_crtc->crtc_offset, 1); |
| 1185 | 1185 | ||
| 1186 | WREG32(EVERGREEN_DESKTOP_HEIGHT + radeon_crtc->crtc_offset, | 1186 | WREG32(EVERGREEN_DESKTOP_HEIGHT + radeon_crtc->crtc_offset, |
| 1187 | crtc->mode.vdisplay); | 1187 | target_fb->height); |
| 1188 | x &= ~3; | 1188 | x &= ~3; |
| 1189 | y &= ~1; | 1189 | y &= ~1; |
| 1190 | WREG32(EVERGREEN_VIEWPORT_START + radeon_crtc->crtc_offset, | 1190 | WREG32(EVERGREEN_VIEWPORT_START + radeon_crtc->crtc_offset, |
| @@ -1353,7 +1353,7 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc, | |||
| 1353 | WREG32(AVIVO_D1GRPH_ENABLE + radeon_crtc->crtc_offset, 1); | 1353 | WREG32(AVIVO_D1GRPH_ENABLE + radeon_crtc->crtc_offset, 1); |
| 1354 | 1354 | ||
| 1355 | WREG32(AVIVO_D1MODE_DESKTOP_HEIGHT + radeon_crtc->crtc_offset, | ||
