diff options
author | Lee Jones <lee.jones@linaro.org> | 2014-03-20 05:20:52 -0400 |
---|---|---|
committer | Brian Norris <computersforpeace@gmail.com> | 2014-03-20 07:17:18 -0400 |
commit | 249516c9c3c8665527db89ac871f55a07ecc89b2 (patch) | |
tree | e088714a3625db1a660b4dd8ad056b2264b266bb | |
parent | 0de08e43cdda9a2acbd3310491a7882ec43b24b3 (diff) |
mtd: st_spi_fsm: Update the flash Volatile Configuration Register
The FSM Serial Flash Controller is driven by issuing a standard set of
register writes we call a message sequence. This patch supplies a method
to prepare the message sequence responsible for updating a chip's VCR.
Acked-by Angus Clark <angus.clark@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
-rw-r--r-- | drivers/mtd/devices/st_spi_fsm.c | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/drivers/mtd/devices/st_spi_fsm.c b/drivers/mtd/devices/st_spi_fsm.c index 0a5b70290b1b..5683443e7261 100644 --- a/drivers/mtd/devices/st_spi_fsm.c +++ b/drivers/mtd/devices/st_spi_fsm.c | |||
@@ -415,6 +415,23 @@ static struct stfsm_seq stfsm_seq_erase_sector = { | |||
415 | SEQ_CFG_STARTSEQ), | 415 | SEQ_CFG_STARTSEQ), |
416 | }; | 416 | }; |
417 | 417 | ||
418 | static struct stfsm_seq stfsm_seq_wrvcr = { | ||
419 | .seq_opc[0] = (SEQ_OPC_PADS_1 | SEQ_OPC_CYCLES(8) | | ||
420 | SEQ_OPC_OPCODE(FLASH_CMD_WREN) | SEQ_OPC_CSDEASSERT), | ||
421 | .seq_opc[1] = (SEQ_OPC_PADS_1 | SEQ_OPC_CYCLES(8) | | ||
422 | SEQ_OPC_OPCODE(FLASH_CMD_WRVCR)), | ||
423 | .seq = { | ||
424 | STFSM_INST_CMD1, | ||
425 | STFSM_INST_CMD2, | ||
426 | STFSM_INST_STA_WR1, | ||
427 | STFSM_INST_STOP, | ||
428 | }, | ||
429 | .seq_cfg = (SEQ_CFG_PADS_1 | | ||
430 | SEQ_CFG_READNOTWRITE | | ||
431 | SEQ_CFG_CSDEASSERT | | ||
432 | SEQ_CFG_STARTSEQ), | ||
433 | }; | ||
434 | |||
418 | static int stfsm_n25q_en_32bit_addr_seq(struct stfsm_seq *seq) | 435 | static int stfsm_n25q_en_32bit_addr_seq(struct stfsm_seq *seq) |
419 | { | 436 | { |
420 | seq->seq_opc[0] = (SEQ_OPC_PADS_1 | SEQ_OPC_CYCLES(8) | | 437 | seq->seq_opc[0] = (SEQ_OPC_PADS_1 | SEQ_OPC_CYCLES(8) | |
@@ -542,6 +559,21 @@ static int stfsm_enter_32bit_addr(struct stfsm *fsm, int enter) | |||
542 | return 0; | 559 | return 0; |
543 | } | 560 | } |
544 | 561 | ||
562 | static int stfsm_wrvcr(struct stfsm *fsm, uint8_t data) | ||
563 | { | ||
564 | struct stfsm_seq *seq = &stfsm_seq_wrvcr; | ||
565 | |||
566 | dev_dbg(fsm->dev, "writing VCR 0x%02x\n", data); | ||
567 | |||
568 | seq->status = (STA_DATA_BYTE1(data) | STA_PADS_1 | STA_CSDEASSERT); | ||
569 | |||
570 | stfsm_load_seq(fsm, seq); | ||
571 | |||
572 | stfsm_wait_seq(fsm); | ||
573 | |||
574 | return 0; | ||
575 | } | ||
576 | |||
545 | /* | 577 | /* |
546 | * SoC reset on 'boot-from-spi' systems | 578 | * SoC reset on 'boot-from-spi' systems |
547 | * | 579 | * |