diff options
author | Santosh Rastapur <santosh@chelsio.com> | 2013-03-14 01:08:48 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2013-03-14 11:35:53 -0400 |
commit | 2422d9a32747b85801ca705f4d6376e16d230c67 (patch) | |
tree | 5ae3362be94c775a06edf513337fe011a89afc3f | |
parent | b2decadd837fd7f5e789bd7e1de11be79ed22a06 (diff) |
cxgb4: Add macros, structures and inline functions for T5
Signed-off-by: Santosh Rastapur <santosh@chelsio.com>
Signed-off-by: Vipul Pandya <vipul@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 50 | ||||
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/t4_msg.h | 45 | ||||
-rw-r--r-- | drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h | 2 |
3 files changed, 95 insertions, 2 deletions
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h index 6db997c78a5f..a91dea621fcf 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h +++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | |||
@@ -54,6 +54,10 @@ | |||
54 | #define FW_VERSION_MINOR 1 | 54 | #define FW_VERSION_MINOR 1 |
55 | #define FW_VERSION_MICRO 0 | 55 | #define FW_VERSION_MICRO 0 |
56 | 56 | ||
57 | #define FW_VERSION_MAJOR_T5 0 | ||
58 | #define FW_VERSION_MINOR_T5 0 | ||
59 | #define FW_VERSION_MICRO_T5 0 | ||
60 | |||
57 | #define CH_WARN(adap, fmt, ...) dev_warn(adap->pdev_dev, fmt, ## __VA_ARGS__) | 61 | #define CH_WARN(adap, fmt, ...) dev_warn(adap->pdev_dev, fmt, ## __VA_ARGS__) |
58 | 62 | ||
59 | enum { | 63 | enum { |
@@ -66,7 +70,9 @@ enum { | |||
66 | enum { | 70 | enum { |
67 | MEM_EDC0, | 71 | MEM_EDC0, |
68 | MEM_EDC1, | 72 | MEM_EDC1, |
69 | MEM_MC | 73 | MEM_MC, |
74 | MEM_MC0 = MEM_MC, | ||
75 | MEM_MC1 | ||
70 | }; | 76 | }; |
71 | 77 | ||
72 | enum { | 78 | enum { |
@@ -74,8 +80,10 @@ enum { | |||
74 | MEMWIN0_BASE = 0x1b800, | 80 | MEMWIN0_BASE = 0x1b800, |
75 | MEMWIN1_APERTURE = 32768, | 81 | MEMWIN1_APERTURE = 32768, |
76 | MEMWIN1_BASE = 0x28000, | 82 | MEMWIN1_BASE = 0x28000, |
83 | MEMWIN1_BASE_T5 = 0x52000, | ||
77 | MEMWIN2_APERTURE = 65536, | 84 | MEMWIN2_APERTURE = 65536, |
78 | MEMWIN2_BASE = 0x30000, | 85 | MEMWIN2_BASE = 0x30000, |
86 | MEMWIN2_BASE_T5 = 0x54000, | ||
79 | }; | 87 | }; |
80 | 88 | ||
81 | enum dev_master { | 89 | enum dev_master { |
@@ -504,6 +512,35 @@ struct sge { | |||
504 | 512 | ||
505 | struct l2t_data; | 513 | struct l2t_data; |
506 | 514 | ||
515 | #define CHELSIO_CHIP_CODE(version, revision) (((version) << 4) | (revision)) | ||
516 | #define CHELSIO_CHIP_VERSION(code) ((code) >> 4) | ||
517 | #define CHELSIO_CHIP_RELEASE(code) ((code) & 0xf) | ||
518 | |||
519 | #define CHELSIO_T4 0x4 | ||
520 | #define CHELSIO_T5 0x5 | ||
521 | |||
522 | enum chip_type { | ||
523 | T4_A1 = CHELSIO_CHIP_CODE(CHELSIO_T4, 0), | ||
524 | T4_A2 = CHELSIO_CHIP_CODE(CHELSIO_T4, 1), | ||
525 | T4_A3 = CHELSIO_CHIP_CODE(CHELSIO_T4, 2), | ||
526 | T4_FIRST_REV = T4_A1, | ||
527 | T4_LAST_REV = T4_A3, | ||
528 | |||
529 | T5_A1 = CHELSIO_CHIP_CODE(CHELSIO_T5, 0), | ||
530 | T5_FIRST_REV = T5_A1, | ||
531 | T5_LAST_REV = T5_A1, | ||
532 | }; | ||
533 | |||
534 | #ifdef CONFIG_PCI_IOV | ||
535 | |||
536 | /* T4 - 4 PFs support SRIOV | ||
537 | * T5 - 8 PFs support SRIOV | ||
538 | */ | ||
539 | #define NUM_OF_PF_WITH_SRIOV_T4 4 | ||
540 | #define NUM_OF_PF_WITH_SRIOV_T5 8 | ||
541 | |||
542 | #endif | ||
543 | |||
507 | struct adapter { | 544 | struct adapter { |
508 | void __iomem *regs; | 545 | void __iomem *regs; |
509 | struct pci_dev *pdev; | 546 | struct pci_dev *pdev; |
@@ -511,6 +548,7 @@ struct adapter { | |||
511 | unsigned int mbox; | 548 | unsigned int mbox; |
512 | unsigned int fn; | 549 | unsigned int fn; |
513 | unsigned int flags; | 550 | unsigned int flags; |
551 | enum chip_type chip; | ||
514 | 552 | ||
515 | int msg_enable; | 553 | int msg_enable; |
516 | 554 | ||
@@ -673,6 +711,16 @@ enum { | |||
673 | VLAN_REWRITE | 711 | VLAN_REWRITE |
674 | }; | 712 | }; |
675 | 713 | ||
714 | static inline int is_t5(enum chip_type chip) | ||
715 | { | ||
716 | return (chip >= T5_FIRST_REV && chip <= T5_LAST_REV); | ||
717 | } | ||
718 | |||
719 | static inline int is_t4(enum chip_type chip) | ||
720 | { | ||
721 | return (chip >= T4_FIRST_REV && chip <= T4_LAST_REV); | ||
722 | } | ||
723 | |||
676 | static inline u32 t4_read_reg(struct adapter *adap, u32 reg_addr) | 724 | static inline u32 t4_read_reg(struct adapter *adap, u32 reg_addr) |
677 | { | 725 | { |
678 | return readl(adap->regs + reg_addr); | 726 | return readl(adap->regs + reg_addr); |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h b/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h index 261d17703adc..0c9f14f87a4f 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_msg.h | |||
@@ -74,6 +74,7 @@ enum { | |||
74 | CPL_PASS_ESTABLISH = 0x41, | 74 | CPL_PASS_ESTABLISH = 0x41, |
75 | CPL_RX_DATA_DDP = 0x42, | 75 | CPL_RX_DATA_DDP = 0x42, |
76 | CPL_PASS_ACCEPT_REQ = 0x44, | 76 | CPL_PASS_ACCEPT_REQ = 0x44, |
77 | CPL_TRACE_PKT_T5 = 0x48, | ||
77 | 78 | ||
78 | CPL_RDMA_READ_REQ = 0x60, | 79 | CPL_RDMA_READ_REQ = 0x60, |
79 | 80 | ||
@@ -287,6 +288,23 @@ struct cpl_act_open_req { | |||
287 | __be32 opt2; | 288 | __be32 opt2; |
288 | }; | 289 | }; |
289 | 290 | ||
291 | #define S_FILTER_TUPLE 24 | ||
292 | #define M_FILTER_TUPLE 0xFFFFFFFFFF | ||
293 | #define V_FILTER_TUPLE(x) ((x) << S_FILTER_TUPLE) | ||
294 | #define G_FILTER_TUPLE(x) (((x) >> S_FILTER_TUPLE) & M_FILTER_TUPLE) | ||
295 | struct cpl_t5_act_open_req { | ||
296 | WR_HDR; | ||
297 | union opcode_tid ot; | ||
298 | __be16 local_port; | ||
299 | __be16 peer_port; | ||
300 | __be32 local_ip; | ||
301 | __be32 peer_ip; | ||
302 | __be64 opt0; | ||
303 | __be32 rsvd; | ||
304 | __be32 opt2; | ||
305 | __be64 params; | ||
306 | }; | ||
307 | |||
290 | struct cpl_act_open_req6 { | 308 | struct cpl_act_open_req6 { |
291 | WR_HDR; | 309 | WR_HDR; |
292 | union opcode_tid ot; | 310 | union opcode_tid ot; |
@@ -566,6 +584,11 @@ struct cpl_rx_pkt { | |||
566 | #define V_RX_ETHHDR_LEN(x) ((x) << S_RX_ETHHDR_LEN) | 584 | #define V_RX_ETHHDR_LEN(x) ((x) << S_RX_ETHHDR_LEN) |
567 | #define G_RX_ETHHDR_LEN(x) (((x) >> S_RX_ETHHDR_LEN) & M_RX_ETHHDR_LEN) | 585 | #define G_RX_ETHHDR_LEN(x) (((x) >> S_RX_ETHHDR_LEN) & M_RX_ETHHDR_LEN) |
568 | 586 | ||
587 | #define S_RX_T5_ETHHDR_LEN 0 | ||
588 | #define M_RX_T5_ETHHDR_LEN 0x3F | ||
589 | #define V_RX_T5_ETHHDR_LEN(x) ((x) << S_RX_T5_ETHHDR_LEN) | ||
590 | #define G_RX_T5_ETHHDR_LEN(x) (((x) >> S_RX_T5_ETHHDR_LEN) & M_RX_T5_ETHHDR_LEN) | ||
591 | |||
569 | #define S_RX_MACIDX 8 | 592 | #define S_RX_MACIDX 8 |
570 | #define M_RX_MACIDX 0x1FF | 593 | #define M_RX_MACIDX 0x1FF |
571 | #define V_RX_MACIDX(x) ((x) << S_RX_MACIDX) | 594 | #define V_RX_MACIDX(x) ((x) << S_RX_MACIDX) |
@@ -612,6 +635,28 @@ struct cpl_trace_pkt { | |||
612 | __be64 tstamp; | 635 | __be64 tstamp; |
613 | }; | 636 | }; |
614 | 637 | ||
638 | struct cpl_t5_trace_pkt { | ||
639 | __u8 opcode; | ||
640 | __u8 intf; | ||
641 | #if defined(__LITTLE_ENDIAN_BITFIELD) | ||
642 | __u8 runt:4; | ||
643 | __u8 filter_hit:4; | ||
644 | __u8:6; | ||
645 | __u8 err:1; | ||
646 | __u8 trunc:1; | ||
647 | #else | ||
648 | __u8 filter_hit:4; | ||
649 | __u8 runt:4; | ||
650 | __u8 trunc:1; | ||
651 | __u8 err:1; | ||
652 | __u8:6; | ||
653 | #endif | ||
654 | __be16 rsvd; | ||
655 | __be16 len; | ||
656 | __be64 tstamp; | ||
657 | __be64 rsvd1; | ||
658 | }; | ||
659 | |||
615 | struct cpl_l2t_write_req { | 660 | struct cpl_l2t_write_req { |
616 | WR_HDR; | 661 | WR_HDR; |
617 | union opcode_tid ot; | 662 | union opcode_tid ot; |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h index a0dcccd846c9..93444325b1e8 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h +++ b/drivers/net/ethernet/chelsio/cxgb4/t4fw_api.h | |||
@@ -574,7 +574,7 @@ struct fw_eth_tx_pkt_vm_wr { | |||
574 | __be16 vlantci; | 574 | __be16 vlantci; |
575 | }; | 575 | }; |
576 | 576 | ||
577 | #define FW_CMD_MAX_TIMEOUT 3000 | 577 | #define FW_CMD_MAX_TIMEOUT 10000 |
578 | 578 | ||
579 | /* | 579 | /* |
580 | * If a host driver does a HELLO and discovers that there's already a MASTER | 580 | * If a host driver does a HELLO and discovers that there's already a MASTER |