diff options
author | Michel Dänzer <daenzer@vmware.com> | 2010-04-02 12:59:06 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@suse.de> | 2010-04-26 10:47:52 -0400 |
commit | 23e8082246a1c0da3b1772e272059040c401ab78 (patch) | |
tree | fb10271d20c0f07a9126cd04db47d7123dc04da0 | |
parent | 6a5cc5148653284857728844ab0169643ffe7cf4 (diff) |
drm/radeon: R300 AD only has one quad pipe.
commit 57b54ea6b7863ccfeb41851b5f58f9fd1b83c79e upstream.
Gleaned from the Mesa code.
Fixes https://bugs.freedesktop.org/show_bug.cgi?id=27355 .
Signed-off-by: Michel Dänzer <daenzer@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
-rw-r--r-- | drivers/gpu/drm/radeon/r300.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_cp.c | 10 |
2 files changed, 9 insertions, 6 deletions
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index 43b55a030b4d..5bdfaf2780d8 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c | |||
@@ -364,11 +364,12 @@ void r300_gpu_init(struct radeon_device *rdev) | |||
364 | 364 | ||
365 | r100_hdp_reset(rdev); | 365 | r100_hdp_reset(rdev); |
366 | /* FIXME: rv380 one pipes ? */ | 366 | /* FIXME: rv380 one pipes ? */ |
367 | if ((rdev->family == CHIP_R300) || (rdev->family == CHIP_R350)) { | 367 | if ((rdev->family == CHIP_R300 && rdev->pdev->device != 0x4144) || |
368 | (rdev->family == CHIP_R350)) { | ||
368 | /* r300,r350 */ | 369 | /* r300,r350 */ |
369 | rdev->num_gb_pipes = 2; | 370 | rdev->num_gb_pipes = 2; |
370 | } else { | 371 | } else { |
371 | /* rv350,rv370,rv380 */ | 372 | /* rv350,rv370,rv380,r300 AD */ |
372 | rdev->num_gb_pipes = 1; | 373 | rdev->num_gb_pipes = 1; |
373 | } | 374 | } |
374 | rdev->num_z_pipes = 1; | 375 | rdev->num_z_pipes = 1; |
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c index 06123ba31d31..f129bbb8bbc8 100644 --- a/drivers/gpu/drm/radeon/radeon_cp.c +++ b/drivers/gpu/drm/radeon/radeon_cp.c | |||
@@ -417,8 +417,9 @@ static int radeon_do_wait_for_idle(drm_radeon_private_t * dev_priv) | |||
417 | return -EBUSY; | 417 | return -EBUSY; |
418 | } | 418 | } |
419 | 419 | ||
420 | static void radeon_init_pipes(drm_radeon_private_t *dev_priv) | 420 | static void radeon_init_pipes(struct drm_device *dev) |
421 | { | 421 | { |
422 | drm_radeon_private_t *dev_priv = dev->dev_private; | ||
422 | uint32_t gb_tile_config, gb_pipe_sel = 0; | 423 | uint32_t gb_tile_config, gb_pipe_sel = 0; |
423 | 424 | ||
424 | if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) { | 425 | if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) { |
@@ -436,11 +437,12 @@ static void radeon_init_pipes(drm_radeon_private_t *dev_priv) | |||
436 | dev_priv->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1; | 437 | dev_priv->num_gb_pipes = ((gb_pipe_sel >> 12) & 0x3) + 1; |
437 | } else { | 438 | } else { |
438 | /* R3xx */ | 439 | /* R3xx */ |
439 | if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300) || | 440 | if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R300 && |
441 | dev->pdev->device != 0x4144) || | ||
440 | ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350)) { | 442 | ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_R350)) { |
441 | dev_priv->num_gb_pipes = 2; | 443 | dev_priv->num_gb_pipes = 2; |
442 | } else { | 444 | } else { |
443 | /* R3Vxx */ | 445 | /* RV3xx/R300 AD */ |
444 | dev_priv->num_gb_pipes = 1; | 446 | dev_priv->num_gb_pipes = 1; |
445 | } | 447 | } |
446 | } | 448 | } |
@@ -736,7 +738,7 @@ static int radeon_do_engine_reset(struct drm_device * dev) | |||
736 | 738 | ||
737 | /* setup the raster pipes */ | 739 | /* setup the raster pipes */ |
738 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R300) | 740 | if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R300) |
739 | radeon_init_pipes(dev_priv); | 741 | radeon_init_pipes(dev); |
740 | 742 | ||
741 | /* Reset the CP ring */ | 743 | /* Reset the CP ring */ |
742 | radeon_do_cp_reset(dev_priv); | 744 | radeon_do_cp_reset(dev_priv); |