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authorPeter Chen <peter.chen@freescale.com>2014-02-23 21:20:59 -0500
committerFelipe Balbi <balbi@ti.com>2014-03-05 15:40:08 -0500
commit22db05ecf2bad318c87f5a721e93694b2bb68a75 (patch)
tree32749939e3b62985a6ff5aeace5380dcde67811c
parentf6a158243e569785a995e2218d9521716cdc9d79 (diff)
usb: phy: mxs: Enable IC fixes for related SoCs
Two PHY bugs are fixed by IC logic, but these bits are not enabled by default, so we enable them at driver. The two bugs are: MXS_PHY_ABNORMAL_IN_SUSPEND and MXS_PHY_SENDING_SOF_TOO_FAST which are described at code. Signed-off-by: Peter Chen <peter.chen@freescale.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
-rw-r--r--drivers/usb/phy/phy-mxs-usb.c23
1 files changed, 21 insertions, 2 deletions
diff --git a/drivers/usb/phy/phy-mxs-usb.c b/drivers/usb/phy/phy-mxs-usb.c
index 1663a6683ec1..cb7113543153 100644
--- a/drivers/usb/phy/phy-mxs-usb.c
+++ b/drivers/usb/phy/phy-mxs-usb.c
@@ -31,6 +31,10 @@
31#define HW_USBPHY_CTRL_SET 0x34 31#define HW_USBPHY_CTRL_SET 0x34
32#define HW_USBPHY_CTRL_CLR 0x38 32#define HW_USBPHY_CTRL_CLR 0x38
33 33
34#define HW_USBPHY_IP 0x90
35#define HW_USBPHY_IP_SET 0x94
36#define HW_USBPHY_IP_CLR 0x98
37
34#define BM_USBPHY_CTRL_SFTRST BIT(31) 38#define BM_USBPHY_CTRL_SFTRST BIT(31)
35#define BM_USBPHY_CTRL_CLKGATE BIT(30) 39#define BM_USBPHY_CTRL_CLKGATE BIT(30)
36#define BM_USBPHY_CTRL_ENAUTOSET_USBCLKS BIT(26) 40#define BM_USBPHY_CTRL_ENAUTOSET_USBCLKS BIT(26)
@@ -42,6 +46,8 @@
42#define BM_USBPHY_CTRL_ENUTMILEVEL2 BIT(14) 46#define BM_USBPHY_CTRL_ENUTMILEVEL2 BIT(14)
43#define BM_USBPHY_CTRL_ENHOSTDISCONDETECT BIT(1) 47#define BM_USBPHY_CTRL_ENHOSTDISCONDETECT BIT(1)
44 48
49#define BM_USBPHY_IP_FIX (BIT(17) | BIT(18))
50
45#define to_mxs_phy(p) container_of((p), struct mxs_phy, phy) 51#define to_mxs_phy(p) container_of((p), struct mxs_phy, phy)
46 52
47/* Do disconnection between PHY and controller without vbus */ 53/* Do disconnection between PHY and controller without vbus */
@@ -60,6 +66,14 @@
60 */ 66 */
61#define MXS_PHY_SENDING_SOF_TOO_FAST BIT(2) 67#define MXS_PHY_SENDING_SOF_TOO_FAST BIT(2)
62 68
69/*
70 * IC has bug fixes logic, they include
71 * MXS_PHY_ABNORMAL_IN_SUSPEND and MXS_PHY_SENDING_SOF_TOO_FAST
72 * which are described at above flags, the RTL will handle it
73 * according to different versions.
74 */
75#define MXS_PHY_NEED_IP_FIX BIT(3)
76
63struct mxs_phy_data { 77struct mxs_phy_data {
64 unsigned int flags; 78 unsigned int flags;
65}; 79};
@@ -70,11 +84,13 @@ static const struct mxs_phy_data imx23_phy_data = {
70 84
71static const struct mxs_phy_data imx6q_phy_data = { 85static const struct mxs_phy_data imx6q_phy_data = {
72 .flags = MXS_PHY_SENDING_SOF_TOO_FAST | 86 .flags = MXS_PHY_SENDING_SOF_TOO_FAST |
73 MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS, 87 MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS |
88 MXS_PHY_NEED_IP_FIX,
74}; 89};
75 90
76static const struct mxs_phy_data imx6sl_phy_data = { 91static const struct mxs_phy_data imx6sl_phy_data = {
77 .flags = MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS, 92 .flags = MXS_PHY_DISCONNECT_LINE_WITHOUT_VBUS |
93 MXS_PHY_NEED_IP_FIX,
78}; 94};
79 95
80static const struct of_device_id mxs_phy_dt_ids[] = { 96static const struct of_device_id mxs_phy_dt_ids[] = {
@@ -118,6 +134,9 @@ static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
118 BM_USBPHY_CTRL_ENUTMILEVEL3, 134 BM_USBPHY_CTRL_ENUTMILEVEL3,
119 base + HW_USBPHY_CTRL_SET); 135 base + HW_USBPHY_CTRL_SET);
120 136
137 if (mxs_phy->data->flags & MXS_PHY_NEED_IP_FIX)
138 writel(BM_USBPHY_IP_FIX, base + HW_USBPHY_IP_SET);
139
121 return 0; 140 return 0;
122} 141}
123 142