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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-08-03 18:16:33 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-08-03 18:16:33 -0400
commit22da317629bad23816f3fa26d657fb46e7af21c7 (patch)
treeea9e97afd3aca46c16b77468ef91e5e39d36ed7f
parent3e847423bf029c2170692c75580a856debed617b (diff)
parent67439b76f29cb278bb3412fc873b980fc65110c9 (diff)
Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: [POWERPC] Fixes for the SLB shadow buffer code [POWERPC] Fix a compile warning in powermac/feature.c [POWERPC] Fix a compile warning in pci_32.c [POWERPC] Fix parse_drconf_memory() for 64-bit start addresses [POWERPC] Fix num_cpus calculation in smp_call_function_map() [POWERPC] ps3: Fix section mismatch in ps3/setup.c [POWERPC] spufs: Fix affinity after introduction of node_allowed() calls [POWERPC] Fix special PTE code for secondary hash bucket [POWERPC] Expand RPN field to 34 bits when using 64k pages
-rw-r--r--arch/powerpc/kernel/entry_64.S3
-rw-r--r--arch/powerpc/kernel/pci_32.c5
-rw-r--r--arch/powerpc/kernel/smp.c9
-rw-r--r--arch/powerpc/mm/hash_low_64.S6
-rw-r--r--arch/powerpc/mm/hash_utils_64.c2
-rw-r--r--arch/powerpc/mm/numa.c4
-rw-r--r--arch/powerpc/mm/slb.c28
-rw-r--r--arch/powerpc/platforms/cell/spufs/sched.c3
-rw-r--r--arch/powerpc/platforms/powermac/feature.c6
-rw-r--r--arch/powerpc/platforms/ps3/setup.c2
-rw-r--r--include/asm-powerpc/mmu-hash64.h1
-rw-r--r--include/asm-powerpc/pgtable-64k.h8
12 files changed, 46 insertions, 31 deletions
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 9ef28da2c7fe..952eba6701f4 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -389,8 +389,11 @@ BEGIN_FTR_SECTION
389 ld r9,PACA_SLBSHADOWPTR(r13) 389 ld r9,PACA_SLBSHADOWPTR(r13)
390 li r12,0 390 li r12,0
391 std r12,SLBSHADOW_STACKESID(r9) /* Clear ESID */ 391 std r12,SLBSHADOW_STACKESID(r9) /* Clear ESID */
392 eieio
392 std r7,SLBSHADOW_STACKVSID(r9) /* Save VSID */ 393 std r7,SLBSHADOW_STACKVSID(r9) /* Save VSID */
394 eieio
393 std r0,SLBSHADOW_STACKESID(r9) /* Save ESID */ 395 std r0,SLBSHADOW_STACKESID(r9) /* Save ESID */
396 eieio
394 397
395 slbie r6 398 slbie r6
396 slbie r6 /* Workaround POWER5 < DD2.1 issue */ 399 slbie r6 /* Workaround POWER5 < DD2.1 issue */
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index cd35c969bb28..04a3109ae3c6 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -581,8 +581,11 @@ pcibios_assign_resources(void)
581 if ((r->flags & IORESOURCE_UNSET) && r->end && 581 if ((r->flags & IORESOURCE_UNSET) && r->end &&
582 (!ppc_md.pcibios_enable_device_hook || 582 (!ppc_md.pcibios_enable_device_hook ||
583 !ppc_md.pcibios_enable_device_hook(dev, 1))) { 583 !ppc_md.pcibios_enable_device_hook(dev, 1))) {
584 int rc;
585
584 r->flags &= ~IORESOURCE_UNSET; 586 r->flags &= ~IORESOURCE_UNSET;
585 pci_assign_resource(dev, idx); 587 rc = pci_assign_resource(dev, idx);
588 BUG_ON(rc);
586 } 589 }
587 } 590 }
588 591
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 087c92f2a3eb..1ea43160f543 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -212,11 +212,6 @@ int smp_call_function_map(void (*func) (void *info), void *info, int nonatomic,
212 atomic_set(&data.finished, 0); 212 atomic_set(&data.finished, 0);
213 213
214 spin_lock(&call_lock); 214 spin_lock(&call_lock);
215 /* Must grab online cpu count with preempt disabled, otherwise
216 * it can change. */
217 num_cpus = num_online_cpus() - 1;
218 if (!num_cpus)
219 goto done;
220 215
221 /* remove 'self' from the map */ 216 /* remove 'self' from the map */
222 if (cpu_isset(smp_processor_id(), map)) 217 if (cpu_isset(smp_processor_id(), map))
@@ -224,7 +219,9 @@ int smp_call_function_map(void (*func) (void *info), void *info, int nonatomic,
224 219
225 /* sanity check the map, remove any non-online processors. */ 220 /* sanity check the map, remove any non-online processors. */
226 cpus_and(map, map, cpu_online_map); 221 cpus_and(map, map, cpu_online_map);
227 if (cpus_empty(map)) 222
223 num_cpus = cpus_weight(map);
224 if (!num_cpus)
228 goto done; 225 goto done;
229 226
230 call_data = &data; 227 call_data = &data;
diff --git a/arch/powerpc/mm/hash_low_64.S b/arch/powerpc/mm/hash_low_64.S
index 4762ff7c14df..35eabfb50723 100644
--- a/arch/powerpc/mm/hash_low_64.S
+++ b/arch/powerpc/mm/hash_low_64.S
@@ -472,10 +472,12 @@ _GLOBAL(htab_call_hpte_insert1)
472 /* Now try secondary slot */ 472 /* Now try secondary slot */
473 473
474 /* real page number in r5, PTE RPN value + index */ 474 /* real page number in r5, PTE RPN value + index */
475 rldicl r5,r31,64-PTE_RPN_SHIFT,PTE_RPN_SHIFT 475 andis. r0,r31,_PAGE_4K_PFN@h
476 srdi r5,r31,PTE_RPN_SHIFT
477 bne- 3f
476 sldi r5,r5,PAGE_SHIFT-HW_PAGE_SHIFT 478 sldi r5,r5,PAGE_SHIFT-HW_PAGE_SHIFT
477 add r5,r5,r25 479 add r5,r5,r25
478 sldi r5,r5,HW_PAGE_SHIFT 4803: sldi r5,r5,HW_PAGE_SHIFT
479 481
480 /* Calculate secondary group hash */ 482 /* Calculate secondary group hash */
481 andc r0,r27,r28 483 andc r0,r27,r28
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index bc7b0cedae5e..f1789578747a 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -759,7 +759,7 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
759 mmu_psize_defs[mmu_vmalloc_psize].sllp) { 759 mmu_psize_defs[mmu_vmalloc_psize].sllp) {
760 get_paca()->vmalloc_sllp = 760 get_paca()->vmalloc_sllp =
761 mmu_psize_defs[mmu_vmalloc_psize].sllp; 761 mmu_psize_defs[mmu_vmalloc_psize].sllp;
762 slb_flush_and_rebolt(); 762 slb_vmalloc_update();
763 } 763 }
764#endif /* CONFIG_PPC_64K_PAGES */ 764#endif /* CONFIG_PPC_64K_PAGES */
765 765
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index de45aa82d97b..c12adc3ddffd 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -307,9 +307,9 @@ static void __init parse_drconf_memory(struct device_node *memory)
307 const unsigned int *lm, *dm, *aa; 307 const unsigned int *lm, *dm, *aa;
308 unsigned int ls, ld, la; 308 unsigned int ls, ld, la;
309 unsigned int n, aam, aalen; 309 unsigned int n, aam, aalen;
310 unsigned long lmb_size, size; 310 unsigned long lmb_size, size, start;
311 int nid, default_nid = 0; 311 int nid, default_nid = 0;
312 unsigned int start, ai, flags; 312 unsigned int ai, flags;
313 313
314 lm = of_get_property(memory, "ibm,lmb-size", &ls); 314 lm = of_get_property(memory, "ibm,lmb-size", &ls);
315 dm = of_get_property(memory, "ibm,dynamic-memory", &ld); 315 dm = of_get_property(memory, "ibm,dynamic-memory", &ld);
diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c
index 304375a73574..b0697017d0e8 100644
--- a/arch/powerpc/mm/slb.c
+++ b/arch/powerpc/mm/slb.c
@@ -53,7 +53,8 @@ static inline unsigned long mk_vsid_data(unsigned long ea, unsigned long flags)
53 return (get_kernel_vsid(ea) << SLB_VSID_SHIFT) | flags; 53 return (get_kernel_vsid(ea) << SLB_VSID_SHIFT) | flags;
54} 54}
55 55
56static inline void slb_shadow_update(unsigned long esid, unsigned long vsid, 56static inline void slb_shadow_update(unsigned long ea,
57 unsigned long flags,
57 unsigned long entry) 58 unsigned long entry)
58{ 59{
59 /* 60 /*
@@ -61,11 +62,11 @@ static inline void slb_shadow_update(unsigned long esid, unsigned long vsid,
61 * updating it. 62 * updating it.
62 */ 63 */
63 get_slb_shadow()->save_area[entry].esid = 0; 64 get_slb_shadow()->save_area[entry].esid = 0;
64 barrier(); 65 smp_wmb();
65 get_slb_shadow()->save_area[entry].vsid = vsid; 66 get_slb_shadow()->save_area[entry].vsid = mk_vsid_data(ea, flags);
66 barrier(); 67 smp_wmb();
67 get_slb_shadow()->save_area[entry].esid = esid; 68 get_slb_shadow()->save_area[entry].esid = mk_esid_data(ea, entry);
68 69 smp_wmb();
69} 70}
70 71
71static inline void create_shadowed_slbe(unsigned long ea, unsigned long flags, 72static inline void create_shadowed_slbe(unsigned long ea, unsigned long flags,
@@ -76,8 +77,7 @@ static inline void create_shadowed_slbe(unsigned long ea, unsigned long flags,
76 * we don't get a stale entry here if we get preempted by PHYP 77 * we don't get a stale entry here if we get preempted by PHYP
77 * between these two statements. 78 * between these two statements.
78 */ 79 */
79 slb_shadow_update(mk_esid_data(ea, entry), mk_vsid_data(ea, flags), 80 slb_shadow_update(ea, flags, entry);
80 entry);
81 81
82 asm volatile("slbmte %0,%1" : 82 asm volatile("slbmte %0,%1" :
83 : "r" (mk_vsid_data(ea, flags)), 83 : "r" (mk_vsid_data(ea, flags)),
@@ -104,8 +104,7 @@ void slb_flush_and_rebolt(void)
104 ksp_esid_data &= ~SLB_ESID_V; 104 ksp_esid_data &= ~SLB_ESID_V;
105 105
106 /* Only third entry (stack) may change here so only resave that */ 106 /* Only third entry (stack) may change here so only resave that */
107 slb_shadow_update(ksp_esid_data, 107 slb_shadow_update(get_paca()->kstack, lflags, 2);
108 mk_vsid_data(ksp_esid_data, lflags), 2);
109 108
110 /* We need to do this all in asm, so we're sure we don't touch 109 /* We need to do this all in asm, so we're sure we don't touch
111 * the stack between the slbia and rebolting it. */ 110 * the stack between the slbia and rebolting it. */
@@ -123,6 +122,15 @@ void slb_flush_and_rebolt(void)
123 : "memory"); 122 : "memory");
124} 123}
125 124
125void slb_vmalloc_update(void)
126{
127 unsigned long vflags;
128
129 vflags = SLB_VSID_KERNEL | mmu_psize_defs[mmu_vmalloc_psize].sllp;
130 slb_shadow_update(VMALLOC_START, vflags, 1);
131 slb_flush_and_rebolt();
132}
133
126/* Flush all user entries from the segment table of the current processor. */ 134/* Flush all user entries from the segment table of the current processor. */
127void switch_slb(struct task_struct *tsk, struct mm_struct *mm) 135void switch_slb(struct task_struct *tsk, struct mm_struct *mm)
128{ 136{
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index 758a80ac080a..c784edd40ea7 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -351,7 +351,8 @@ static void aff_set_ref_point_location(struct spu_gang *gang)
351 lowest_offset = ctx->aff_offset; 351 lowest_offset = ctx->aff_offset;
352 } 352 }
353 353
354 gang->aff_ref_spu = aff_ref_location(ctx, mem_aff, gs, lowest_offset); 354 gang->aff_ref_spu = aff_ref_location(gang->aff_ref_ctx, mem_aff, gs,
355 lowest_offset);
355} 356}
356 357
357static struct spu *ctx_location(struct spu *ref, int offset, int node) 358static struct spu *ctx_location(struct spu *ref, int offset, int node)
diff --git a/arch/powerpc/platforms/powermac/feature.c b/arch/powerpc/platforms/powermac/feature.c
index f29705f8047d..ba931be2175c 100644
--- a/arch/powerpc/platforms/powermac/feature.c
+++ b/arch/powerpc/platforms/powermac/feature.c
@@ -826,13 +826,15 @@ core99_ata100_enable(struct device_node *node, long value)
826 826
827 if (value) { 827 if (value) {
828 if (pci_device_from_OF_node(node, &pbus, &pid) == 0) 828 if (pci_device_from_OF_node(node, &pbus, &pid) == 0)
829 pdev = pci_find_slot(pbus, pid); 829 pdev = pci_get_bus_and_slot(pbus, pid);
830 if (pdev == NULL) 830 if (pdev == NULL)
831 return 0; 831 return 0;
832 rc = pci_enable_device(pdev); 832 rc = pci_enable_device(pdev);
833 if (rc == 0)
834 pci_set_master(pdev);
835 pci_dev_put(pdev);
833 if (rc) 836 if (rc)
834 return rc; 837 return rc;
835 pci_set_master(pdev);
836 } 838 }
837 return 0; 839 return 0;
838} 840}
diff --git a/arch/powerpc/platforms/ps3/setup.c b/arch/powerpc/platforms/ps3/setup.c
index aa05288de64e..2952b22f1c84 100644
--- a/arch/powerpc/platforms/ps3/setup.c
+++ b/arch/powerpc/platforms/ps3/setup.c
@@ -109,7 +109,7 @@ static void ps3_panic(char *str)
109 109
110#if defined(CONFIG_FB_PS3) || defined(CONFIG_FB_PS3_MODULE) || \ 110#if defined(CONFIG_FB_PS3) || defined(CONFIG_FB_PS3_MODULE) || \
111 defined(CONFIG_PS3_FLASH) || defined(CONFIG_PS3_FLASH_MODULE) 111 defined(CONFIG_PS3_FLASH) || defined(CONFIG_PS3_FLASH_MODULE)
112static void prealloc(struct ps3_prealloc *p) 112static void __init prealloc(struct ps3_prealloc *p)
113{ 113{
114 if (!p->size) 114 if (!p->size)
115 return; 115 return;
diff --git a/include/asm-powerpc/mmu-hash64.h b/include/asm-powerpc/mmu-hash64.h
index 695962f02059..3112ad14ad95 100644
--- a/include/asm-powerpc/mmu-hash64.h
+++ b/include/asm-powerpc/mmu-hash64.h
@@ -262,6 +262,7 @@ extern void slb_initialize(void);
262extern void slb_flush_and_rebolt(void); 262extern void slb_flush_and_rebolt(void);
263extern void stab_initialize(unsigned long stab); 263extern void stab_initialize(unsigned long stab);
264 264
265extern void slb_vmalloc_update(void);
265#endif /* __ASSEMBLY__ */ 266#endif /* __ASSEMBLY__ */
266 267
267/* 268/*
diff --git a/include/asm-powerpc/pgtable-64k.h b/include/asm-powerpc/pgtable-64k.h
index 31cbd3d7fce8..33ae9018fe72 100644
--- a/include/asm-powerpc/pgtable-64k.h
+++ b/include/asm-powerpc/pgtable-64k.h
@@ -49,12 +49,10 @@
49 49
50/* Shift to put page number into pte. 50/* Shift to put page number into pte.
51 * 51 *
52 * That gives us a max RPN of 32 bits, which means a max of 48 bits 52 * That gives us a max RPN of 34 bits, which means a max of 50 bits
53 * of addressable physical space. 53 * of addressable physical space, or 46 bits for the special 4k PFNs.
54 * We could get 3 more bits here by setting PTE_RPN_SHIFT to 29 but
55 * 32 makes PTEs more readable for debugging for now :)
56 */ 54 */
57#define PTE_RPN_SHIFT (32) 55#define PTE_RPN_SHIFT (30)
58#define PTE_RPN_MAX (1UL << (64 - PTE_RPN_SHIFT)) 56#define PTE_RPN_MAX (1UL << (64 - PTE_RPN_SHIFT))
59#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1)) 57#define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
60 58