diff options
author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2007-03-14 11:58:28 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-04-27 11:20:23 -0400 |
commit | 2127435e57a15f1fea8d6969e264eeb05b28ba4b (patch) | |
tree | c8ae7407efcfe42309fbab978c931e17042780b8 | |
parent | 252161eccd1a44f32a506d0fedb424d4ff84e4dc (diff) |
[MIPS] JMR3927 cleanup
* Kill dead codes
* Rearrange irq chip handlers
* Minimize defconfig
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/Kconfig | 1 | ||||
-rw-r--r-- | arch/mips/configs/jmr3927_defconfig | 254 | ||||
-rw-r--r-- | arch/mips/jmr3927/common/prom.c | 12 | ||||
-rw-r--r-- | arch/mips/jmr3927/common/puts.c | 122 | ||||
-rw-r--r-- | arch/mips/jmr3927/rbhma3100/Makefile | 1 | ||||
-rw-r--r-- | arch/mips/jmr3927/rbhma3100/init.c | 16 | ||||
-rw-r--r-- | arch/mips/jmr3927/rbhma3100/irq.c | 312 | ||||
-rw-r--r-- | arch/mips/jmr3927/rbhma3100/kgdb_io.c | 54 | ||||
-rw-r--r-- | arch/mips/jmr3927/rbhma3100/setup.c | 157 | ||||
-rw-r--r-- | arch/mips/pci/fixup-jmr3927.c | 11 | ||||
-rw-r--r-- | arch/mips/pci/ops-tx3927.c | 232 | ||||
-rw-r--r-- | include/asm-mips/jmr3927/irq.h | 57 | ||||
-rw-r--r-- | include/asm-mips/jmr3927/jmr3927.h | 130 | ||||
-rw-r--r-- | include/asm-mips/jmr3927/tx3927.h | 8 | ||||
-rw-r--r-- | include/asm-mips/jmr3927/txx927.h | 5 |
15 files changed, 145 insertions, 1227 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 2fd82e548187..acceae0e8319 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -779,6 +779,7 @@ config TOSHIBA_JMR3927 | |||
779 | select SYS_SUPPORTS_LITTLE_ENDIAN | 779 | select SYS_SUPPORTS_LITTLE_ENDIAN |
780 | select SYS_SUPPORTS_BIG_ENDIAN | 780 | select SYS_SUPPORTS_BIG_ENDIAN |
781 | select TOSHIBA_BOARDS | 781 | select TOSHIBA_BOARDS |
782 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
782 | 783 | ||
783 | config TOSHIBA_RBTX4927 | 784 | config TOSHIBA_RBTX4927 |
784 | bool "Toshiba TBTX49[23]7 board" | 785 | bool "Toshiba TBTX49[23]7 board" |
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig index 21a094752dab..068e48ec7093 100644 --- a/arch/mips/configs/jmr3927_defconfig +++ b/arch/mips/configs/jmr3927_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.20 | 3 | # Linux kernel version: 2.6.21-rc3 |
4 | # Tue Feb 20 21:47:34 2007 | 4 | # Thu Mar 15 00:40:40 2007 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | 7 | ||
@@ -70,7 +70,7 @@ CONFIG_GENERIC_HWEIGHT=y | |||
70 | CONFIG_GENERIC_CALIBRATE_DELAY=y | 70 | CONFIG_GENERIC_CALIBRATE_DELAY=y |
71 | CONFIG_GENERIC_TIME=y | 71 | CONFIG_GENERIC_TIME=y |
72 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | 72 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y |
73 | # CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set | 73 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y |
74 | CONFIG_DMA_NONCOHERENT=y | 74 | CONFIG_DMA_NONCOHERENT=y |
75 | CONFIG_DMA_NEED_PCI_MAP_STATE=y | 75 | CONFIG_DMA_NEED_PCI_MAP_STATE=y |
76 | CONFIG_CPU_BIG_ENDIAN=y | 76 | CONFIG_CPU_BIG_ENDIAN=y |
@@ -138,12 +138,12 @@ CONFIG_ZONE_DMA_FLAG=1 | |||
138 | # CONFIG_HZ_48 is not set | 138 | # CONFIG_HZ_48 is not set |
139 | # CONFIG_HZ_100 is not set | 139 | # CONFIG_HZ_100 is not set |
140 | # CONFIG_HZ_128 is not set | 140 | # CONFIG_HZ_128 is not set |
141 | # CONFIG_HZ_250 is not set | 141 | CONFIG_HZ_250=y |
142 | # CONFIG_HZ_256 is not set | 142 | # CONFIG_HZ_256 is not set |
143 | CONFIG_HZ_1000=y | 143 | # CONFIG_HZ_1000 is not set |
144 | # CONFIG_HZ_1024 is not set | 144 | # CONFIG_HZ_1024 is not set |
145 | CONFIG_SYS_SUPPORTS_ARBIT_HZ=y | 145 | CONFIG_SYS_SUPPORTS_ARBIT_HZ=y |
146 | CONFIG_HZ=1000 | 146 | CONFIG_HZ=250 |
147 | CONFIG_PREEMPT_NONE=y | 147 | CONFIG_PREEMPT_NONE=y |
148 | # CONFIG_PREEMPT_VOLUNTARY is not set | 148 | # CONFIG_PREEMPT_VOLUNTARY is not set |
149 | # CONFIG_PREEMPT is not set | 149 | # CONFIG_PREEMPT is not set |
@@ -175,14 +175,15 @@ CONFIG_SYSVIPC_SYSCTL=y | |||
175 | # CONFIG_AUDIT is not set | 175 | # CONFIG_AUDIT is not set |
176 | # CONFIG_IKCONFIG is not set | 176 | # CONFIG_IKCONFIG is not set |
177 | CONFIG_SYSFS_DEPRECATED=y | 177 | CONFIG_SYSFS_DEPRECATED=y |
178 | CONFIG_RELAY=y | 178 | # CONFIG_RELAY is not set |
179 | # CONFIG_BLK_DEV_INITRD is not set | ||
179 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | 180 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set |
180 | CONFIG_SYSCTL=y | 181 | CONFIG_SYSCTL=y |
181 | CONFIG_EMBEDDED=y | 182 | CONFIG_EMBEDDED=y |
182 | CONFIG_SYSCTL_SYSCALL=y | 183 | CONFIG_SYSCTL_SYSCALL=y |
183 | CONFIG_KALLSYMS=y | 184 | CONFIG_KALLSYMS=y |
184 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | 185 | # CONFIG_KALLSYMS_EXTRA_PASS is not set |
185 | CONFIG_HOTPLUG=y | 186 | # CONFIG_HOTPLUG is not set |
186 | CONFIG_PRINTK=y | 187 | CONFIG_PRINTK=y |
187 | CONFIG_BUG=y | 188 | CONFIG_BUG=y |
188 | CONFIG_ELF_CORE=y | 189 | CONFIG_ELF_CORE=y |
@@ -217,11 +218,11 @@ CONFIG_IOSCHED_NOOP=y | |||
217 | CONFIG_IOSCHED_AS=y | 218 | CONFIG_IOSCHED_AS=y |
218 | CONFIG_IOSCHED_DEADLINE=y | 219 | CONFIG_IOSCHED_DEADLINE=y |
219 | CONFIG_IOSCHED_CFQ=y | 220 | CONFIG_IOSCHED_CFQ=y |
220 | CONFIG_DEFAULT_AS=y | 221 | # CONFIG_DEFAULT_AS is not set |
221 | # CONFIG_DEFAULT_DEADLINE is not set | 222 | # CONFIG_DEFAULT_DEADLINE is not set |
222 | # CONFIG_DEFAULT_CFQ is not set | 223 | CONFIG_DEFAULT_CFQ=y |
223 | # CONFIG_DEFAULT_NOOP is not set | 224 | # CONFIG_DEFAULT_NOOP is not set |
224 | CONFIG_DEFAULT_IOSCHED="anticipatory" | 225 | CONFIG_DEFAULT_IOSCHED="cfq" |
225 | 226 | ||
226 | # | 227 | # |
227 | # Bus options (PCI, PCMCIA, EISA, ISA, TC) | 228 | # Bus options (PCI, PCMCIA, EISA, ISA, TC) |
@@ -233,12 +234,10 @@ CONFIG_MMU=y | |||
233 | # | 234 | # |
234 | # PCCARD (PCMCIA/CardBus) support | 235 | # PCCARD (PCMCIA/CardBus) support |
235 | # | 236 | # |
236 | # CONFIG_PCCARD is not set | ||
237 | 237 | ||
238 | # | 238 | # |
239 | # PCI Hotplug Support | 239 | # PCI Hotplug Support |
240 | # | 240 | # |
241 | # CONFIG_HOTPLUG_PCI is not set | ||
242 | 241 | ||
243 | # | 242 | # |
244 | # Executable file formats | 243 | # Executable file formats |
@@ -250,10 +249,7 @@ CONFIG_TRAD_SIGNALS=y | |||
250 | # | 249 | # |
251 | # Power management options | 250 | # Power management options |
252 | # | 251 | # |
253 | CONFIG_PM=y | 252 | # CONFIG_PM is not set |
254 | # CONFIG_PM_LEGACY is not set | ||
255 | # CONFIG_PM_DEBUG is not set | ||
256 | # CONFIG_PM_SYSFS_DEPRECATED is not set | ||
257 | 253 | ||
258 | # | 254 | # |
259 | # Networking | 255 | # Networking |
@@ -267,12 +263,7 @@ CONFIG_NET=y | |||
267 | CONFIG_PACKET=y | 263 | CONFIG_PACKET=y |
268 | # CONFIG_PACKET_MMAP is not set | 264 | # CONFIG_PACKET_MMAP is not set |
269 | CONFIG_UNIX=y | 265 | CONFIG_UNIX=y |
270 | CONFIG_XFRM=y | 266 | # CONFIG_NET_KEY is not set |
271 | CONFIG_XFRM_USER=y | ||
272 | # CONFIG_XFRM_SUB_POLICY is not set | ||
273 | CONFIG_XFRM_MIGRATE=y | ||
274 | CONFIG_NET_KEY=y | ||
275 | CONFIG_NET_KEY_MIGRATE=y | ||
276 | CONFIG_INET=y | 267 | CONFIG_INET=y |
277 | # CONFIG_IP_MULTICAST is not set | 268 | # CONFIG_IP_MULTICAST is not set |
278 | # CONFIG_IP_ADVANCED_ROUTER is not set | 269 | # CONFIG_IP_ADVANCED_ROUTER is not set |
@@ -290,19 +281,18 @@ CONFIG_IP_PNP_BOOTP=y | |||
290 | # CONFIG_INET_IPCOMP is not set | 281 | # CONFIG_INET_IPCOMP is not set |
291 | # CONFIG_INET_XFRM_TUNNEL is not set | 282 | # CONFIG_INET_XFRM_TUNNEL is not set |
292 | # CONFIG_INET_TUNNEL is not set | 283 | # CONFIG_INET_TUNNEL is not set |
293 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | 284 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set |
294 | CONFIG_INET_XFRM_MODE_TUNNEL=y | 285 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set |
295 | CONFIG_INET_XFRM_MODE_BEET=y | 286 | # CONFIG_INET_XFRM_MODE_BEET is not set |
296 | CONFIG_INET_DIAG=y | 287 | # CONFIG_INET_DIAG is not set |
297 | CONFIG_INET_TCP_DIAG=y | ||
298 | # CONFIG_TCP_CONG_ADVANCED is not set | 288 | # CONFIG_TCP_CONG_ADVANCED is not set |
299 | CONFIG_TCP_CONG_CUBIC=y | 289 | CONFIG_TCP_CONG_CUBIC=y |
300 | CONFIG_DEFAULT_TCP_CONG="cubic" | 290 | CONFIG_DEFAULT_TCP_CONG="cubic" |
301 | CONFIG_TCP_MD5SIG=y | 291 | # CONFIG_TCP_MD5SIG is not set |
302 | # CONFIG_IPV6 is not set | 292 | # CONFIG_IPV6 is not set |
303 | # CONFIG_INET6_XFRM_TUNNEL is not set | 293 | # CONFIG_INET6_XFRM_TUNNEL is not set |
304 | # CONFIG_INET6_TUNNEL is not set | 294 | # CONFIG_INET6_TUNNEL is not set |
305 | CONFIG_NETWORK_SECMARK=y | 295 | # CONFIG_NETWORK_SECMARK is not set |
306 | # CONFIG_NETFILTER is not set | 296 | # CONFIG_NETFILTER is not set |
307 | 297 | ||
308 | # | 298 | # |
@@ -343,13 +333,7 @@ CONFIG_NETWORK_SECMARK=y | |||
343 | # CONFIG_HAMRADIO is not set | 333 | # CONFIG_HAMRADIO is not set |
344 | # CONFIG_IRDA is not set | 334 | # CONFIG_IRDA is not set |
345 | # CONFIG_BT is not set | 335 | # CONFIG_BT is not set |
346 | CONFIG_IEEE80211=y | 336 | # CONFIG_IEEE80211 is not set |
347 | # CONFIG_IEEE80211_DEBUG is not set | ||
348 | CONFIG_IEEE80211_CRYPT_WEP=y | ||
349 | CONFIG_IEEE80211_CRYPT_CCMP=y | ||
350 | CONFIG_IEEE80211_SOFTMAC=y | ||
351 | # CONFIG_IEEE80211_SOFTMAC_DEBUG is not set | ||
352 | CONFIG_WIRELESS_EXT=y | ||
353 | 337 | ||
354 | # | 338 | # |
355 | # Device Drivers | 339 | # Device Drivers |
@@ -360,14 +344,12 @@ CONFIG_WIRELESS_EXT=y | |||
360 | # | 344 | # |
361 | CONFIG_STANDALONE=y | 345 | CONFIG_STANDALONE=y |
362 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 346 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
363 | CONFIG_FW_LOADER=y | ||
364 | # CONFIG_SYS_HYPERVISOR is not set | 347 | # CONFIG_SYS_HYPERVISOR is not set |
365 | 348 | ||
366 | # | 349 | # |
367 | # Connector - unified userspace <-> kernelspace linker | 350 | # Connector - unified userspace <-> kernelspace linker |
368 | # | 351 | # |
369 | CONFIG_CONNECTOR=y | 352 | # CONFIG_CONNECTOR is not set |
370 | CONFIG_PROC_EVENTS=y | ||
371 | 353 | ||
372 | # | 354 | # |
373 | # Memory Technology Devices (MTD) | 355 | # Memory Technology Devices (MTD) |
@@ -396,16 +378,13 @@ CONFIG_PROC_EVENTS=y | |||
396 | # CONFIG_BLK_DEV_NBD is not set | 378 | # CONFIG_BLK_DEV_NBD is not set |
397 | # CONFIG_BLK_DEV_SX8 is not set | 379 | # CONFIG_BLK_DEV_SX8 is not set |
398 | # CONFIG_BLK_DEV_RAM is not set | 380 | # CONFIG_BLK_DEV_RAM is not set |
399 | # CONFIG_BLK_DEV_INITRD is not set | 381 | # CONFIG_CDROM_PKTCDVD is not set |
400 | CONFIG_CDROM_PKTCDVD=y | 382 | # CONFIG_ATA_OVER_ETH is not set |
401 | CONFIG_CDROM_PKTCDVD_BUFFERS=8 | ||
402 | # CONFIG_CDROM_PKTCDVD_WCACHE is not set | ||
403 | CONFIG_ATA_OVER_ETH=y | ||
404 | 383 | ||
405 | # | 384 | # |
406 | # Misc devices | 385 | # Misc devices |
407 | # | 386 | # |
408 | CONFIG_SGI_IOC4=y | 387 | # CONFIG_SGI_IOC4 is not set |
409 | # CONFIG_TIFM_CORE is not set | 388 | # CONFIG_TIFM_CORE is not set |
410 | 389 | ||
411 | # | 390 | # |
@@ -416,7 +395,7 @@ CONFIG_SGI_IOC4=y | |||
416 | # | 395 | # |
417 | # SCSI device support | 396 | # SCSI device support |
418 | # | 397 | # |
419 | CONFIG_RAID_ATTRS=y | 398 | # CONFIG_RAID_ATTRS is not set |
420 | # CONFIG_SCSI is not set | 399 | # CONFIG_SCSI is not set |
421 | # CONFIG_SCSI_NETLINK is not set | 400 | # CONFIG_SCSI_NETLINK is not set |
422 | 401 | ||
@@ -462,26 +441,13 @@ CONFIG_NETDEVICES=y | |||
462 | # | 441 | # |
463 | # PHY device support | 442 | # PHY device support |
464 | # | 443 | # |
465 | CONFIG_PHYLIB=y | 444 | # CONFIG_PHYLIB is not set |
466 | |||
467 | # | ||
468 | # MII PHY device drivers | ||
469 | # | ||
470 | CONFIG_MARVELL_PHY=y | ||
471 | CONFIG_DAVICOM_PHY=y | ||
472 | CONFIG_QSEMI_PHY=y | ||
473 | CONFIG_LXT_PHY=y | ||
474 | CONFIG_CICADA_PHY=y | ||
475 | CONFIG_VITESSE_PHY=y | ||
476 | CONFIG_SMSC_PHY=y | ||
477 | # CONFIG_BROADCOM_PHY is not set | ||
478 | # CONFIG_FIXED_PHY is not set | ||
479 | 445 | ||
480 | # | 446 | # |
481 | # Ethernet (10 or 100Mbit) | 447 | # Ethernet (10 or 100Mbit) |
482 | # | 448 | # |
483 | CONFIG_NET_ETHERNET=y | 449 | CONFIG_NET_ETHERNET=y |
484 | # CONFIG_MII is not set | 450 | CONFIG_MII=y |
485 | # CONFIG_HAPPYMEAL is not set | 451 | # CONFIG_HAPPYMEAL is not set |
486 | # CONFIG_SUNGEM is not set | 452 | # CONFIG_SUNGEM is not set |
487 | # CONFIG_CASSINI is not set | 453 | # CONFIG_CASSINI is not set |
@@ -493,7 +459,27 @@ CONFIG_NET_ETHERNET=y | |||
493 | # | 459 | # |
494 | # CONFIG_NET_TULIP is not set | 460 | # CONFIG_NET_TULIP is not set |
495 | # CONFIG_HP100 is not set | 461 | # CONFIG_HP100 is not set |
496 | # CONFIG_NET_PCI is not set | 462 | CONFIG_NET_PCI=y |
463 | # CONFIG_PCNET32 is not set | ||
464 | # CONFIG_AMD8111_ETH is not set | ||
465 | # CONFIG_ADAPTEC_STARFIRE is not set | ||
466 | # CONFIG_B44 is not set | ||
467 | # CONFIG_FORCEDETH is not set | ||
468 | CONFIG_TC35815=y | ||
469 | # CONFIG_DGRS is not set | ||
470 | # CONFIG_EEPRO100 is not set | ||
471 | # CONFIG_E100 is not set | ||
472 | # CONFIG_FEALNX is not set | ||
473 | # CONFIG_NATSEMI is not set | ||
474 | # CONFIG_NE2K_PCI is not set | ||
475 | # CONFIG_8139CP is not set | ||
476 | # CONFIG_8139TOO is not set | ||
477 | # CONFIG_SIS900 is not set | ||
478 | # CONFIG_EPIC100 is not set | ||
479 | # CONFIG_SUNDANCE is not set | ||
480 | # CONFIG_TLAN is not set | ||
481 | # CONFIG_VIA_RHINE is not set | ||
482 | # CONFIG_SC92031 is not set | ||
497 | 483 | ||
498 | # | 484 | # |
499 | # Ethernet (1000 Mbit) | 485 | # Ethernet (1000 Mbit) |
@@ -509,20 +495,21 @@ CONFIG_NET_ETHERNET=y | |||
509 | # CONFIG_SKGE is not set | 495 | # CONFIG_SKGE is not set |
510 | # CONFIG_SKY2 is not set | 496 | # CONFIG_SKY2 is not set |
511 | # CONFIG_SK98LIN is not set | 497 | # CONFIG_SK98LIN is not set |
498 | # CONFIG_VIA_VELOCITY is not set | ||
512 | # CONFIG_TIGON3 is not set | 499 | # CONFIG_TIGON3 is not set |
513 | # CONFIG_BNX2 is not set | 500 | # CONFIG_BNX2 is not set |
514 | CONFIG_QLA3XXX=y | 501 | # CONFIG_QLA3XXX is not set |
515 | # CONFIG_ATL1 is not set | 502 | # CONFIG_ATL1 is not set |
516 | 503 | ||
517 | # | 504 | # |
518 | # Ethernet (10000 Mbit) | 505 | # Ethernet (10000 Mbit) |
519 | # | 506 | # |
520 | # CONFIG_CHELSIO_T1 is not set | 507 | # CONFIG_CHELSIO_T1 is not set |
521 | CONFIG_CHELSIO_T3=y | 508 | # CONFIG_CHELSIO_T3 is not set |
522 | # CONFIG_IXGB is not set | 509 | # CONFIG_IXGB is not set |
523 | # CONFIG_S2IO is not set | 510 | # CONFIG_S2IO is not set |
524 | # CONFIG_MYRI10GE is not set | 511 | # CONFIG_MYRI10GE is not set |
525 | CONFIG_NETXEN_NIC=y | 512 | # CONFIG_NETXEN_NIC is not set |
526 | 513 | ||
527 | # | 514 | # |
528 | # Token Ring devices | 515 | # Token Ring devices |
@@ -566,10 +553,7 @@ CONFIG_INPUT=y | |||
566 | # | 553 | # |
567 | # Userland interfaces | 554 | # Userland interfaces |
568 | # | 555 | # |
569 | CONFIG_INPUT_MOUSEDEV=y | 556 | # CONFIG_INPUT_MOUSEDEV is not set |
570 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
571 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
572 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
573 | # CONFIG_INPUT_JOYDEV is not set | 557 | # CONFIG_INPUT_JOYDEV is not set |
574 | # CONFIG_INPUT_TSDEV is not set | 558 | # CONFIG_INPUT_TSDEV is not set |
575 | # CONFIG_INPUT_EVDEV is not set | 559 | # CONFIG_INPUT_EVDEV is not set |
@@ -587,21 +571,13 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | |||
587 | # | 571 | # |
588 | # Hardware I/O ports | 572 | # Hardware I/O ports |
589 | # | 573 | # |
590 | CONFIG_SERIO=y | 574 | # CONFIG_SERIO is not set |
591 | # CONFIG_SERIO_I8042 is not set | ||
592 | CONFIG_SERIO_SERPORT=y | ||
593 | # CONFIG_SERIO_PCIPS2 is not set | ||
594 | # CONFIG_SERIO_LIBPS2 is not set | ||
595 | CONFIG_SERIO_RAW=y | ||
596 | # CONFIG_GAMEPORT is not set | 575 | # CONFIG_GAMEPORT is not set |
597 | 576 | ||
598 | # | 577 | # |
599 | # Character devices | 578 | # Character devices |
600 | # | 579 | # |
601 | CONFIG_VT=y | 580 | # CONFIG_VT is not set |
602 | CONFIG_VT_CONSOLE=y | ||
603 | CONFIG_HW_CONSOLE=y | ||
604 | CONFIG_VT_HW_CONSOLE_BINDING=y | ||
605 | CONFIG_SERIAL_NONSTANDARD=y | 581 | CONFIG_SERIAL_NONSTANDARD=y |
606 | # CONFIG_COMPUTONE is not set | 582 | # CONFIG_COMPUTONE is not set |
607 | # CONFIG_ROCKETPORT is not set | 583 | # CONFIG_ROCKETPORT is not set |
@@ -609,7 +585,7 @@ CONFIG_SERIAL_NONSTANDARD=y | |||
609 | # CONFIG_DIGIEPCA is not set | 585 | # CONFIG_DIGIEPCA is not set |
610 | # CONFIG_MOXA_INTELLIO is not set | 586 | # CONFIG_MOXA_INTELLIO is not set |
611 | # CONFIG_MOXA_SMARTIO is not set | 587 | # CONFIG_MOXA_SMARTIO is not set |
612 | CONFIG_MOXA_SMARTIO_NEW=y | 588 | # CONFIG_MOXA_SMARTIO_NEW is not set |
613 | # CONFIG_ISI is not set | 589 | # CONFIG_ISI is not set |
614 | # CONFIG_SYNCLINKMP is not set | 590 | # CONFIG_SYNCLINKMP is not set |
615 | # CONFIG_SYNCLINK_GT is not set | 591 | # CONFIG_SYNCLINK_GT is not set |
@@ -629,11 +605,12 @@ CONFIG_MOXA_SMARTIO_NEW=y | |||
629 | # Non-8250 serial port support | 605 | # Non-8250 serial port support |
630 | # | 606 | # |
631 | CONFIG_SERIAL_CORE=y | 607 | CONFIG_SERIAL_CORE=y |
608 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
632 | CONFIG_SERIAL_TXX9=y | 609 | CONFIG_SERIAL_TXX9=y |
633 | CONFIG_HAS_TXX9_SERIAL=y | 610 | CONFIG_HAS_TXX9_SERIAL=y |
634 | CONFIG_SERIAL_TXX9_NR_UARTS=6 | 611 | CONFIG_SERIAL_TXX9_NR_UARTS=6 |
635 | # CONFIG_SERIAL_TXX9_CONSOLE is not set | 612 | CONFIG_SERIAL_TXX9_CONSOLE=y |
636 | # CONFIG_SERIAL_TXX9_STDSERIAL is not set | 613 | CONFIG_SERIAL_TXX9_STDSERIAL=y |
637 | # CONFIG_SERIAL_JSM is not set | 614 | # CONFIG_SERIAL_JSM is not set |
638 | # CONFIG_UNIX98_PTYS is not set | 615 | # CONFIG_UNIX98_PTYS is not set |
639 | CONFIG_LEGACY_PTYS=y | 616 | CONFIG_LEGACY_PTYS=y |
@@ -685,6 +662,11 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
685 | # CONFIG_HWMON_VID is not set | 662 | # CONFIG_HWMON_VID is not set |
686 | 663 | ||
687 | # | 664 | # |
665 | # Multifunction device drivers | ||
666 | # | ||
667 | # CONFIG_MFD_SM501 is not set | ||
668 | |||
669 | # | ||
688 | # Multimedia devices | 670 | # Multimedia devices |
689 | # | 671 | # |
690 | # CONFIG_VIDEO_DEV is not set | 672 | # CONFIG_VIDEO_DEV is not set |
@@ -697,51 +679,8 @@ CONFIG_LEGACY_PTY_COUNT=256 | |||
697 | # | 679 | # |
698 | # Graphics support | 680 | # Graphics support |
699 | # | 681 | # |
700 | # CONFIG_FIRMWARE_EDID is not set | ||
701 | CONFIG_FB=y | ||
702 | # CONFIG_FB_CFB_FILLRECT is not set | ||
703 | # CONFIG_FB_CFB_COPYAREA is not set | ||
704 | # CONFIG_FB_CFB_IMAGEBLIT is not set | ||
705 | # CONFIG_FB_SVGALIB is not set | ||
706 | # CONFIG_FB_MACMODES is not set | ||
707 | # CONFIG_FB_BACKLIGHT is not set | ||
708 | # CONFIG_FB_MODE_HELPERS is not set | ||
709 | # CONFIG_FB_TILEBLITTING is not set | ||
710 | # CONFIG_FB_CIRRUS is not set | ||
711 | # CONFIG_FB_PM2 is not set | ||
712 | # CONFIG_FB_CYBER2000 is not set | ||
713 | # CONFIG_FB_ASILIANT is not set | ||
714 | # CONFIG_FB_IMSTT is not set | ||
715 | # CONFIG_FB_S1D13XXX is not set | ||
716 | # CONFIG_FB_NVIDIA is not set | ||
717 | # CONFIG_FB_RIVA is not set | ||
718 | # CONFIG_FB_MATROX is not set | ||
719 | # CONFIG_FB_RADEON is not set | ||
720 | # CONFIG_FB_ATY128 is not set | ||
721 | # CONFIG_FB_ATY is not set | ||
722 | # CONFIG_FB_S3 is not set | ||
723 | # CONFIG_FB_SAVAGE is not set | ||
724 | # CONFIG_FB_SIS is not set | ||
725 | # CONFIG_FB_NEOMAGIC is not set | ||
726 | # CONFIG_FB_KYRO is not set | ||
727 | # CONFIG_FB_3DFX is not set | ||
728 | # CONFIG_FB_VOODOO1 is not set | ||
729 | # CONFIG_FB_SMIVGX is not set | ||
730 | # CONFIG_FB_TRIDENT is not set | ||
731 | # CONFIG_FB_VIRTUAL is not set | ||
732 | |||
733 | # | ||
734 | # Console display driver support | ||
735 | # | ||
736 | # CONFIG_VGA_CONSOLE is not set | ||
737 | CONFIG_DUMMY_CONSOLE=y | ||
738 | # CONFIG_FRAMEBUFFER_CONSOLE is not set | ||
739 | |||
740 | # | ||
741 | # Logo configuration | ||
742 | # | ||
743 | # CONFIG_LOGO is not set | ||
744 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | 682 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set |
683 | # CONFIG_FB is not set | ||
745 | 684 | ||
746 | # | 685 | # |
747 | # Sound | 686 | # Sound |
@@ -864,7 +803,7 @@ CONFIG_INOTIFY_USER=y | |||
864 | CONFIG_DNOTIFY=y | 803 | CONFIG_DNOTIFY=y |
865 | # CONFIG_AUTOFS_FS is not set | 804 | # CONFIG_AUTOFS_FS is not set |
866 | # CONFIG_AUTOFS4_FS is not set | 805 | # CONFIG_AUTOFS4_FS is not set |
867 | CONFIG_FUSE_FS=y | 806 | # CONFIG_FUSE_FS is not set |
868 | 807 | ||
869 | # | 808 | # |
870 | # CD-ROM/DVD Filesystems | 809 | # CD-ROM/DVD Filesystems |
@@ -889,14 +828,13 @@ CONFIG_SYSFS=y | |||
889 | # CONFIG_TMPFS is not set | 828 | # CONFIG_TMPFS is not set |
890 | # CONFIG_HUGETLB_PAGE is not set | 829 | # CONFIG_HUGETLB_PAGE is not set |
891 | CONFIG_RAMFS=y | 830 | CONFIG_RAMFS=y |
892 | CONFIG_CONFIGFS_FS=y | 831 | # CONFIG_CONFIGFS_FS is not set |
893 | 832 | ||
894 | # | 833 | # |
895 | # Miscellaneous filesystems | 834 | # Miscellaneous filesystems |
896 | # | 835 | # |
897 | # CONFIG_ADFS_FS is not set | 836 | # CONFIG_ADFS_FS is not set |
898 | # CONFIG_AFFS_FS is not set | 837 | # CONFIG_AFFS_FS is not set |
899 | # CONFIG_ECRYPT_FS is not set | ||
900 | # CONFIG_HFS_FS is not set | 838 | # CONFIG_HFS_FS is not set |
901 | # CONFIG_HFSPLUS_FS is not set | 839 | # CONFIG_HFSPLUS_FS is not set |
902 | # CONFIG_BEFS_FS is not set | 840 | # CONFIG_BEFS_FS is not set |
@@ -944,10 +882,7 @@ CONFIG_MSDOS_PARTITION=y | |||
944 | # | 882 | # |
945 | # Distributed Lock Manager | 883 | # Distributed Lock Manager |
946 | # | 884 | # |
947 | CONFIG_DLM=y | 885 | # CONFIG_DLM is not set |
948 | CONFIG_DLM_TCP=y | ||
949 | # CONFIG_DLM_SCTP is not set | ||
950 | # CONFIG_DLM_DEBUG is not set | ||
951 | 886 | ||
952 | # | 887 | # |
953 | # Profiling support | 888 | # Profiling support |
@@ -972,65 +907,22 @@ CONFIG_CMDLINE="" | |||
972 | # | 907 | # |
973 | # Security options | 908 | # Security options |
974 | # | 909 | # |
975 | CONFIG_KEYS=y | 910 | # CONFIG_KEYS is not set |
976 | CONFIG_KEYS_DEBUG_PROC_KEYS=y | ||
977 | # CONFIG_SECURITY is not set | 911 | # CONFIG_SECURITY is not set |
978 | 912 | ||
979 | # | 913 | # |
980 | # Cryptographic options | 914 | # Cryptographic options |
981 | # | 915 | # |
982 | CONFIG_CRYPTO=y | 916 | # CONFIG_CRYPTO is not set |
983 | CONFIG_CRYPTO_ALGAPI=y | ||
984 | CONFIG_CRYPTO_BLKCIPHER=y | ||
985 | CONFIG_CRYPTO_HASH=y | ||
986 | CONFIG_CRYPTO_MANAGER=y | ||
987 | CONFIG_CRYPTO_HMAC=y | ||
988 | CONFIG_CRYPTO_XCBC=y | ||
989 | CONFIG_CRYPTO_NULL=y | ||
990 | CONFIG_CRYPTO_MD4=y | ||
991 | CONFIG_CRYPTO_MD5=y | ||
992 | CONFIG_CRYPTO_SHA1=y | ||
993 | CONFIG_CRYPTO_SHA256=y | ||
994 | CONFIG_CRYPTO_SHA512=y | ||
995 | CONFIG_CRYPTO_WP512=y | ||
996 | CONFIG_CRYPTO_TGR192=y | ||
997 | CONFIG_CRYPTO_GF128MUL=y | ||
998 | CONFIG_CRYPTO_ECB=y | ||
999 | CONFIG_CRYPTO_CBC=y | ||
1000 | CONFIG_CRYPTO_PCBC=y | ||
1001 | CONFIG_CRYPTO_LRW=y | ||
1002 | CONFIG_CRYPTO_DES=y | ||
1003 | CONFIG_CRYPTO_FCRYPT=y | ||
1004 | CONFIG_CRYPTO_BLOWFISH=y | ||
1005 | CONFIG_CRYPTO_TWOFISH=y | ||
1006 | CONFIG_CRYPTO_TWOFISH_COMMON=y | ||
1007 | CONFIG_CRYPTO_SERPENT=y | ||
1008 | CONFIG_CRYPTO_AES=y | ||
1009 | CONFIG_CRYPTO_CAST5=y | ||
1010 | CONFIG_CRYPTO_CAST6=y | ||
1011 | CONFIG_CRYPTO_TEA=y | ||
1012 | CONFIG_CRYPTO_ARC4=y | ||
1013 | CONFIG_CRYPTO_KHAZAD=y | ||
1014 | CONFIG_CRYPTO_ANUBIS=y | ||
1015 | CONFIG_CRYPTO_DEFLATE=y | ||
1016 | CONFIG_CRYPTO_MICHAEL_MIC=y | ||
1017 | CONFIG_CRYPTO_CRC32C=y | ||
1018 | CONFIG_CRYPTO_CAMELLIA=y | ||
1019 | |||
1020 | # | ||
1021 | # Hardware crypto devices | ||
1022 | # | ||
1023 | 917 | ||
1024 | # | 918 | # |
1025 | # Library routines | 919 | # Library routines |
1026 | # | 920 | # |
1027 | CONFIG_BITREVERSE=y | 921 | CONFIG_BITREVERSE=y |
1028 | # CONFIG_CRC_CCITT is not set | 922 | # CONFIG_CRC_CCITT is not set |
1029 | CONFIG_CRC16=y | 923 | # CONFIG_CRC16 is not set |
1030 | CONFIG_CRC32=y | 924 | CONFIG_CRC32=y |
1031 | CONFIG_LIBCRC32C=y | 925 | # CONFIG_LIBCRC32C is not set |
1032 | CONFIG_ZLIB_INFLATE=y | ||
1033 | CONFIG_ZLIB_DEFLATE=y | ||
1034 | CONFIG_PLIST=y | 926 | CONFIG_PLIST=y |
1035 | CONFIG_HAS_IOMEM=y | 927 | CONFIG_HAS_IOMEM=y |
1036 | CONFIG_HAS_IOPORT=y | 928 | CONFIG_HAS_IOPORT=y |
diff --git a/arch/mips/jmr3927/common/prom.c b/arch/mips/jmr3927/common/prom.c index aa481b774c42..5398813e50e6 100644 --- a/arch/mips/jmr3927/common/prom.c +++ b/arch/mips/jmr3927/common/prom.c | |||
@@ -41,16 +41,6 @@ | |||
41 | 41 | ||
42 | #include <asm/bootinfo.h> | 42 | #include <asm/bootinfo.h> |
43 | 43 | ||
44 | extern int prom_argc; | ||
45 | extern char **prom_argv, **prom_envp; | ||
46 | |||
47 | typedef struct | ||
48 | { | ||
49 | char *name; | ||
50 | /* char *val; */ | ||
51 | }t_env_var; | ||
52 | |||
53 | |||
54 | char * __init prom_getcmdline(void) | 44 | char * __init prom_getcmdline(void) |
55 | { | 45 | { |
56 | return &(arcs_cmdline[0]); | 46 | return &(arcs_cmdline[0]); |
@@ -60,6 +50,8 @@ void __init prom_init_cmdline(void) | |||
60 | { | 50 | { |
61 | char *cp; | 51 | char *cp; |
62 | int actr; | 52 | int actr; |
53 | int prom_argc = fw_arg0; | ||
54 | char **prom_argv = (char **) fw_arg1; | ||
63 | 55 | ||
64 | actr = 1; /* Always ignore argv[0] */ | 56 | actr = 1; /* Always ignore argv[0] */ |
65 | 57 | ||
diff --git a/arch/mips/jmr3927/common/puts.c b/arch/mips/jmr3927/common/puts.c index 1c1cad9cd078..c611ab497888 100644 --- a/arch/mips/jmr3927/common/puts.c +++ b/arch/mips/jmr3927/common/puts.c | |||
@@ -32,137 +32,29 @@ | |||
32 | * 675 Mass Ave, Cambridge, MA 02139, USA. | 32 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
33 | */ | 33 | */ |
34 | 34 | ||
35 | #include <linux/types.h> | ||
36 | #include <asm/jmr3927/txx927.h> | ||
37 | #include <asm/jmr3927/tx3927.h> | 35 | #include <asm/jmr3927/tx3927.h> |
38 | #include <asm/jmr3927/jmr3927.h> | ||
39 | 36 | ||
40 | #define TIMEOUT 0xffffff | 37 | #define TIMEOUT 0xffffff |
41 | #define SLOW_DOWN | ||
42 | |||
43 | static const char digits[16] = "0123456789abcdef"; | ||
44 | |||
45 | #ifdef SLOW_DOWN | ||
46 | #define slow_down() { int k; for (k=0; k<10000; k++); } | ||
47 | #else | ||
48 | #define slow_down() | ||
49 | #endif | ||
50 | 38 | ||
51 | void | 39 | void |
52 | putch(const unsigned char c) | 40 | prom_putchar(char c) |
53 | { | 41 | { |
54 | int i = 0; | 42 | int i = 0; |
55 | 43 | ||
56 | do { | 44 | do { |
57 | slow_down(); | ||
58 | i++; | 45 | i++; |
59 | if (i>TIMEOUT) { | 46 | if (i>TIMEOUT) |
60 | break; | 47 | break; |
61 | } | ||
62 | } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS)); | 48 | } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS)); |
63 | tx3927_sioptr(1)->tfifo = c; | 49 | tx3927_sioptr(1)->tfifo = c; |
64 | return; | 50 | return; |
65 | } | 51 | } |
66 | 52 | ||
67 | unsigned char getch(void) | ||
68 | { | ||
69 | int i = 0; | ||
70 | int dicr; | ||
71 | char c; | ||
72 | |||
73 | /* diable RX int. */ | ||
74 | dicr = tx3927_sioptr(1)->dicr; | ||
75 | tx3927_sioptr(1)->dicr = 0; | ||
76 | |||
77 | do { | ||
78 | slow_down(); | ||
79 | i++; | ||
80 | if (i>TIMEOUT) { | ||
81 | break; | ||
82 | } | ||
83 | } while (tx3927_sioptr(1)->disr & TXx927_SIDISR_UVALID) | ||
84 | ; | ||
85 | c = tx3927_sioptr(1)->rfifo; | ||
86 | |||
87 | /* clear RX int. status */ | ||
88 | tx3927_sioptr(1)->disr &= ~TXx927_SIDISR_RDIS; | ||
89 | /* enable RX int. */ | ||
90 | tx3927_sioptr(1)->dicr = dicr; | ||
91 | |||
92 | return c; | ||
93 | } | ||
94 | void | ||
95 | do_jmr3927_led_set(char n) | ||
96 | { | ||
97 | /* and with current leds */ | ||
98 | jmr3927_led_and_set(n); | ||
99 | } | ||
100 | |||
101 | void | 53 | void |
102 | puts(unsigned char *cp) | 54 | puts(const char *cp) |
103 | { | 55 | { |
104 | int i = 0; | 56 | while (*cp) |
105 | 57 | prom_putchar(*cp++); | |
106 | while (*cp) { | 58 | prom_putchar('\r'); |
107 | do { | 59 | prom_putchar('\n'); |
108 | slow_down(); | ||
109 | i++; | ||
110 | if (i>TIMEOUT) { | ||
111 | break; | ||
112 | } | ||
113 | } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS)); | ||
114 | tx3927_sioptr(1)->tfifo = *cp++; | ||
115 | } | ||
116 | putch('\r'); | ||
117 | putch('\n'); | ||
118 | } | ||
119 | |||
120 | void | ||
121 | fputs(unsigned char *cp) | ||
122 | { | ||
123 | int i = 0; | ||
124 | |||
125 | while (*cp) { | ||
126 | do { | ||
127 | slow_down(); | ||
128 | i++; | ||
129 | if (i>TIMEOUT) { | ||
130 | break; | ||
131 | } | ||
132 | } while (!(tx3927_sioptr(1)->cisr & TXx927_SICISR_TXALS)); | ||
133 | tx3927_sioptr(1)->tfifo = *cp++; | ||
134 | } | ||
135 | } | ||
136 | |||
137 | |||
138 | void | ||
139 | put64(uint64_t ul) | ||
140 | { | ||
141 | int cnt; | ||
142 | unsigned ch; | ||
143 | |||
144 | cnt = 16; /* 16 nibbles in a 64 bit long */ | ||
145 | putch('0'); | ||
146 | putch('x'); | ||
147 | do { | ||
148 | cnt--; | ||
149 | ch = (unsigned char)(ul >> cnt * 4) & 0x0F; | ||
150 | putch(digits[ch]); | ||
151 | } while (cnt > 0); | ||
152 | } | ||
153 | |||
154 | void | ||
155 | put32(unsigned u) | ||
156 | { | ||
157 | int cnt; | ||
158 | unsigned ch; | ||
159 | |||
160 | cnt = 8; /* 8 nibbles in a 32 bit long */ | ||
161 | putch('0'); | ||
162 | putch('x'); | ||
163 | do { | ||
164 | cnt--; | ||
165 | ch = (unsigned char)(u >> cnt * 4) & 0x0F; | ||
166 | putch(digits[ch]); | ||
167 | } while (cnt > 0); | ||
168 | } | 60 | } |
diff --git a/arch/mips/jmr3927/rbhma3100/Makefile b/arch/mips/jmr3927/rbhma3100/Makefile index 18fe9a898cb7..8d00ba460cef 100644 --- a/arch/mips/jmr3927/rbhma3100/Makefile +++ b/arch/mips/jmr3927/rbhma3100/Makefile | |||
@@ -3,5 +3,4 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y += init.o irq.o setup.o | 5 | obj-y += init.o irq.o setup.o |
6 | obj-$(CONFIG_RUNTIME_DEBUG) += debug.o | ||
7 | obj-$(CONFIG_KGDB) += kgdb_io.o | 6 | obj-$(CONFIG_KGDB) += kgdb_io.o |
diff --git a/arch/mips/jmr3927/rbhma3100/init.c b/arch/mips/jmr3927/rbhma3100/init.c index a55cb4572ded..9169fab1773a 100644 --- a/arch/mips/jmr3927/rbhma3100/init.c +++ b/arch/mips/jmr3927/rbhma3100/init.c | |||
@@ -28,20 +28,10 @@ | |||
28 | * 675 Mass Ave, Cambridge, MA 02139, USA. | 28 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
29 | */ | 29 | */ |
30 | #include <linux/init.h> | 30 | #include <linux/init.h> |
31 | #include <linux/mm.h> | ||
32 | #include <linux/sched.h> | ||
33 | #include <linux/bootmem.h> | ||
34 | |||
35 | #include <asm/addrspace.h> | ||
36 | #include <asm/bootinfo.h> | 31 | #include <asm/bootinfo.h> |
37 | #include <asm/mipsregs.h> | ||
38 | #include <asm/jmr3927/jmr3927.h> | 32 | #include <asm/jmr3927/jmr3927.h> |
39 | 33 | ||
40 | int prom_argc; | ||
41 | char **prom_argv, **prom_envp; | ||
42 | extern void __init prom_init_cmdline(void); | 34 | extern void __init prom_init_cmdline(void); |
43 | extern char *prom_getenv(char *envname); | ||
44 | unsigned long mips_nofpu = 0; | ||
45 | 35 | ||
46 | const char *get_system_type(void) | 36 | const char *get_system_type(void) |
47 | { | 37 | { |
@@ -52,7 +42,7 @@ const char *get_system_type(void) | |||
52 | ; | 42 | ; |
53 | } | 43 | } |
54 | 44 | ||
55 | extern void puts(unsigned char *cp); | 45 | extern void puts(const char *cp); |
56 | 46 | ||
57 | void __init prom_init(void) | 47 | void __init prom_init(void) |
58 | { | 48 | { |
@@ -61,10 +51,6 @@ void __init prom_init(void) | |||
61 | if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0) | 51 | if ((tx3927_ccfgptr->ccfg & TX3927_CCFG_TLBOFF) == 0) |
62 | puts("Warning: TX3927 TLB off\n"); | 52 | puts("Warning: TX3927 TLB off\n"); |
63 | #endif | 53 | #endif |
64 | prom_argc = fw_arg0; | ||
65 | prom_argv = (char **) fw_arg1; | ||
66 | prom_envp = (char **) fw_arg2; | ||
67 | |||
68 | mips_machgroup = MACH_GROUP_TOSHIBA; | 54 | mips_machgroup = MACH_GROUP_TOSHIBA; |
69 | 55 | ||
70 | #ifdef CONFIG_TOSHIBA_JMR3927 | 56 | #ifdef CONFIG_TOSHIBA_JMR3927 |
diff --git a/arch/mips/jmr3927/rbhma3100/irq.c b/arch/mips/jmr3927/rbhma3100/irq.c index 7d2c203cb406..1187b44a3dd4 100644 --- a/arch/mips/jmr3927/rbhma3100/irq.c +++ b/arch/mips/jmr3927/rbhma3100/irq.c | |||
@@ -30,53 +30,21 @@ | |||
30 | * 675 Mass Ave, Cambridge, MA 02139, USA. | 30 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
31 | */ | 31 | */ |
32 | #include <linux/init.h> | 32 | #include <linux/init.h> |
33 | |||
34 | #include <linux/errno.h> | ||
35 | #include <linux/irq.h> | ||
36 | #include <linux/kernel_stat.h> | ||
37 | #include <linux/signal.h> | ||
38 | #include <linux/sched.h> | 33 | #include <linux/sched.h> |
39 | #include <linux/types.h> | 34 | #include <linux/types.h> |
40 | #include <linux/interrupt.h> | 35 | #include <linux/interrupt.h> |
41 | #include <linux/ioport.h> | ||
42 | #include <linux/timex.h> | ||
43 | #include <linux/slab.h> | ||
44 | #include <linux/random.h> | ||
45 | #include <linux/smp.h> | ||
46 | #include <linux/smp_lock.h> | ||
47 | #include <linux/bitops.h> | ||
48 | 36 | ||
49 | #include <asm/irq_regs.h> | ||
50 | #include <asm/io.h> | 37 | #include <asm/io.h> |
51 | #include <asm/mipsregs.h> | 38 | #include <asm/mipsregs.h> |
52 | #include <asm/system.h> | 39 | #include <asm/system.h> |
53 | 40 | ||
54 | #include <asm/ptrace.h> | ||
55 | #include <asm/processor.h> | 41 | #include <asm/processor.h> |
56 | #include <asm/jmr3927/irq.h> | ||
57 | #include <asm/debug.h> | ||
58 | #include <asm/jmr3927/jmr3927.h> | 42 | #include <asm/jmr3927/jmr3927.h> |
59 | 43 | ||
60 | #if JMR3927_IRQ_END > NR_IRQS | 44 | #if JMR3927_IRQ_END > NR_IRQS |
61 | #error JMR3927_IRQ_END > NR_IRQS | 45 | #error JMR3927_IRQ_END > NR_IRQS |
62 | #endif | 46 | #endif |
63 | 47 | ||
64 | struct tb_irq_space* tb_irq_spaces; | ||
65 | |||
66 | static int jmr3927_irq_base = -1; | ||
67 | |||
68 | #ifdef CONFIG_PCI | ||
69 | static int jmr3927_gen_iack(void) | ||
70 | { | ||
71 | /* generate ACK cycle */ | ||
72 | #ifdef __BIG_ENDIAN | ||
73 | return (tx3927_pcicptr->iiadp >> 24) & 0xff; | ||
74 | #else | ||
75 | return tx3927_pcicptr->iiadp & 0xff; | ||
76 | #endif | ||
77 | } | ||
78 | #endif | ||
79 | |||
80 | #define irc_dlevel 0 | 48 | #define irc_dlevel 0 |
81 | #define irc_elevel 1 | 49 | #define irc_elevel 1 |
82 | 50 | ||
@@ -87,89 +55,24 @@ static unsigned char irc_level[TX3927_NUM_IR] = { | |||
87 | 6, 6, 6 /* TMR */ | 55 | 6, 6, 6 /* TMR */ |
88 | }; | 56 | }; |
89 | 57 | ||
90 | static void jmr3927_irq_disable(unsigned int irq_nr); | ||
91 | static void jmr3927_irq_enable(unsigned int irq_nr); | ||
92 | |||
93 | static void jmr3927_irq_ack(unsigned int irq) | ||
94 | { | ||
95 | if (irq == JMR3927_IRQ_IRC_TMR0) | ||
96 | jmr3927_tmrptr->tisr = 0; /* ack interrupt */ | ||
97 | |||
98 | jmr3927_irq_disable(irq); | ||
99 | } | ||
100 | |||
101 | static void jmr3927_irq_end(unsigned int irq) | ||
102 | { | ||
103 | if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) | ||
104 | jmr3927_irq_enable(irq); | ||
105 | } | ||
106 | |||
107 | static void jmr3927_irq_disable(unsigned int irq_nr) | ||
108 | { | ||
109 | struct tb_irq_space* sp; | ||
110 | |||
111 | for (sp = tb_irq_spaces; sp; sp = sp->next) { | ||
112 | if (sp->start_irqno <= irq_nr && | ||
113 | irq_nr < sp->start_irqno + sp->nr_irqs) { | ||
114 | if (sp->mask_func) | ||
115 | sp->mask_func(irq_nr - sp->start_irqno, | ||
116 | sp->space_id); | ||
117 | break; | ||
118 | } | ||
119 | } | ||
120 | } | ||
121 | |||
122 | static void jmr3927_irq_enable(unsigned int irq_nr) | ||
123 | { | ||
124 | struct tb_irq_space* sp; | ||
125 | |||
126 | for (sp = tb_irq_spaces; sp; sp = sp->next) { | ||
127 | if (sp->start_irqno <= irq_nr && | ||
128 | irq_nr < sp->start_irqno + sp->nr_irqs) { | ||
129 | if (sp->unmask_func) | ||
130 | sp->unmask_func(irq_nr - sp->start_irqno, | ||
131 | sp->space_id); | ||
132 | break; | ||
133 | } | ||
134 | } | ||
135 | } | ||
136 | |||
137 | /* | 58 | /* |
138 | * CP0_STATUS is a thread's resource (saved/restored on context switch). | 59 | * CP0_STATUS is a thread's resource (saved/restored on context switch). |
139 | * So disable_irq/enable_irq MUST handle IOC/ISAC/IRC registers. | 60 | * So disable_irq/enable_irq MUST handle IOC/IRC registers. |
140 | */ | 61 | */ |
141 | static void mask_irq_isac(int irq_nr, int space_id) | 62 | static void mask_irq_ioc(unsigned int irq) |
142 | { | ||
143 | /* 0: mask */ | ||
144 | unsigned char imask = | ||
145 | jmr3927_isac_reg_in(JMR3927_ISAC_INTM_ADDR); | ||
146 | unsigned int bit = 1 << irq_nr; | ||
147 | jmr3927_isac_reg_out(imask & ~bit, JMR3927_ISAC_INTM_ADDR); | ||
148 | /* flush write buffer */ | ||
149 | (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR); | ||
150 | } | ||
151 | static void unmask_irq_isac(int irq_nr, int space_id) | ||
152 | { | ||
153 | /* 0: mask */ | ||
154 | unsigned char imask = jmr3927_isac_reg_in(JMR3927_ISAC_INTM_ADDR); | ||
155 | unsigned int bit = 1 << irq_nr; | ||
156 | jmr3927_isac_reg_out(imask | bit, JMR3927_ISAC_INTM_ADDR); | ||
157 | /* flush write buffer */ | ||
158 | (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR); | ||
159 | } | ||
160 | |||
161 | static void mask_irq_ioc(int irq_nr, int space_id) | ||
162 | { | 63 | { |
163 | /* 0: mask */ | 64 | /* 0: mask */ |
65 | unsigned int irq_nr = irq - JMR3927_IRQ_IOC; | ||
164 | unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR); | 66 | unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR); |
165 | unsigned int bit = 1 << irq_nr; | 67 | unsigned int bit = 1 << irq_nr; |
166 | jmr3927_ioc_reg_out(imask & ~bit, JMR3927_IOC_INTM_ADDR); | 68 | jmr3927_ioc_reg_out(imask & ~bit, JMR3927_IOC_INTM_ADDR); |
167 | /* flush write buffer */ | 69 | /* flush write buffer */ |
168 | (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR); | 70 | (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR); |
169 | } | 71 | } |
170 | static void unmask_irq_ioc(int irq_nr, int space_id) | 72 | static void unmask_irq_ioc(unsigned int irq) |
171 | { | 73 | { |
172 | /* 0: mask */ | 74 | /* 0: mask */ |
75 | unsigned int irq_nr = irq - JMR3927_IRQ_IOC; | ||
173 | unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR); | 76 | unsigned char imask = jmr3927_ioc_reg_in(JMR3927_IOC_INTM_ADDR); |
174 | unsigned int bit = 1 << irq_nr; | 77 | unsigned int bit = 1 << irq_nr; |
175 | jmr3927_ioc_reg_out(imask | bit, JMR3927_IOC_INTM_ADDR); | 78 | jmr3927_ioc_reg_out(imask | bit, JMR3927_IOC_INTM_ADDR); |
@@ -177,8 +80,9 @@ static void unmask_irq_ioc(int irq_nr, int space_id) | |||
177 | (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR); | 80 | (void)jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR); |
178 | } | 81 | } |
179 | 82 | ||
180 | static void mask_irq_irc(int irq_nr, int space_id) | 83 | static void mask_irq_irc(unsigned int irq) |
181 | { | 84 | { |
85 | unsigned int irq_nr = irq - JMR3927_IRQ_IRC; | ||
182 | volatile unsigned long *ilrp = &tx3927_ircptr->ilr[irq_nr / 2]; | 86 | volatile unsigned long *ilrp = &tx3927_ircptr->ilr[irq_nr / 2]; |
183 | if (irq_nr & 1) | 87 | if (irq_nr & 1) |
184 | *ilrp = (*ilrp & 0x00ff) | (irc_dlevel << 8); | 88 | *ilrp = (*ilrp & 0x00ff) | (irc_dlevel << 8); |
@@ -191,8 +95,9 @@ static void mask_irq_irc(int irq_nr, int space_id) | |||
191 | (void)tx3927_ircptr->ssr; | 95 | (void)tx3927_ircptr->ssr; |
192 | } | 96 | } |
193 | 97 | ||
194 | static void unmask_irq_irc(int irq_nr, int space_id) | 98 | static void unmask_irq_irc(unsigned int irq) |
195 | { | 99 | { |
100 | unsigned int irq_nr = irq - JMR3927_IRQ_IRC; | ||
196 | volatile unsigned long *ilrp = &tx3927_ircptr->ilr[irq_nr / 2]; | 101 | volatile unsigned long *ilrp = &tx3927_ircptr->ilr[irq_nr / 2]; |
197 | if (irq_nr & 1) | 102 | if (irq_nr & 1) |
198 | *ilrp = (*ilrp & 0x00ff) | (irc_level[irq_nr] << 8); | 103 | *ilrp = (*ilrp & 0x00ff) | (irc_level[irq_nr] << 8); |
@@ -203,98 +108,14 @@ static void unmask_irq_irc(int irq_nr, int space_id) | |||
203 | tx3927_ircptr->imr = irc_elevel; | 108 | tx3927_ircptr->imr = irc_elevel; |
204 | } | 109 | } |
205 | 110 | ||
206 | struct tb_irq_space jmr3927_isac_irqspace = { | ||
207 | .next = NULL, | ||
208 | .start_irqno = JMR3927_IRQ_ISAC, | ||
209 | nr_irqs : JMR3927_NR_IRQ_ISAC, | ||
210 | .mask_func = mask_irq_isac, | ||
211 | .unmask_func = unmask_irq_isac, | ||
212 | .name = "ISAC", | ||
213 | .space_id = 0, | ||
214 | can_share : 0 | ||
215 | }; | ||
216 | struct tb_irq_space jmr3927_ioc_irqspace = { | ||
217 | .next = NULL, | ||
218 | .start_irqno = JMR3927_IRQ_IOC, | ||
219 | nr_irqs : JMR3927_NR_IRQ_IOC, | ||
220 | .mask_func = mask_irq_ioc, | ||
221 | .unmask_func = unmask_irq_ioc, | ||
222 | .name = "IOC", | ||
223 | .space_id = 0, | ||
224 | can_share : 1 | ||
225 | }; | ||
226 | |||
227 | struct tb_irq_space jmr3927_irc_irqspace = { | ||
228 | .next = NULL, | ||
229 | .start_irqno = JMR3927_IRQ_IRC, | ||
230 | .nr_irqs = JMR3927_NR_IRQ_IRC, | ||
231 | .mask_func = mask_irq_irc, | ||
232 | .unmask_func = unmask_irq_irc, | ||
233 | .name = "on-chip", | ||
234 | .space_id = 0, | ||
235 | .can_share = 0 | ||
236 | }; | ||
237 | |||
238 | |||
239 | #ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND | ||
240 | static int tx_branch_likely_bug_count = 0; | ||
241 | static int have_tx_branch_likely_bug = 0; | ||
242 | |||
243 | static void tx_branch_likely_bug_fixup(void) | ||
244 | { | ||
245 | struct pt_regs *regs = get_irq_regs(); | ||
246 | |||
247 | /* TX39/49-BUG: Under this condition, the insn in delay slot | ||
248 | of the branch likely insn is executed (not nullified) even | ||
249 | the branch condition is false. */ | ||
250 | if (!have_tx_branch_likely_bug) | ||
251 | return; | ||
252 | if ((regs->cp0_epc & 0xfff) == 0xffc && | ||
253 | KSEGX(regs->cp0_epc) != KSEG0 && | ||
254 | KSEGX(regs->cp0_epc) != KSEG1) { | ||
255 | unsigned int insn = *(unsigned int*)(regs->cp0_epc - 4); | ||
256 | /* beql,bnel,blezl,bgtzl */ | ||
257 | /* bltzl,bgezl,blezall,bgezall */ | ||
258 | /* bczfl, bcztl */ | ||
259 | if ((insn & 0xf0000000) == 0x50000000 || | ||
260 | (insn & 0xfc0e0000) == 0x04020000 || | ||
261 | (insn & 0xf3fe0000) == 0x41020000) { | ||
262 | regs->cp0_epc -= 4; | ||
263 | tx_branch_likely_bug_count++; | ||
264 | printk(KERN_INFO | ||
265 | "fix branch-likery bug in %s (insn %08x)\n", | ||
266 | current->comm, insn); | ||
267 | } | ||
268 | } | ||
269 | } | ||
270 | #endif | ||
271 | |||
272 | static void jmr3927_spurious(void) | ||
273 | { | ||
274 | struct pt_regs * regs = get_irq_regs(); | ||
275 | |||
276 | #ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND | ||
277 | tx_branch_likely_bug_fixup(); | ||
278 | #endif | ||
279 | printk(KERN_WARNING "spurious interrupt (cause 0x%lx, pc 0x%lx, ra 0x%lx).\n", | ||
280 | regs->cp0_cause, regs->cp0_epc, regs->regs[31]); | ||
281 | } | ||
282 | |||
283 | asmlinkage void plat_irq_dispatch(void) | 111 | asmlinkage void plat_irq_dispatch(void) |
284 | { | 112 | { |
285 | struct pt_regs * regs = get_irq_regs(); | 113 | unsigned long cp0_cause = read_c0_cause(); |
286 | int irq; | 114 | int irq; |
287 | 115 | ||
288 | #ifdef CONFIG_TX_BRANCH_LIKELY_BUG_WORKAROUND | 116 | if ((cp0_cause & CAUSEF_IP7) == 0) |
289 | tx_branch_likely_bug_fixup(); | ||
290 | #endif | ||
291 | if ((regs->cp0_cause & CAUSEF_IP7) == 0) { | ||
292 | #if 0 | ||
293 | jmr3927_spurious(); | ||
294 | #endif | ||
295 | return; | 117 | return; |
296 | } | 118 | irq = (cp0_cause >> CAUSEB_IP2) & 0x0f; |
297 | irq = (regs->cp0_cause >> CAUSEB_IP2) & 0x0f; | ||
298 | 119 | ||
299 | do_IRQ(irq + JMR3927_IRQ_IRC); | 120 | do_IRQ(irq + JMR3927_IRQ_IRC); |
300 | } | 121 | } |
@@ -317,35 +138,6 @@ static struct irqaction ioc_action = { | |||
317 | jmr3927_ioc_interrupt, 0, CPU_MASK_NONE, "IOC", NULL, NULL, | 138 | jmr3927_ioc_interrupt, 0, CPU_MASK_NONE, "IOC", NULL, NULL, |
318 | }; | 139 | }; |
319 | 140 | ||
320 | static irqreturn_t jmr3927_isac_interrupt(int irq, void *dev_id) | ||
321 | { | ||
322 | unsigned char istat = jmr3927_isac_reg_in(JMR3927_ISAC_INTS2_ADDR); | ||
323 | int i; | ||
324 | |||
325 | for (i = 0; i < JMR3927_NR_IRQ_ISAC; i++) { | ||
326 | if (istat & (1 << i)) { | ||
327 | irq = JMR3927_IRQ_ISAC + i; | ||
328 | do_IRQ(irq); | ||
329 | } | ||
330 | } | ||
331 | return IRQ_HANDLED; | ||
332 | } | ||
333 | |||
334 | static struct irqaction isac_action = { | ||
335 | jmr3927_isac_interrupt, 0, CPU_MASK_NONE, "ISAC", NULL, NULL, | ||
336 | }; | ||
337 | |||
338 | |||
339 | static irqreturn_t jmr3927_isaerr_interrupt(int irq, void *dev_id) | ||
340 | { | ||
341 | printk(KERN_WARNING "ISA error interrupt (irq 0x%x).\n", irq); | ||
342 | |||
343 | return IRQ_HANDLED; | ||
344 | } | ||
345 | static struct irqaction isaerr_action = { | ||
346 | jmr3927_isaerr_interrupt, 0, CPU_MASK_NONE, "ISA error", NULL, NULL, | ||
347 | }; | ||
348 | |||
349 | static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id) | 141 | static irqreturn_t jmr3927_pcierr_interrupt(int irq, void *dev_id) |
350 | { | 142 | { |
351 | printk(KERN_WARNING "PCI error interrupt (irq 0x%x).\n", irq); | 143 | printk(KERN_WARNING "PCI error interrupt (irq 0x%x).\n", irq); |
@@ -358,54 +150,19 @@ static struct irqaction pcierr_action = { | |||
358 | jmr3927_pcierr_interrupt, 0, CPU_MASK_NONE, "PCI error", NULL, NULL, | 150 | jmr3927_pcierr_interrupt, 0, CPU_MASK_NONE, "PCI error", NULL, NULL, |
359 | }; | 151 | }; |
360 | 152 | ||
361 | int jmr3927_ether1_irq = 0; | 153 | static void __init jmr3927_irq_init(void); |
362 | |||
363 | void jmr3927_irq_init(u32 irq_base); | ||
364 | 154 | ||
365 | void __init arch_init_irq(void) | 155 | void __init arch_init_irq(void) |
366 | { | 156 | { |
367 | /* look for io board's presence */ | ||
368 | int have_isac = jmr3927_have_isac(); | ||
369 | |||
370 | /* Now, interrupt control disabled, */ | 157 | /* Now, interrupt control disabled, */ |
371 | /* all IRC interrupts are masked, */ | 158 | /* all IRC interrupts are masked, */ |
372 | /* all IRC interrupt mode are Low Active. */ | 159 | /* all IRC interrupt mode are Low Active. */ |
373 | 160 | ||
374 | if (have_isac) { | ||
375 | |||
376 | /* ETHER1 (NE2000 compatible 10M-Ether) parameter setup */ | ||
377 | /* temporary enable interrupt control */ | ||
378 | tx3927_ircptr->cer = 1; | ||
379 | /* ETHER1 Int. Is High-Active. */ | ||
380 | if (tx3927_ircptr->ssr & (1 << 0)) | ||
381 | jmr3927_ether1_irq = JMR3927_IRQ_IRC_INT0; | ||
382 | #if 0 /* INT3 may be asserted by ether0 (even after reboot...) */ | ||
383 | else if (tx3927_ircptr->ssr & (1 << 3)) | ||
384 | jmr3927_ether1_irq = JMR3927_IRQ_IRC_INT3; | ||
385 | #endif | ||
386 | /* disable interrupt control */ | ||
387 | tx3927_ircptr->cer = 0; | ||
388 | |||
389 | /* Ether1: High Active */ | ||
390 | if (jmr3927_ether1_irq) { | ||
391 | int ether1_irc = jmr3927_ether1_irq - JMR3927_IRQ_IRC; | ||
392 | tx3927_ircptr->cr[ether1_irc / 8] |= | ||
393 | TX3927_IRCR_HIGH << ((ether1_irc % 8) * 2); | ||
394 | } | ||
395 | } | ||
396 | |||
397 | /* mask all IOC interrupts */ | 161 | /* mask all IOC interrupts */ |
398 | jmr3927_ioc_reg_out(0, JMR3927_IOC_INTM_ADDR); | 162 | jmr3927_ioc_reg_out(0, JMR3927_IOC_INTM_ADDR); |
399 | /* setup IOC interrupt mode (SOFT:High Active, Others:Low Active) */ | 163 | /* setup IOC interrupt mode (SOFT:High Active, Others:Low Active) */ |
400 | jmr3927_ioc_reg_out(JMR3927_IOC_INTF_SOFT, JMR3927_IOC_INTP_ADDR); | 164 | jmr3927_ioc_reg_out(JMR3927_IOC_INTF_SOFT, JMR3927_IOC_INTP_ADDR); |
401 | 165 | ||
402 | if (have_isac) { | ||
403 | /* mask all ISAC interrupts */ | ||
404 | jmr3927_isac_reg_out(0, JMR3927_ISAC_INTM_ADDR); | ||
405 | /* setup ISAC interrupt mode (ISAIRQ3,ISAIRQ5:Low Active ???) */ | ||
406 | jmr3927_isac_reg_out(JMR3927_ISAC_INTF_IRQ3|JMR3927_ISAC_INTF_IRQ5, JMR3927_ISAC_INTP_ADDR); | ||
407 | } | ||
408 | |||
409 | /* clear PCI Soft interrupts */ | 166 | /* clear PCI Soft interrupts */ |
410 | jmr3927_ioc_reg_out(0, JMR3927_IOC_INTS1_ADDR); | 167 | jmr3927_ioc_reg_out(0, JMR3927_IOC_INTS1_ADDR); |
411 | /* clear PCI Reset interrupts */ | 168 | /* clear PCI Reset interrupts */ |
@@ -415,21 +172,11 @@ void __init arch_init_irq(void) | |||
415 | tx3927_ircptr->cer = TX3927_IRCER_ICE; | 172 | tx3927_ircptr->cer = TX3927_IRCER_ICE; |
416 | tx3927_ircptr->imr = irc_elevel; | 173 | tx3927_ircptr->imr = irc_elevel; |
417 | 174 | ||
418 | jmr3927_irq_init(NR_ISA_IRQS); | 175 | jmr3927_irq_init(); |
419 | |||
420 | /* setup irq space */ | ||
421 | add_tb_irq_space(&jmr3927_isac_irqspace); | ||
422 | add_tb_irq_space(&jmr3927_ioc_irqspace); | ||
423 | add_tb_irq_space(&jmr3927_irc_irqspace); | ||
424 | 176 | ||
425 | /* setup IOC interrupt 1 (PCI, MODEM) */ | 177 | /* setup IOC interrupt 1 (PCI, MODEM) */ |
426 | setup_irq(JMR3927_IRQ_IOCINT, &ioc_action); | 178 | setup_irq(JMR3927_IRQ_IOCINT, &ioc_action); |
427 | 179 | ||
428 | if (have_isac) { | ||
429 | setup_irq(JMR3927_IRQ_ISACINT, &isac_action); | ||
430 | setup_irq(JMR3927_IRQ_ISAC_ISAER, &isaerr_action); | ||
431 | } | ||
432 | |||
433 | #ifdef CONFIG_PCI | 180 | #ifdef CONFIG_PCI |
434 | setup_irq(JMR3927_IRQ_IRC_PCI, &pcierr_action); | 181 | setup_irq(JMR3927_IRQ_IRC_PCI, &pcierr_action); |
435 | #endif | 182 | #endif |
@@ -438,21 +185,28 @@ void __init arch_init_irq(void) | |||
438 | set_c0_status(ST0_IM); /* IE bit is still 0. */ | 185 | set_c0_status(ST0_IM); /* IE bit is still 0. */ |
439 | } | 186 | } |
440 | 187 | ||
441 | static struct irq_chip jmr3927_irq_controller = { | 188 | static struct irq_chip jmr3927_irq_ioc = { |
442 | .name = "jmr3927_irq", | 189 | .name = "jmr3927_ioc", |
443 | .ack = jmr3927_irq_ack, | 190 | .ack = mask_irq_ioc, |
444 | .mask = jmr3927_irq_disable, | 191 | .mask = mask_irq_ioc, |
445 | .mask_ack = jmr3927_irq_ack, | 192 | .mask_ack = mask_irq_ioc, |
446 | .unmask = jmr3927_irq_enable, | 193 | .unmask = unmask_irq_ioc, |
447 | .end = jmr3927_irq_end, | ||
448 | }; | 194 | }; |
449 | 195 | ||
450 | void jmr3927_irq_init(u32 irq_base) | 196 | static struct irq_chip jmr3927_irq_irc = { |
197 | .name = "jmr3927_irc", | ||
198 | .ack = mask_irq_irc, | ||
199 | .mask = mask_irq_irc, | ||
200 | .mask_ack = mask_irq_irc, | ||
201 | .unmask = unmask_irq_irc, | ||
202 | }; | ||
203 | |||
204 | static void __init jmr3927_irq_init(void) | ||
451 | { | 205 | { |
452 | u32 i; | 206 | u32 i; |
453 | 207 | ||
454 | for (i= irq_base; i< irq_base + JMR3927_NR_IRQ_IRC + JMR3927_NR_IRQ_IOC; i++) | 208 | for (i = JMR3927_IRQ_IRC; i < JMR3927_IRQ_IRC + JMR3927_NR_IRQ_IRC; i++) |
455 | set_irq_chip(i, &jmr3927_irq_controller); | 209 | set_irq_chip_and_handler(i, &jmr3927_irq_irc, handle_level_irq); |
456 | 210 | for (i = JMR3927_IRQ_IOC; i < JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC; i++) | |
457 | jmr3927_irq_base = irq_base; | 211 | set_irq_chip_and_handler(i, &jmr3927_irq_ioc, handle_level_irq); |
458 | } | 212 | } |
diff --git a/arch/mips/jmr3927/rbhma3100/kgdb_io.c b/arch/mips/jmr3927/rbhma3100/kgdb_io.c index 269a42deae06..2604f2c9a96e 100644 --- a/arch/mips/jmr3927/rbhma3100/kgdb_io.c +++ b/arch/mips/jmr3927/rbhma3100/kgdb_io.c | |||
@@ -31,23 +31,12 @@ | |||
31 | * 675 Mass Ave, Cambridge, MA 02139, USA. | 31 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
32 | */ | 32 | */ |
33 | 33 | ||
34 | #include <linux/types.h> | ||
35 | #include <asm/jmr3927/txx927.h> | ||
36 | #include <asm/jmr3927/tx3927.h> | ||
37 | #include <asm/jmr3927/jmr3927.h> | 34 | #include <asm/jmr3927/jmr3927.h> |
38 | 35 | ||
39 | #define TIMEOUT 0xffffff | 36 | #define TIMEOUT 0xffffff |
40 | #define SLOW_DOWN | ||
41 | |||
42 | static const char digits[16] = "0123456789abcdef"; | ||
43 | |||
44 | #ifdef SLOW_DOWN | ||
45 | #define slow_down() { int k; for (k=0; k<10000; k++); } | ||
46 | #else | ||
47 | #define slow_down() | ||
48 | #endif | ||
49 | 37 | ||
50 | static int remoteDebugInitialized = 0; | 38 | static int remoteDebugInitialized = 0; |
39 | static void debugInit(int baud) | ||
51 | 40 | ||
52 | int putDebugChar(unsigned char c) | 41 | int putDebugChar(unsigned char c) |
53 | { | 42 | { |
@@ -103,20 +92,8 @@ unsigned char getDebugChar(void) | |||
103 | return c; | 92 | return c; |
104 | } | 93 | } |
105 | 94 | ||
106 | void debugInit(int baud) | 95 | static void debugInit(int baud) |
107 | { | 96 | { |
108 | /* | ||
109 | volatile unsigned long lcr; | ||
110 | volatile unsigned long dicr; | ||
111 | volatile unsigned long disr; | ||
112 | volatile unsigned long cisr; | ||
113 | volatile unsigned long fcr; | ||
114 | volatile unsigned long flcr; | ||
115 | volatile unsigned long bgr; | ||
116 | volatile unsigned long tfifo; | ||
117 | volatile unsigned long rfifo; | ||
118 | */ | ||
119 | |||
120 | tx3927_sioptr(0)->lcr = 0x020; | 97 | tx3927_sioptr(0)->lcr = 0x020; |
121 | tx3927_sioptr(0)->dicr = 0; | 98 | tx3927_sioptr(0)->dicr = 0; |
122 | tx3927_sioptr(0)->disr = 0x4100; | 99 | tx3927_sioptr(0)->disr = 0x4100; |
@@ -125,31 +102,4 @@ void debugInit(int baud) | |||
125 | tx3927_sioptr(0)->flcr = 0x02; | 102 | tx3927_sioptr(0)->flcr = 0x02; |
126 | tx3927_sioptr(0)->bgr = ((JMR3927_BASE_BAUD + baud / 2) / baud) | | 103 | tx3927_sioptr(0)->bgr = ((JMR3927_BASE_BAUD + baud / 2) / baud) | |
127 | TXx927_SIBGR_BCLK_T0; | 104 | TXx927_SIBGR_BCLK_T0; |
128 | #if 0 | ||
129 | /* | ||
130 | * Reset the UART. | ||
131 | */ | ||
132 | tx3927_sioptr(0)->fcr = TXx927_SIFCR_SWRST; | ||
133 | while (tx3927_sioptr(0)->fcr & TXx927_SIFCR_SWRST) | ||
134 | ; | ||
135 | |||
136 | /* | ||
137 | * and set the speed of the serial port | ||
138 | * (currently hardwired to 9600 8N1 | ||
139 | */ | ||
140 | |||
141 | tx3927_sioptr(0)->lcr = TXx927_SILCR_UMODE_8BIT | | ||
142 | TXx927_SILCR_USBL_1BIT | | ||
143 | TXx927_SILCR_SCS_IMCLK_BG; | ||
144 | tx3927_sioptr(0)->bgr = | ||
145 | ((JMR3927_BASE_BAUD + baud / 2) / baud) | | ||
146 | TXx927_SIBGR_BCLK_T0; | ||
147 | |||
148 | /* HW RTS/CTS control */ | ||
149 | if (ser->flags & ASYNC_HAVE_CTS_LINE) | ||
150 | tx3927_sioptr(0)->flcr = TXx927_SIFLCR_RCS | TXx927_SIFLCR_TES | | ||
151 | TXx927_SIFLCR_RTSTL_MAX /* 15 */; | ||
152 | /* Enable RX/TX */ | ||
153 | tx3927_sioptr(0)->flcr &= ~(TXx927_SIFLCR_RSDE | TXx927_SIFLCR_TSDE); | ||
154 | #endif | ||
155 | } | 105 | } |
diff --git a/arch/mips/jmr3927/rbhma3100/setup.c b/arch/mips/jmr3927/rbhma3100/setup.c index fc523bda068f..d1ef2895d564 100644 --- a/arch/mips/jmr3927/rbhma3100/setup.c +++ b/arch/mips/jmr3927/rbhma3100/setup.c | |||
@@ -54,87 +54,18 @@ | |||
54 | 54 | ||
55 | #include <asm/addrspace.h> | 55 | #include <asm/addrspace.h> |
56 | #include <asm/time.h> | 56 | #include <asm/time.h> |
57 | #include <asm/bcache.h> | ||
58 | #include <asm/irq.h> | ||
59 | #include <asm/reboot.h> | 57 | #include <asm/reboot.h> |
60 | #include <asm/gdb-stub.h> | ||
61 | #include <asm/jmr3927/jmr3927.h> | 58 | #include <asm/jmr3927/jmr3927.h> |
62 | #include <asm/mipsregs.h> | 59 | #include <asm/mipsregs.h> |
63 | #include <asm/traps.h> | ||
64 | 60 | ||
65 | extern void puts(unsigned char *cp); | 61 | extern void puts(const char *cp); |
66 | 62 | ||
67 | /* Tick Timer divider */ | 63 | /* Tick Timer divider */ |
68 | #define JMR3927_TIMER_CCD 0 /* 1/2 */ | 64 | #define JMR3927_TIMER_CCD 0 /* 1/2 */ |
69 | #define JMR3927_TIMER_CLK (JMR3927_IMCLK / (2 << JMR3927_TIMER_CCD)) | 65 | #define JMR3927_TIMER_CLK (JMR3927_IMCLK / (2 << JMR3927_TIMER_CCD)) |
70 | 66 | ||
71 | unsigned char led_state = 0xf; | ||
72 | |||
73 | struct { | ||
74 | struct resource ram0; | ||
75 | struct resource ram1; | ||
76 | struct resource pcimem; | ||
77 | struct resource iob; | ||
78 | struct resource ioc; | ||
79 | struct resource pciio; | ||
80 | struct resource jmy1394; | ||
81 | struct resource rom1; | ||
82 | struct resource rom0; | ||
83 | struct resource sio0; | ||
84 | struct resource sio1; | ||
85 | } jmr3927_resources = { | ||
86 | { | ||
87 | .start = 0, | ||
88 | .end = 0x01FFFFFF, | ||
89 | .name = "RAM0", | ||
90 | .flags = IORESOURCE_MEM | ||
91 | }, { | ||
92 | .start = 0x02000000, | ||
93 | .end = 0x03FFFFFF, | ||
94 | .name = "RAM1", | ||
95 | .flags = IORESOURCE_MEM | ||
96 | }, { | ||
97 | .start = 0x08000000, | ||
98 | .end = 0x07FFFFFF, | ||
99 | .name = "PCIMEM", | ||
100 | .flags = IORESOURCE_MEM | ||
101 | }, { | ||
102 | .start = 0x10000000, | ||
103 | .end = 0x13FFFFFF, | ||
104 | .name = "IOB" | ||
105 | }, { | ||
106 | .start = 0x14000000, | ||
107 | .end = 0x14FFFFFF, | ||
108 | .name = "IOC" | ||
109 | }, { | ||
110 | .start = 0x15000000, | ||
111 | .end = 0x15FFFFFF, | ||
112 | .name = "PCIIO" | ||
113 | }, { | ||
114 | .start = 0x1D000000, | ||
115 | .end = 0x1D3FFFFF, | ||
116 | .name = "JMY1394" | ||
117 | }, { | ||
118 | .start = 0x1E000000, | ||
119 | .end = 0x1E3FFFFF, | ||
120 | .name = "ROM1" | ||
121 | }, { | ||
122 | .start = 0x1FC00000, | ||
123 | .end = 0x1FFFFFFF, | ||
124 | .name = "ROM0" | ||
125 | }, { | ||
126 | .start = 0xFFFEF300, | ||
127 | .end = 0xFFFEF3FF, | ||
128 | .name = "SIO0" | ||
129 | }, { | ||
130 | .start = 0xFFFEF400, | ||
131 | .end = 0xFFFEF4FF, | ||
132 | .name = "SIO1" | ||
133 | }, | ||
134 | }; | ||
135 | |||
136 | /* don't enable - see errata */ | 67 | /* don't enable - see errata */ |
137 | int jmr3927_ccfg_toeon = 0; | 68 | static int jmr3927_ccfg_toeon; |
138 | 69 | ||
139 | static inline void do_reset(void) | 70 | static inline void do_reset(void) |
140 | { | 71 | { |
@@ -173,9 +104,15 @@ static cycle_t jmr3927_hpt_read(void) | |||
173 | return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr; | 104 | return jiffies * (JMR3927_TIMER_CLK / HZ) + jmr3927_tmrptr->trr; |
174 | } | 105 | } |
175 | 106 | ||
107 | static void jmr3927_timer_ack(void) | ||
108 | { | ||
109 | jmr3927_tmrptr->tisr = 0; /* ack interrupt */ | ||
110 | } | ||
111 | |||
176 | static void __init jmr3927_time_init(void) | 112 | static void __init jmr3927_time_init(void) |
177 | { | 113 | { |
178 | clocksource_mips.read = jmr3927_hpt_read; | 114 | clocksource_mips.read = jmr3927_hpt_read; |
115 | mips_timer_ack = jmr3927_timer_ack; | ||
179 | mips_hpt_frequency = JMR3927_TIMER_CLK; | 116 | mips_hpt_frequency = JMR3927_TIMER_CLK; |
180 | } | 117 | } |
181 | 118 | ||
@@ -190,9 +127,6 @@ void __init plat_timer_setup(struct irqaction *irq) | |||
190 | setup_irq(JMR3927_IRQ_TICK, irq); | 127 | setup_irq(JMR3927_IRQ_TICK, irq); |
191 | } | 128 | } |
192 | 129 | ||
193 | #define USECS_PER_JIFFY (1000000/HZ) | ||
194 | |||
195 | //#undef DO_WRITE_THROUGH | ||
196 | #define DO_WRITE_THROUGH | 130 | #define DO_WRITE_THROUGH |
197 | #define DO_ENABLE_CACHE | 131 | #define DO_ENABLE_CACHE |
198 | 132 | ||
@@ -224,12 +158,6 @@ void __init plat_mem_setup(void) | |||
224 | /* Reboot on panic */ | 158 | /* Reboot on panic */ |
225 | panic_timeout = 180; | 159 | panic_timeout = 180; |
226 | 160 | ||
227 | { | ||
228 | unsigned int conf; | ||
229 | conf = read_c0_conf(); | ||
230 | } | ||
231 | |||
232 | #if 1 | ||
233 | /* cache setup */ | 161 | /* cache setup */ |
234 | { | 162 | { |
235 | unsigned int conf; | 163 | unsigned int conf; |
@@ -256,16 +184,14 @@ void __init plat_mem_setup(void) | |||
256 | write_c0_conf(conf); | 184 | write_c0_conf(conf); |
257 | write_c0_cache(0); | 185 | write_c0_cache(0); |
258 | } | 186 | } |
259 | #endif | ||
260 | 187 | ||
261 | /* initialize board */ | 188 | /* initialize board */ |
262 | jmr3927_board_init(); | 189 | jmr3927_board_init(); |
263 | 190 | ||
264 | argptr = prom_getcmdline(); | 191 | argptr = prom_getcmdline(); |
265 | 192 | ||
266 | if ((argptr = strstr(argptr, "toeon")) != NULL) { | 193 | if ((argptr = strstr(argptr, "toeon")) != NULL) |
267 | jmr3927_ccfg_toeon = 1; | 194 | jmr3927_ccfg_toeon = 1; |
268 | } | ||
269 | argptr = prom_getcmdline(); | 195 | argptr = prom_getcmdline(); |
270 | if ((argptr = strstr(argptr, "ip=")) == NULL) { | 196 | if ((argptr = strstr(argptr, "ip=")) == NULL) { |
271 | argptr = prom_getcmdline(); | 197 | argptr = prom_getcmdline(); |
@@ -281,7 +207,7 @@ void __init plat_mem_setup(void) | |||
281 | memset(&req, 0, sizeof(req)); | 207 | memset(&req, 0, sizeof(req)); |
282 | req.line = i; | 208 | req.line = i; |
283 | req.iotype = UPIO_MEM; | 209 | req.iotype = UPIO_MEM; |
284 | req.membase = (char *)TX3927_SIO_REG(i); | 210 | req.membase = (unsigned char __iomem *)TX3927_SIO_REG(i); |
285 | req.mapbase = TX3927_SIO_REG(i); | 211 | req.mapbase = TX3927_SIO_REG(i); |
286 | req.irq = i == 0 ? | 212 | req.irq = i == 0 ? |
287 | JMR3927_IRQ_IRC_SIO0 : JMR3927_IRQ_IRC_SIO1; | 213 | JMR3927_IRQ_IRC_SIO0 : JMR3927_IRQ_IRC_SIO1; |
@@ -303,65 +229,33 @@ void __init plat_mem_setup(void) | |||
303 | 229 | ||
304 | static void tx3927_setup(void); | 230 | static void tx3927_setup(void); |
305 | 231 | ||
306 | #ifdef CONFIG_PCI | ||
307 | unsigned long mips_pci_io_base; | ||
308 | unsigned long mips_pci_io_size; | ||
309 | unsigned long mips_pci_mem_base; | ||
310 | unsigned long mips_pci_mem_size; | ||
311 | /* for legacy I/O, PCI I/O PCI Bus address must be 0 */ | ||
312 | unsigned long mips_pci_io_pciaddr = 0; | ||
313 | #endif | ||
314 | |||
315 | static void __init jmr3927_board_init(void) | 232 | static void __init jmr3927_board_init(void) |
316 | { | 233 | { |
317 | char *argptr; | ||
318 | |||
319 | #ifdef CONFIG_PCI | ||
320 | mips_pci_io_base = JMR3927_PCIIO; | ||
321 | mips_pci_io_size = JMR3927_PCIIO_SIZE; | ||
322 | mips_pci_mem_base = JMR3927_PCIMEM; | ||
323 | mips_pci_mem_size = JMR3927_PCIMEM_SIZE; | ||
324 | #endif | ||
325 | |||
326 | tx3927_setup(); | 234 | tx3927_setup(); |
327 | 235 | ||
328 | if (jmr3927_have_isac()) { | ||
329 | |||
330 | #ifdef CONFIG_FB_E1355 | ||
331 | argptr = prom_getcmdline(); | ||
332 | if ((argptr = strstr(argptr, "video=")) == NULL) { | ||
333 | argptr = prom_getcmdline(); | ||
334 | strcat(argptr, " video=e1355fb:crt16h"); | ||
335 | } | ||
336 | #endif | ||
337 | |||
338 | #ifdef CONFIG_BLK_DEV_IDE | ||
339 | /* overrides PCI-IDE */ | ||
340 | #endif | ||
341 | } | ||
342 | |||
343 | /* SIO0 DTR on */ | 236 | /* SIO0 DTR on */ |
344 | jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR); | 237 | jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR); |
345 | 238 | ||
346 | jmr3927_led_set(0); | 239 | jmr3927_led_set(0); |
347 | 240 | ||
348 | |||
349 | if (jmr3927_have_isac()) | ||
350 | jmr3927_io_led_set(0); | ||
351 | printk("JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n", | 241 | printk("JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n", |
352 | jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK, | 242 | jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK, |
353 | jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK, | 243 | jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK, |
354 | jmr3927_dipsw1(), jmr3927_dipsw2(), | 244 | jmr3927_dipsw1(), jmr3927_dipsw2(), |
355 | jmr3927_dipsw3(), jmr3927_dipsw4()); | 245 | jmr3927_dipsw3(), jmr3927_dipsw4()); |
356 | if (jmr3927_have_isac()) | ||
357 | printk("JMI-3927IO2 --- ISAC(Rev %d) DIPSW:%01x\n", | ||
358 | jmr3927_isac_reg_in(JMR3927_ISAC_REV_ADDR) & JMR3927_REV_MASK, | ||
359 | jmr3927_io_dipsw()); | ||
360 | } | 246 | } |
361 | 247 | ||
362 | void __init tx3927_setup(void) | 248 | static void __init tx3927_setup(void) |
363 | { | 249 | { |
364 | int i; | 250 | int i; |
251 | #ifdef CONFIG_PCI | ||
252 | unsigned long mips_pci_io_base = JMR3927_PCIIO; | ||
253 | unsigned long mips_pci_io_size = JMR3927_PCIIO_SIZE; | ||
254 | unsigned long mips_pci_mem_base = JMR3927_PCIMEM; | ||
255 | unsigned long mips_pci_mem_size = JMR3927_PCIMEM_SIZE; | ||
256 | /* for legacy I/O, PCI I/O PCI Bus address must be 0 */ | ||
257 | unsigned long mips_pci_io_pciaddr = 0; | ||
258 | #endif | ||
365 | 259 | ||
366 | /* SDRAMC are configured by PROM */ | 260 | /* SDRAMC are configured by PROM */ |
367 | 261 | ||
@@ -475,10 +369,8 @@ void __init tx3927_setup(void) | |||
475 | tx3927_pcicptr->mbas = ~(mips_pci_mem_size - 1); | 369 | tx3927_pcicptr->mbas = ~(mips_pci_mem_size - 1); |
476 | tx3927_pcicptr->mba = 0; | 370 | tx3927_pcicptr->mba = 0; |
477 | tx3927_pcicptr->tlbmma = 0; | 371 | tx3927_pcicptr->tlbmma = 0; |
478 | #ifndef JMR3927_INIT_INDIRECT_PCI | ||
479 | /* Enable Direct mapping Address Space Decoder */ | 372 | /* Enable Direct mapping Address Space Decoder */ |
480 | tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_ILMDE | TX3927_PCIC_LBC_ILIDE; | 373 | tx3927_pcicptr->lbc |= TX3927_PCIC_LBC_ILMDE | TX3927_PCIC_LBC_ILIDE; |
481 | #endif | ||
482 | 374 | ||
483 | /* Clear All Local Bus Status */ | 375 | /* Clear All Local Bus Status */ |
484 | tx3927_pcicptr->lbstat = TX3927_PCIC_LBIM_ALL; | 376 | tx3927_pcicptr->lbstat = TX3927_PCIC_LBIM_ALL; |
@@ -491,22 +383,15 @@ void __init tx3927_setup(void) | |||
491 | 383 | ||
492 | /* PCIC Int => IRC IRQ10 */ | 384 | /* PCIC Int => IRC IRQ10 */ |
493 | tx3927_pcicptr->il = TX3927_IR_PCI; | 385 | tx3927_pcicptr->il = TX3927_IR_PCI; |
494 | #if 1 | ||
495 | /* Target Control (per errata) */ | 386 | /* Target Control (per errata) */ |
496 | tx3927_pcicptr->tc = TX3927_PCIC_TC_OF8E | TX3927_PCIC_TC_IF8E; | 387 | tx3927_pcicptr->tc = TX3927_PCIC_TC_OF8E | TX3927_PCIC_TC_IF8E; |
497 | #endif | ||
498 | 388 | ||
499 | /* Enable Bus Arbiter */ | 389 | /* Enable Bus Arbiter */ |
500 | #if 0 | ||
501 | tx3927_pcicptr->req_trace = 0x73737373; | ||
502 | #endif | ||
503 | tx3927_pcicptr->pbapmc = TX3927_PCIC_PBAPMC_PBAEN; | 390 | tx3927_pcicptr->pbapmc = TX3927_PCIC_PBAPMC_PBAEN; |
504 | 391 | ||
505 | tx3927_pcicptr->pcicmd = PCI_COMMAND_MASTER | | 392 | tx3927_pcicptr->pcicmd = PCI_COMMAND_MASTER | |
506 | PCI_COMMAND_MEMORY | | 393 | PCI_COMMAND_MEMORY | |
507 | #if 1 | ||
508 | PCI_COMMAND_IO | | 394 | PCI_COMMAND_IO | |
509 | #endif | ||
510 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR; | 395 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR; |
511 | } | 396 | } |
512 | #endif /* CONFIG_PCI */ | 397 | #endif /* CONFIG_PCI */ |
@@ -555,8 +440,6 @@ static int __init jmr3927_rtc_init(void) | |||
555 | .flags = IORESOURCE_MEM, | 440 | .flags = IORESOURCE_MEM, |
556 | }; | 441 | }; |
557 | struct platform_device *dev; | 442 | struct platform_device *dev; |
558 | if (!jmr3927_have_nvram()) | ||
559 | return -ENODEV; | ||
560 | dev = platform_device_register_simple("ds1742", -1, &res, 1); | 443 | dev = platform_device_register_simple("ds1742", -1, &res, 1); |
561 | return IS_ERR(dev) ? PTR_ERR(dev) : 0; | 444 | return IS_ERR(dev) ? PTR_ERR(dev) : 0; |
562 | } | 445 | } |
diff --git a/arch/mips/pci/fixup-jmr3927.c b/arch/mips/pci/fixup-jmr3927.c index 6e72d213f4cd..73d18503517c 100644 --- a/arch/mips/pci/fixup-jmr3927.c +++ b/arch/mips/pci/fixup-jmr3927.c | |||
@@ -29,7 +29,6 @@ | |||
29 | */ | 29 | */ |
30 | #include <linux/types.h> | 30 | #include <linux/types.h> |
31 | #include <linux/pci.h> | 31 | #include <linux/pci.h> |
32 | #include <linux/kernel.h> | ||
33 | #include <linux/init.h> | 32 | #include <linux/init.h> |
34 | 33 | ||
35 | #include <asm/jmr3927/jmr3927.h> | 34 | #include <asm/jmr3927/jmr3927.h> |
@@ -81,14 +80,8 @@ int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin) | |||
81 | 80 | ||
82 | /* Check OnBoard Ethernet (IDSEL=A24, DevNu=13) */ | 81 | /* Check OnBoard Ethernet (IDSEL=A24, DevNu=13) */ |
83 | if (dev->bus->parent == NULL && | 82 | if (dev->bus->parent == NULL && |
84 | slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24)) { | 83 | slot == TX3927_PCIC_IDSEL_AD_TO_SLOT(24)) |
85 | extern int jmr3927_ether1_irq; | 84 | irq = JMR3927_IRQ_ETHER0; |
86 | /* check this irq line was reserved for ether1 */ | ||
87 | if (jmr3927_ether1_irq != JMR3927_IRQ_ETHER0) | ||
88 | irq = JMR3927_IRQ_ETHER0; | ||
89 | else | ||
90 | irq = 0; /* disable */ | ||
91 | } | ||
92 | return irq; | 85 | return irq; |
93 | } | 86 | } |
94 | 87 | ||
diff --git a/arch/mips/pci/ops-tx3927.c b/arch/mips/pci/ops-tx3927.c index 42530a0b84b3..aa698bd0d5e3 100644 --- a/arch/mips/pci/ops-tx3927.c +++ b/arch/mips/pci/ops-tx3927.c | |||
@@ -40,7 +40,6 @@ | |||
40 | 40 | ||
41 | #include <asm/addrspace.h> | 41 | #include <asm/addrspace.h> |
42 | #include <asm/jmr3927/jmr3927.h> | 42 | #include <asm/jmr3927/jmr3927.h> |
43 | #include <asm/debug.h> | ||
44 | 43 | ||
45 | static inline int mkaddr(unsigned char bus, unsigned char dev_fn, | 44 | static inline int mkaddr(unsigned char bus, unsigned char dev_fn, |
46 | unsigned char where) | 45 | unsigned char where) |
@@ -130,234 +129,3 @@ struct pci_ops jmr3927_pci_ops = { | |||
130 | jmr3927_pci_read_config, | 129 | jmr3927_pci_read_config, |
131 | jmr3927_pci_write_config, | 130 | jmr3927_pci_write_config, |
132 | }; | 131 | }; |
133 | |||
134 | |||
135 | #ifndef JMR3927_INIT_INDIRECT_PCI | ||
136 | |||
137 | inline unsigned long tc_readl(volatile __u32 * addr) | ||
138 | { | ||
139 | return readl(addr); | ||
140 | } | ||
141 | |||
142 | inline void tc_writel(unsigned long data, volatile __u32 * addr) | ||
143 | { | ||
144 | writel(data, addr); | ||
145 | } | ||
146 | #else | ||
147 | |||
148 | unsigned long tc_readl(volatile __u32 * addr) | ||
149 | { | ||
150 | unsigned long val; | ||
151 | |||
152 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr = | ||
153 | (unsigned long) CPHYSADDR(addr); | ||
154 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe = | ||
155 | (PCI_IPCIBE_ICMD_MEMREAD << PCI_IPCIBE_ICMD_SHIFT) | | ||
156 | PCI_IPCIBE_IBE_LONG; | ||
157 | while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); | ||
158 | val = | ||
159 | le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr-> | ||
160 | ipcidata); | ||
161 | /* clear by setting */ | ||
162 | tx3927_pcicptr->istat |= PCI_ISTAT_IDICC; | ||
163 | return val; | ||
164 | } | ||
165 | |||
166 | void tc_writel(unsigned long data, volatile __u32 * addr) | ||
167 | { | ||
168 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = | ||
169 | cpu_to_le32(data); | ||
170 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr = | ||
171 | (unsigned long) CPHYSADDR(addr); | ||
172 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe = | ||
173 | (PCI_IPCIBE_ICMD_MEMWRITE << PCI_IPCIBE_ICMD_SHIFT) | | ||
174 | PCI_IPCIBE_IBE_LONG; | ||
175 | while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); | ||
176 | /* clear by setting */ | ||
177 | tx3927_pcicptr->istat |= PCI_ISTAT_IDICC; | ||
178 | } | ||
179 | |||
180 | unsigned char tx_ioinb(unsigned char *addr) | ||
181 | { | ||
182 | unsigned long val; | ||
183 | __u32 ioaddr; | ||
184 | int offset; | ||
185 | int byte; | ||
186 | |||
187 | ioaddr = (unsigned long) addr; | ||
188 | offset = ioaddr & 0x3; | ||
189 | byte = 0xf & ~(8 >> offset); | ||
190 | |||
191 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr = | ||
192 | (unsigned long) ioaddr; | ||
193 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe = | ||
194 | (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte; | ||
195 | while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); | ||
196 | val = | ||
197 | le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr-> | ||
198 | ipcidata); | ||
199 | val = val & 0xff; | ||
200 | /* clear by setting */ | ||
201 | tx3927_pcicptr->istat |= PCI_ISTAT_IDICC; | ||
202 | return val; | ||
203 | } | ||
204 | |||
205 | void tx_iooutb(unsigned long data, unsigned char *addr) | ||
206 | { | ||
207 | __u32 ioaddr; | ||
208 | int offset; | ||
209 | int byte; | ||
210 | |||
211 | data = data | (data << 8) | (data << 16) | (data << 24); | ||
212 | ioaddr = (unsigned long) addr; | ||
213 | offset = ioaddr & 0x3; | ||
214 | byte = 0xf & ~(8 >> offset); | ||
215 | |||
216 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = data; | ||
217 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr = | ||
218 | (unsigned long) ioaddr; | ||
219 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe = | ||
220 | (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte; | ||
221 | while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); | ||
222 | /* clear by setting */ | ||
223 | tx3927_pcicptr->istat |= PCI_ISTAT_IDICC; | ||
224 | } | ||
225 | |||
226 | unsigned short tx_ioinw(unsigned short *addr) | ||
227 | { | ||
228 | unsigned long val; | ||
229 | __u32 ioaddr; | ||
230 | int offset; | ||
231 | int byte; | ||
232 | |||
233 | ioaddr = (unsigned long) addr; | ||
234 | offset = ioaddr & 0x2; | ||
235 | byte = 3 << offset; | ||
236 | |||
237 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr = | ||
238 | (unsigned long) ioaddr; | ||
239 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe = | ||
240 | (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | byte; | ||
241 | while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); | ||
242 | val = | ||
243 | le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr-> | ||
244 | ipcidata); | ||
245 | val = val & 0xffff; | ||
246 | /* clear by setting */ | ||
247 | tx3927_pcicptr->istat |= PCI_ISTAT_IDICC; | ||
248 | return val; | ||
249 | |||
250 | } | ||
251 | |||
252 | void tx_iooutw(unsigned long data, unsigned short *addr) | ||
253 | { | ||
254 | __u32 ioaddr; | ||
255 | int offset; | ||
256 | int byte; | ||
257 | |||
258 | data = data | (data << 16); | ||
259 | ioaddr = (unsigned long) addr; | ||
260 | offset = ioaddr & 0x2; | ||
261 | byte = 3 << offset; | ||
262 | |||
263 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = data; | ||
264 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr = | ||
265 | (unsigned long) ioaddr; | ||
266 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe = | ||
267 | (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | byte; | ||
268 | while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); | ||
269 | /* clear by setting */ | ||
270 | tx3927_pcicptr->istat |= PCI_ISTAT_IDICC; | ||
271 | } | ||
272 | |||
273 | unsigned long tx_ioinl(unsigned int *addr) | ||
274 | { | ||
275 | unsigned long val; | ||
276 | __u32 ioaddr; | ||
277 | |||
278 | ioaddr = (unsigned long) addr; | ||
279 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr = | ||
280 | (unsigned long) ioaddr; | ||
281 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe = | ||
282 | (PCI_IPCIBE_ICMD_IOREAD << PCI_IPCIBE_ICMD_SHIFT) | | ||
283 | PCI_IPCIBE_IBE_LONG; | ||
284 | while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); | ||
285 | val = | ||
286 | le32_to_cpu(*(volatile u32 *) (unsigned long) & tx3927_pcicptr-> | ||
287 | ipcidata); | ||
288 | /* clear by setting */ | ||
289 | tx3927_pcicptr->istat |= PCI_ISTAT_IDICC; | ||
290 | return val; | ||
291 | } | ||
292 | |||
293 | void tx_iooutl(unsigned long data, unsigned int *addr) | ||
294 | { | ||
295 | __u32 ioaddr; | ||
296 | |||
297 | ioaddr = (unsigned long) addr; | ||
298 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcidata = | ||
299 | cpu_to_le32(data); | ||
300 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipciaddr = | ||
301 | (unsigned long) ioaddr; | ||
302 | *(volatile u32 *) (unsigned long) & tx3927_pcicptr->ipcibe = | ||
303 | (PCI_IPCIBE_ICMD_IOWRITE << PCI_IPCIBE_ICMD_SHIFT) | | ||
304 | PCI_IPCIBE_IBE_LONG; | ||
305 | while (!(tx3927_pcicptr->istat & PCI_ISTAT_IDICC)); | ||
306 | /* clear by setting */ | ||
307 | tx3927_pcicptr->istat |= PCI_ISTAT_IDICC; | ||
308 | } | ||
309 | |||
310 | void tx_insbyte(unsigned char *addr, void *buffer, unsigned int count) | ||
311 | { | ||
312 | unsigned char *ptr = (unsigned char *) buffer; | ||
313 | |||
314 | while (count--) { | ||
315 | *ptr++ = tx_ioinb(addr); | ||
316 | } | ||
317 | } | ||
318 | |||
319 | void tx_insword(unsigned short *addr, void *buffer, unsigned int count) | ||
320 | { | ||
321 | unsigned short *ptr = (unsigned short *) buffer; | ||
322 | |||
323 | while (count--) { | ||
324 | *ptr++ = tx_ioinw(addr); | ||
325 | } | ||
326 | } | ||
327 | |||
328 | void tx_inslong(unsigned int *addr, void *buffer, unsigned int count) | ||
329 | { | ||
330 | unsigned long *ptr = (unsigned long *) buffer; | ||
331 | |||
332 | while (count--) { | ||
333 | *ptr++ = tx_ioinl(addr); | ||
334 | } | ||
335 | } | ||
336 | |||
337 | void tx_outsbyte(unsigned char *addr, void *buffer, unsigned int count) | ||
338 | { | ||
339 | unsigned char *ptr = (unsigned char *) buffer; | ||
340 | |||
341 | while (count--) { | ||
342 | tx_iooutb(*ptr++, addr); | ||
343 | } | ||
344 | } | ||
345 | |||
346 | void tx_outsword(unsigned short *addr, void *buffer, unsigned int count) | ||
347 | { | ||
348 | unsigned short *ptr = (unsigned short *) buffer; | ||
349 | |||
350 | while (count--) { | ||
351 | tx_iooutw(*ptr++, addr); | ||
352 | } | ||
353 | } | ||
354 | |||
355 | void tx_outslong(unsigned int *addr, void *buffer, unsigned int count) | ||
356 | { | ||
357 | unsigned long *ptr = (unsigned long *) buffer; | ||
358 | |||
359 | while (count--) { | ||
360 | tx_iooutl(*ptr++, addr); | ||
361 | } | ||
362 | } | ||
363 | #endif | ||
diff --git a/include/asm-mips/jmr3927/irq.h b/include/asm-mips/jmr3927/irq.h deleted file mode 100644 index e3e7ed38da6c..000000000000 --- a/include/asm-mips/jmr3927/irq.h +++ /dev/null | |||
@@ -1,57 +0,0 @@ | |||
1 | /* | ||
2 | * linux/include/asm-mips/tx3927/irq.h | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | * | ||
8 | * Copyright (C) 2001 Toshiba Corporation | ||
9 | */ | ||
10 | #ifndef __ASM_TX3927_IRQ_H | ||
11 | #define __ASM_TX3927_IRQ_H | ||
12 | |||
13 | #ifndef __ASSEMBLY__ | ||
14 | |||
15 | #include <asm/irq.h> | ||
16 | |||
17 | struct tb_irq_space { | ||
18 | struct tb_irq_space* next; | ||
19 | int start_irqno; | ||
20 | int nr_irqs; | ||
21 | void (*mask_func)(int irq_nr, int space_id); | ||
22 | void (*unmask_func)(int irq_no, int space_id); | ||
23 | const char *name; | ||
24 | int space_id; | ||
25 | int can_share; | ||
26 | }; | ||
27 | extern struct tb_irq_space* tb_irq_spaces; | ||
28 | |||
29 | static __inline__ void add_tb_irq_space(struct tb_irq_space* sp) | ||
30 | { | ||
31 | sp->next = tb_irq_spaces; | ||
32 | tb_irq_spaces = sp; | ||
33 | } | ||
34 | |||
35 | |||
36 | struct pt_regs; | ||
37 | extern void | ||
38 | toshibaboards_spurious(struct pt_regs *regs, int irq); | ||
39 | extern void | ||
40 | toshibaboards_irqdispatch(struct pt_regs *regs, int irq); | ||
41 | |||
42 | extern struct irqaction * | ||
43 | toshibaboards_get_irq_action(int irq); | ||
44 | extern int | ||
45 | toshibaboards_setup_irq(int irq, struct irqaction * new); | ||
46 | |||
47 | |||
48 | extern int (*toshibaboards_gen_iack)(void); | ||
49 | |||
50 | #endif /* !__ASSEMBLY__ */ | ||
51 | |||
52 | #define NR_ISA_IRQS 16 | ||
53 | #define TB_IRQ_IS_ISA(irq) \ | ||
54 | (0 <= (irq) && (irq) < NR_ISA_IRQS) | ||
55 | #define TB_IRQ_TO_ISA_IRQ(irq) (irq) | ||
56 | |||
57 | #endif /* __ASM_TX3927_IRQ_H */ | ||
diff --git a/include/asm-mips/jmr3927/jmr3927.h b/include/asm-mips/jmr3927/jmr3927.h index c50e68ffa3af..958e29706e2d 100644 --- a/include/asm-mips/jmr3927/jmr3927.h +++ b/include/asm-mips/jmr3927/jmr3927.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Defines for the TJSYS JMR-TX3927/JMI-3927IO2/JMY-1394IF. | 2 | * Defines for the TJSYS JMR-TX3927 |
3 | * | 3 | * |
4 | * This file is subject to the terms and conditions of the GNU General Public | 4 | * This file is subject to the terms and conditions of the GNU General Public |
5 | * License. See the file "COPYING" in the main directory of this archive | 5 | * License. See the file "COPYING" in the main directory of this archive |
@@ -12,10 +12,7 @@ | |||
12 | 12 | ||
13 | #include <asm/jmr3927/tx3927.h> | 13 | #include <asm/jmr3927/tx3927.h> |
14 | #include <asm/addrspace.h> | 14 | #include <asm/addrspace.h> |
15 | #include <asm/jmr3927/irq.h> | ||
16 | #ifndef __ASSEMBLY__ | ||
17 | #include <asm/system.h> | 15 | #include <asm/system.h> |
18 | #endif | ||
19 | 16 | ||
20 | /* CS */ | 17 | /* CS */ |
21 | #define JMR3927_ROMCE0 0x1fc00000 /* 4M */ | 18 | #define JMR3927_ROMCE0 0x1fc00000 /* 4M */ |
@@ -35,28 +32,10 @@ | |||
35 | #define JMR3927_SDRAM_SIZE 0x02000000 /* 32M */ | 32 | #define JMR3927_SDRAM_SIZE 0x02000000 /* 32M */ |
36 | #define JMR3927_PORT_BASE KSEG1 | 33 | #define JMR3927_PORT_BASE KSEG1 |
37 | 34 | ||
38 | /* select indirect initiator access per errata */ | ||
39 | #define JMR3927_INIT_INDIRECT_PCI | ||
40 | #define PCI_ISTAT_IDICC 0x1000 | ||
41 | #define PCI_IPCIBE_IBE_LONG 0 | ||
42 | #define PCI_IPCIBE_ICMD_IOREAD 2 | ||
43 | #define PCI_IPCIBE_ICMD_IOWRITE 3 | ||
44 | #define PCI_IPCIBE_ICMD_MEMREAD 6 | ||
45 | #define PCI_IPCIBE_ICMD_MEMWRITE 7 | ||
46 | #define PCI_IPCIBE_ICMD_SHIFT 4 | ||
47 | |||
48 | /* Address map (virtual address) */ | 35 | /* Address map (virtual address) */ |
49 | #define JMR3927_ROM0_BASE (KSEG1 + JMR3927_ROMCE0) | 36 | #define JMR3927_ROM0_BASE (KSEG1 + JMR3927_ROMCE0) |
50 | #define JMR3927_ROM1_BASE (KSEG1 + JMR3927_ROMCE1) | 37 | #define JMR3927_ROM1_BASE (KSEG1 + JMR3927_ROMCE1) |
51 | #define JMR3927_IOC_BASE (KSEG1 + JMR3927_ROMCE2) | 38 | #define JMR3927_IOC_BASE (KSEG1 + JMR3927_ROMCE2) |
52 | #define JMR3927_IOB_BASE (KSEG1 + JMR3927_ROMCE3) | ||
53 | #define JMR3927_ISAMEM_BASE (JMR3927_IOB_BASE) | ||
54 | #define JMR3927_ISAIO_BASE (JMR3927_IOB_BASE + 0x01000000) | ||
55 | #define JMR3927_ISAC_BASE (JMR3927_IOB_BASE + 0x02000000) | ||
56 | #define JMR3927_LCDVGA_REG_BASE (JMR3927_IOB_BASE + 0x03000000) | ||
57 | #define JMR3927_LCDVGA_MEM_BASE (JMR3927_IOB_BASE + 0x03800000) | ||
58 | #define JMR3927_JMY1394_BASE (KSEG1 + JMR3927_ROMCE5) | ||
59 | #define JMR3927_PREMIER3_BASE (JMR3927_JMY1394_BASE + 0x00100000) | ||
60 | #define JMR3927_PCIMEM_BASE (KSEG1 + JMR3927_PCIMEM) | 39 | #define JMR3927_PCIMEM_BASE (KSEG1 + JMR3927_PCIMEM) |
61 | #define JMR3927_PCIIO_BASE (KSEG1 + JMR3927_PCIIO) | 40 | #define JMR3927_PCIIO_BASE (KSEG1 + JMR3927_PCIIO) |
62 | 41 | ||
@@ -72,25 +51,14 @@ | |||
72 | #define JMR3927_IOC_INTP_ADDR (JMR3927_IOC_BASE + 0x000b0000) | 51 | #define JMR3927_IOC_INTP_ADDR (JMR3927_IOC_BASE + 0x000b0000) |
73 | #define JMR3927_IOC_RESET_ADDR (JMR3927_IOC_BASE + 0x000f0000) | 52 | #define JMR3927_IOC_RESET_ADDR (JMR3927_IOC_BASE + 0x000f0000) |
74 | 53 | ||
75 | #define JMR3927_ISAC_REV_ADDR (JMR3927_ISAC_BASE + 0x00000000) | ||
76 | #define JMR3927_ISAC_EINTS_ADDR (JMR3927_ISAC_BASE + 0x00200000) | ||
77 | #define JMR3927_ISAC_EINTM_ADDR (JMR3927_ISAC_BASE + 0x00300000) | ||
78 | #define JMR3927_ISAC_NMI_ADDR (JMR3927_ISAC_BASE + 0x00400000) | ||
79 | #define JMR3927_ISAC_LED_ADDR (JMR3927_ISAC_BASE + 0x00500000) | ||
80 | #define JMR3927_ISAC_INTP_ADDR (JMR3927_ISAC_BASE + 0x00800000) | ||
81 | #define JMR3927_ISAC_INTS1_ADDR (JMR3927_ISAC_BASE + 0x00900000) | ||
82 | #define JMR3927_ISAC_INTS2_ADDR (JMR3927_ISAC_BASE + 0x00a00000) | ||
83 | #define JMR3927_ISAC_INTM_ADDR (JMR3927_ISAC_BASE + 0x00b00000) | ||
84 | |||
85 | /* Flash ROM */ | 54 | /* Flash ROM */ |
86 | #define JMR3927_FLASH_BASE (JMR3927_ROM0_BASE) | 55 | #define JMR3927_FLASH_BASE (JMR3927_ROM0_BASE) |
87 | #define JMR3927_FLASH_SIZE 0x00400000 | 56 | #define JMR3927_FLASH_SIZE 0x00400000 |
88 | 57 | ||
89 | /* bits for IOC_REV/IOC_BREV/ISAC_REV (high byte) */ | 58 | /* bits for IOC_REV/IOC_BREV (high byte) */ |
90 | #define JMR3927_IDT_MASK 0xfc | 59 | #define JMR3927_IDT_MASK 0xfc |
91 | #define JMR3927_REV_MASK 0x03 | 60 | #define JMR3927_REV_MASK 0x03 |
92 | #define JMR3927_IOC_IDT 0xe0 | 61 | #define JMR3927_IOC_IDT 0xe0 |
93 | #define JMR3927_ISAC_IDT 0x20 | ||
94 | 62 | ||
95 | /* bits for IOC_INTS1/IOC_INTS2/IOC_INTM/IOC_INTP (high byte) */ | 63 | /* bits for IOC_INTS1/IOC_INTS2/IOC_INTM/IOC_INTP (high byte) */ |
96 | #define JMR3927_IOC_INTB_PCIA 0 | 64 | #define JMR3927_IOC_INTB_PCIA 0 |
@@ -114,40 +82,6 @@ | |||
114 | #define JMR3927_IOC_RESET_CPU 1 | 82 | #define JMR3927_IOC_RESET_CPU 1 |
115 | #define JMR3927_IOC_RESET_PCI 2 | 83 | #define JMR3927_IOC_RESET_PCI 2 |
116 | 84 | ||
117 | /* bits for ISAC_EINTS/ISAC_EINTM (high byte) */ | ||
118 | #define JMR3927_ISAC_EINTB_IOCHK 2 | ||
119 | #define JMR3927_ISAC_EINTB_BWTH 4 | ||
120 | #define JMR3927_ISAC_EINTF_IOCHK (1 << JMR3927_ISAC_EINTB_IOCHK) | ||
121 | #define JMR3927_ISAC_EINTF_BWTH (1 << JMR3927_ISAC_EINTB_BWTH) | ||
122 | |||
123 | /* bits for ISAC_LED (high byte) */ | ||
124 | #define JMR3927_ISAC_LED_ISALED 0x01 | ||
125 | #define JMR3927_ISAC_LED_USRLED 0x02 | ||
126 | |||
127 | /* bits for ISAC_INTS/ISAC_INTM/ISAC_INTP (high byte) */ | ||
128 | #define JMR3927_ISAC_INTB_IRQ5 0 | ||
129 | #define JMR3927_ISAC_INTB_IRQKB 1 | ||
130 | #define JMR3927_ISAC_INTB_IRQMOUSE 2 | ||
131 | #define JMR3927_ISAC_INTB_IRQ4 3 | ||
132 | #define JMR3927_ISAC_INTB_IRQ12 4 | ||
133 | #define JMR3927_ISAC_INTB_IRQ3 5 | ||
134 | #define JMR3927_ISAC_INTB_IRQ10 6 | ||
135 | #define JMR3927_ISAC_INTB_ISAER 7 | ||
136 | #define JMR3927_ISAC_INTF_IRQ5 (1 << JMR3927_ISAC_INTB_IRQ5) | ||
137 | #define JMR3927_ISAC_INTF_IRQKB (1 << JMR3927_ISAC_INTB_IRQKB) | ||
138 | #define JMR3927_ISAC_INTF_IRQMOUSE (1 << JMR3927_ISAC_INTB_IRQMOUSE) | ||
139 | #define JMR3927_ISAC_INTF_IRQ4 (1 << JMR3927_ISAC_INTB_IRQ4) | ||
140 | #define JMR3927_ISAC_INTF_IRQ12 (1 << JMR3927_ISAC_INTB_IRQ12) | ||
141 | #define JMR3927_ISAC_INTF_IRQ3 (1 << JMR3927_ISAC_INTB_IRQ3) | ||
142 | #define JMR3927_ISAC_INTF_IRQ10 (1 << JMR3927_ISAC_INTB_IRQ10) | ||
143 | #define JMR3927_ISAC_INTF_ISAER (1 << JMR3927_ISAC_INTB_ISAER) | ||
144 | |||
145 | #ifndef __ASSEMBLY__ | ||
146 | |||
147 | #if 0 | ||
148 | #define jmr3927_ioc_reg_out(d, a) ((*(volatile unsigned short *)(a)) = (d) << 8) | ||
149 | #define jmr3927_ioc_reg_in(a) (((*(volatile unsigned short *)(a)) >> 8) & 0xff) | ||
150 | #else | ||
151 | #if defined(__BIG_ENDIAN) | 85 | #if defined(__BIG_ENDIAN) |
152 | #define jmr3927_ioc_reg_out(d, a) ((*(volatile unsigned char *)(a)) = (d)) | 86 | #define jmr3927_ioc_reg_out(d, a) ((*(volatile unsigned char *)(a)) = (d)) |
153 | #define jmr3927_ioc_reg_in(a) (*(volatile unsigned char *)(a)) | 87 | #define jmr3927_ioc_reg_in(a) (*(volatile unsigned char *)(a)) |
@@ -157,31 +91,9 @@ | |||
157 | #else | 91 | #else |
158 | #error "No Endian" | 92 | #error "No Endian" |
159 | #endif | 93 | #endif |
160 | #endif | ||
161 | #define jmr3927_isac_reg_out(d, a) ((*(volatile unsigned char *)(a)) = (d)) | ||
162 | #define jmr3927_isac_reg_in(a) (*(volatile unsigned char *)(a)) | ||
163 | |||
164 | static inline int jmr3927_have_isac(void) | ||
165 | { | ||
166 | unsigned char idt; | ||
167 | unsigned long flags; | ||
168 | unsigned long romcr3; | ||
169 | |||
170 | local_irq_save(flags); | ||
171 | romcr3 = tx3927_romcptr->cr[3]; | ||
172 | tx3927_romcptr->cr[3] &= 0xffffefff; /* do not wait infinitely */ | ||
173 | idt = jmr3927_isac_reg_in(JMR3927_ISAC_REV_ADDR) & JMR3927_IDT_MASK; | ||
174 | tx3927_romcptr->cr[3] = romcr3; | ||
175 | local_irq_restore(flags); | ||
176 | |||
177 | return idt == JMR3927_ISAC_IDT; | ||
178 | } | ||
179 | #define jmr3927_have_nvram() \ | ||
180 | ((jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_IDT_MASK) == JMR3927_IOC_IDT) | ||
181 | 94 | ||
182 | /* LED macro */ | 95 | /* LED macro */ |
183 | #define jmr3927_led_set(n/*0-16*/) jmr3927_ioc_reg_out(~(n), JMR3927_IOC_LED_ADDR) | 96 | #define jmr3927_led_set(n/*0-16*/) jmr3927_ioc_reg_out(~(n), JMR3927_IOC_LED_ADDR) |
184 | #define jmr3927_io_led_set(n/*0-3*/) jmr3927_isac_reg_out((n), JMR3927_ISAC_LED_ADDR) | ||
185 | 97 | ||
186 | #define jmr3927_led_and_set(n/*0-16*/) jmr3927_ioc_reg_out((~(n)) & jmr3927_ioc_reg_in(JMR3927_IOC_LED_ADDR), JMR3927_IOC_LED_ADDR) | 98 | #define jmr3927_led_and_set(n/*0-16*/) jmr3927_ioc_reg_out((~(n)) & jmr3927_ioc_reg_in(JMR3927_IOC_LED_ADDR), JMR3927_IOC_LED_ADDR) |
187 | 99 | ||
@@ -190,10 +102,6 @@ static inline int jmr3927_have_isac(void) | |||
190 | #define jmr3927_dipsw2() ((tx3927_pioptr->din & (1 << 10)) == 0) | 102 | #define jmr3927_dipsw2() ((tx3927_pioptr->din & (1 << 10)) == 0) |
191 | #define jmr3927_dipsw3() ((jmr3927_ioc_reg_in(JMR3927_IOC_DIPSW_ADDR) & 2) == 0) | 103 | #define jmr3927_dipsw3() ((jmr3927_ioc_reg_in(JMR3927_IOC_DIPSW_ADDR) & 2) == 0) |
192 | #define jmr3927_dipsw4() ((jmr3927_ioc_reg_in(JMR3927_IOC_DIPSW_ADDR) & 1) == 0) | 104 | #define jmr3927_dipsw4() ((jmr3927_ioc_reg_in(JMR3927_IOC_DIPSW_ADDR) & 1) == 0) |
193 | #define jmr3927_io_dipsw() (jmr3927_isac_reg_in(JMR3927_ISAC_LED_ADDR) >> 4) | ||
194 | |||
195 | |||
196 | #endif /* !__ASSEMBLY__ */ | ||
197 | 105 | ||
198 | /* | 106 | /* |
199 | * IRQ mappings | 107 | * IRQ mappings |
@@ -206,16 +114,10 @@ static inline int jmr3927_have_isac(void) | |||
206 | */ | 114 | */ |
207 | #define JMR3927_NR_IRQ_IRC 16 /* On-Chip IRC */ | 115 | #define JMR3927_NR_IRQ_IRC 16 /* On-Chip IRC */ |
208 | #define JMR3927_NR_IRQ_IOC 8 /* PCI/MODEM/INT[6:7] */ | 116 | #define JMR3927_NR_IRQ_IOC 8 /* PCI/MODEM/INT[6:7] */ |
209 | #define JMR3927_NR_IRQ_ISAC 8 /* ISA */ | ||
210 | 117 | ||
211 | 118 | #define JMR3927_IRQ_IRC 16 | |
212 | #define JMR3927_IRQ_IRC NR_ISA_IRQS | ||
213 | #define JMR3927_IRQ_IOC (JMR3927_IRQ_IRC + JMR3927_NR_IRQ_IRC) | 119 | #define JMR3927_IRQ_IOC (JMR3927_IRQ_IRC + JMR3927_NR_IRQ_IRC) |
214 | #define JMR3927_IRQ_ISAC (JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC) | 120 | #define JMR3927_IRQ_END (JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC) |
215 | #define JMR3927_IRQ_END (JMR3927_IRQ_ISAC + JMR3927_NR_IRQ_ISAC) | ||
216 | #define JMR3927_IRQ_IS_IRC(irq) (JMR3927_IRQ_IRC <= (irq) && (irq) < JMR3927_IRQ_IOC) | ||
217 | #define JMR3927_IRQ_IS_IOC(irq) (JMR3927_IRQ_IOC <= (irq) && (irq) < JMR3927_IRQ_ISAC) | ||
218 | #define JMR3927_IRQ_IS_ISAC(irq) (JMR3927_IRQ_ISAC <= (irq) && (irq) < JMR3927_IRQ_END) | ||
219 | 121 | ||
220 | #define JMR3927_IRQ_IRC_INT0 (JMR3927_IRQ_IRC + TX3927_IR_INT0) | 122 | #define JMR3927_IRQ_IRC_INT0 (JMR3927_IRQ_IRC + TX3927_IR_INT0) |
221 | #define JMR3927_IRQ_IRC_INT1 (JMR3927_IRQ_IRC + TX3927_IR_INT1) | 123 | #define JMR3927_IRQ_IRC_INT1 (JMR3927_IRQ_IRC + TX3927_IR_INT1) |
@@ -240,37 +142,13 @@ static inline int jmr3927_have_isac(void) | |||
240 | #define JMR3927_IRQ_IOC_INT6 (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_INT6) | 142 | #define JMR3927_IRQ_IOC_INT6 (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_INT6) |
241 | #define JMR3927_IRQ_IOC_INT7 (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_INT7) | 143 | #define JMR3927_IRQ_IOC_INT7 (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_INT7) |
242 | #define JMR3927_IRQ_IOC_SOFT (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_SOFT) | 144 | #define JMR3927_IRQ_IOC_SOFT (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_SOFT) |
243 | #define JMR3927_IRQ_ISAC_IRQ5 (JMR3927_IRQ_ISAC + JMR3927_ISAC_INTB_IRQ5) | ||
244 | #define JMR3927_IRQ_ISAC_IRQKB (JMR3927_IRQ_ISAC + JMR3927_ISAC_INTB_IRQKB) | ||
245 | #define JMR3927_IRQ_ISAC_IRQMOUSE (JMR3927_IRQ_ISAC + JMR3927_ISAC_INTB_IRQMOUSE) | ||
246 | #define JMR3927_IRQ_ISAC_IRQ4 (JMR3927_IRQ_ISAC + JMR3927_ISAC_INTB_IRQ4) | ||
247 | #define JMR3927_IRQ_ISAC_IRQ12 (JMR3927_IRQ_ISAC + JMR3927_ISAC_INTB_IRQ12) | ||
248 | #define JMR3927_IRQ_ISAC_IRQ3 (JMR3927_IRQ_ISAC + JMR3927_ISAC_INTB_IRQ3) | ||
249 | #define JMR3927_IRQ_ISAC_IRQ10 (JMR3927_IRQ_ISAC + JMR3927_ISAC_INTB_IRQ10) | ||
250 | #define JMR3927_IRQ_ISAC_ISAER (JMR3927_IRQ_ISAC + JMR3927_ISAC_INTB_ISAER) | ||
251 | 145 | ||
252 | #if 0 /* auto detect */ | ||
253 | /* RTL8019AS 10M Ether (JMI-3927IO2:JPW2:1-2 Short) */ | ||
254 | #define JMR3927_IRQ_ETHER1 JMR3927_IRQ_IRC_INT0 | ||
255 | #endif | ||
256 | /* IOC (PCI, MODEM) */ | 146 | /* IOC (PCI, MODEM) */ |
257 | #define JMR3927_IRQ_IOCINT JMR3927_IRQ_IRC_INT1 | 147 | #define JMR3927_IRQ_IOCINT JMR3927_IRQ_IRC_INT1 |
258 | /* ISAC (ISA, PCMCIA, KEYBOARD, MOUSE) */ | ||
259 | #define JMR3927_IRQ_ISACINT JMR3927_IRQ_IRC_INT2 | ||
260 | /* TC35815 100M Ether (JMR-TX3912:JPW4:2-3 Short) */ | 148 | /* TC35815 100M Ether (JMR-TX3912:JPW4:2-3 Short) */ |
261 | #define JMR3927_IRQ_ETHER0 JMR3927_IRQ_IRC_INT3 | 149 | #define JMR3927_IRQ_ETHER0 JMR3927_IRQ_IRC_INT3 |
262 | /* Clock Tick (10ms) */ | 150 | /* Clock Tick (10ms) */ |
263 | #define JMR3927_IRQ_TICK JMR3927_IRQ_IRC_TMR0 | 151 | #define JMR3927_IRQ_TICK JMR3927_IRQ_IRC_TMR0 |
264 | #define JMR3927_IRQ_IDE JMR3927_IRQ_ISAC_IRQ12 | ||
265 | |||
266 | /* IEEE1394 (Note that this may conflicts with RTL8019AS 10M Ether...) */ | ||
267 | #define JMR3927_IRQ_PREMIER3 JMR3927_IRQ_IRC_INT0 | ||
268 | |||
269 | /* I/O Ports */ | ||
270 | /* RTL8019AS 10M Ether */ | ||
271 | #define JMR3927_ETHER1_PORT (JMR3927_ISAIO_BASE - JMR3927_PORT_BASE + 0x280) | ||
272 | #define JMR3927_KBD_PORT (JMR3927_ISAIO_BASE - JMR3927_PORT_BASE + 0x00800060) | ||
273 | #define JMR3927_IDE_PORT (JMR3927_ISAIO_BASE - JMR3927_PORT_BASE + 0x001001f0) | ||
274 | 152 | ||
275 | /* Clocks */ | 153 | /* Clocks */ |
276 | #define JMR3927_CORECLK 132710400 /* 132.7MHz */ | 154 | #define JMR3927_CORECLK 132710400 /* 132.7MHz */ |
diff --git a/include/asm-mips/jmr3927/tx3927.h b/include/asm-mips/jmr3927/tx3927.h index b3d67c75d9ac..0b9073bfb759 100644 --- a/include/asm-mips/jmr3927/tx3927.h +++ b/include/asm-mips/jmr3927/tx3927.h | |||
@@ -22,8 +22,6 @@ | |||
22 | #define TX3927_SIO_REG(ch) (0xfffef300 + (ch) * 0x100) | 22 | #define TX3927_SIO_REG(ch) (0xfffef300 + (ch) * 0x100) |
23 | #define TX3927_PIO_REG 0xfffef500 | 23 | #define TX3927_PIO_REG 0xfffef500 |
24 | 24 | ||
25 | #ifndef __ASSEMBLY__ | ||
26 | |||
27 | struct tx3927_sdramc_reg { | 25 | struct tx3927_sdramc_reg { |
28 | volatile unsigned long cr[8]; | 26 | volatile unsigned long cr[8]; |
29 | volatile unsigned long tr[3]; | 27 | volatile unsigned long tr[3]; |
@@ -164,8 +162,6 @@ struct tx3927_ccfg_reg { | |||
164 | volatile unsigned long pdcr; | 162 | volatile unsigned long pdcr; |
165 | }; | 163 | }; |
166 | 164 | ||
167 | #endif /* !__ASSEMBLY__ */ | ||
168 | |||
169 | /* | 165 | /* |
170 | * SDRAMC | 166 | * SDRAMC |
171 | */ | 167 | */ |
@@ -348,8 +344,6 @@ struct tx3927_ccfg_reg { | |||
348 | #define TX3927_PCFG_SELDMA_ALL 0x0000000f | 344 | #define TX3927_PCFG_SELDMA_ALL 0x0000000f |
349 | #define TX3927_PCFG_SELDMA(ch) (0x00000001<<(ch)) | 345 | #define TX3927_PCFG_SELDMA(ch) (0x00000001<<(ch)) |
350 | 346 | ||
351 | #ifndef __ASSEMBLY__ | ||
352 | |||
353 | #define tx3927_sdramcptr ((struct tx3927_sdramc_reg *)TX3927_SDRAMC_REG) | 347 | #define tx3927_sdramcptr ((struct tx3927_sdramc_reg *)TX3927_SDRAMC_REG) |
354 | #define tx3927_romcptr ((struct tx3927_romc_reg *)TX3927_ROMC_REG) | 348 | #define tx3927_romcptr ((struct tx3927_romc_reg *)TX3927_ROMC_REG) |
355 | #define tx3927_dmaptr ((struct tx3927_dma_reg *)TX3927_DMA_REG) | 349 | #define tx3927_dmaptr ((struct tx3927_dma_reg *)TX3927_DMA_REG) |
@@ -360,6 +354,4 @@ struct tx3927_ccfg_reg { | |||
360 | #define tx3927_sioptr(ch) ((struct txx927_sio_reg *)TX3927_SIO_REG(ch)) | 354 | #define tx3927_sioptr(ch) ((struct txx927_sio_reg *)TX3927_SIO_REG(ch)) |
361 | #define tx3927_pioptr ((struct txx927_pio_reg *)TX3927_PIO_REG) | 355 | #define tx3927_pioptr ((struct txx927_pio_reg *)TX3927_PIO_REG) |
362 | 356 | ||
363 | #endif /* !__ASSEMBLY__ */ | ||
364 | |||
365 | #endif /* __ASM_TX3927_H */ | 357 | #endif /* __ASM_TX3927_H */ |
diff --git a/include/asm-mips/jmr3927/txx927.h b/include/asm-mips/jmr3927/txx927.h index 9d5792eab452..58a8ff6be815 100644 --- a/include/asm-mips/jmr3927/txx927.h +++ b/include/asm-mips/jmr3927/txx927.h | |||
@@ -10,8 +10,6 @@ | |||
10 | #ifndef __ASM_TXX927_H | 10 | #ifndef __ASM_TXX927_H |
11 | #define __ASM_TXX927_H | 11 | #define __ASM_TXX927_H |
12 | 12 | ||
13 | #ifndef __ASSEMBLY__ | ||
14 | |||
15 | struct txx927_tmr_reg { | 13 | struct txx927_tmr_reg { |
16 | volatile unsigned long tcr; | 14 | volatile unsigned long tcr; |
17 | volatile unsigned long tisr; | 15 | volatile unsigned long tisr; |
@@ -52,9 +50,6 @@ struct txx927_pio_reg { | |||
52 | volatile unsigned long maskext; | 50 | volatile unsigned long maskext; |
53 | }; | 51 | }; |
54 | 52 | ||
55 | #endif /* !__ASSEMBLY__ */ | ||
56 | |||
57 | |||
58 | /* | 53 | /* |
59 | * TMR | 54 | * TMR |
60 | */ | 55 | */ |