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authorEero Nurkkala <ext-eero.nurkkala@nokia.com>2009-08-20 09:18:15 -0400
committerMark Brown <broonie@opensource.wolfsonmicro.com>2009-08-20 15:10:27 -0400
commit2122fdc629f05634537e796c0630028e4db76953 (patch)
tree08f4d6f4a71e88cc7d93763e725c0892aa41df54
parent98cb20e88957faf9c99e194242caac7f55dd47e4 (diff)
OMAP: McBSP: Wakeups utilized
This patch enables the smart idle mode while McBPS is being utilized. Once it's done, force idle mode is taken instead. Apart of it, it also configures what signals will wake mcbsp up. Signed-off-by: Eero Nurkkala <ext-eero.nurkkala@nokia.com> Signed-off-by: Eduardo Valentin <eduardo.valentin@nokia.com> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
-rw-r--r--arch/arm/plat-omap/include/mach/mcbsp.h17
-rw-r--r--arch/arm/plat-omap/mcbsp.c46
2 files changed, 63 insertions, 0 deletions
diff --git a/arch/arm/plat-omap/include/mach/mcbsp.h b/arch/arm/plat-omap/include/mach/mcbsp.h
index bd5b759991c8..333061d4f4a7 100644
--- a/arch/arm/plat-omap/include/mach/mcbsp.h
+++ b/arch/arm/plat-omap/include/mach/mcbsp.h
@@ -138,6 +138,7 @@
138#define OMAP_MCBSP_REG_THRSH1 0x94 138#define OMAP_MCBSP_REG_THRSH1 0x94
139#define OMAP_MCBSP_REG_IRQST 0xA0 139#define OMAP_MCBSP_REG_IRQST 0xA0
140#define OMAP_MCBSP_REG_IRQEN 0xA4 140#define OMAP_MCBSP_REG_IRQEN 0xA4
141#define OMAP_MCBSP_REG_WAKEUPEN 0xA8
141#define OMAP_MCBSP_REG_XCCR 0xAC 142#define OMAP_MCBSP_REG_XCCR 0xAC
142#define OMAP_MCBSP_REG_RCCR 0xB0 143#define OMAP_MCBSP_REG_RCCR 0xB0
143 144
@@ -253,6 +254,8 @@
253#define RDISABLE 0x0001 254#define RDISABLE 0x0001
254 255
255/********************** McBSP SYSCONFIG bit definitions ********************/ 256/********************** McBSP SYSCONFIG bit definitions ********************/
257#define SIDLEMODE(value) ((value)<<3)
258#define ENAWAKEUP 0x0004
256#define SOFTRST 0x0002 259#define SOFTRST 0x0002
257 260
258/********************** McBSP DMA operating modes **************************/ 261/********************** McBSP DMA operating modes **************************/
@@ -260,6 +263,20 @@
260#define MCBSP_DMA_MODE_THRESHOLD 1 263#define MCBSP_DMA_MODE_THRESHOLD 1
261#define MCBSP_DMA_MODE_FRAME 2 264#define MCBSP_DMA_MODE_FRAME 2
262 265
266/********************** McBSP WAKEUPEN bit definitions *********************/
267#define XEMPTYEOFEN 0x4000
268#define XRDYEN 0x0400
269#define XEOFEN 0x0200
270#define XFSXEN 0x0100
271#define XSYNCERREN 0x0080
272#define RRDYEN 0x0008
273#define REOFEN 0x0004
274#define RFSREN 0x0002
275#define RSYNCERREN 0x0001
276#define WAKEUPEN_ALL (XEMPTYEOFEN | XRDYEN | XEOFEN | XFSXEN | \
277 XSYNCERREN | RRDYEN | REOFEN | RFSREN | \
278 RSYNCERREN)
279
263/* we don't do multichannel for now */ 280/* we don't do multichannel for now */
264struct omap_mcbsp_reg_cfg { 281struct omap_mcbsp_reg_cfg {
265 u16 spcr2; 282 u16 spcr2;
diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c
index 9e699947a693..136f8c5d0dac 100644
--- a/arch/arm/plat-omap/mcbsp.c
+++ b/arch/arm/plat-omap/mcbsp.c
@@ -305,6 +305,46 @@ int omap_mcbsp_get_dma_op_mode(unsigned int id)
305 return dma_op_mode; 305 return dma_op_mode;
306} 306}
307EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode); 307EXPORT_SYMBOL(omap_mcbsp_get_dma_op_mode);
308
309static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp)
310{
311 /*
312 * Enable wakup behavior, smart idle and all wakeups
313 * REVISIT: some wakeups may be unnecessary
314 */
315 if (cpu_is_omap34xx()) {
316 u16 syscon;
317
318 syscon = OMAP_MCBSP_READ(mcbsp->io_base, SYSCON);
319 syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03));
320 syscon |= (ENAWAKEUP | SIDLEMODE(0x02));
321 OMAP_MCBSP_WRITE(mcbsp->io_base, SYSCON, syscon);
322
323 OMAP_MCBSP_WRITE(mcbsp->io_base, WAKEUPEN, WAKEUPEN_ALL);
324 }
325}
326
327static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp)
328{
329 /*
330 * Disable wakup behavior, smart idle and all wakeups
331 */
332 if (cpu_is_omap34xx()) {
333 u16 syscon;
334 u16 wakeupen;
335
336 syscon = OMAP_MCBSP_READ(mcbsp->io_base, SYSCON);
337 syscon &= ~(ENAWAKEUP | SIDLEMODE(0x03));
338 OMAP_MCBSP_WRITE(mcbsp->io_base, SYSCON, syscon);
339
340 wakeupen = OMAP_MCBSP_READ(mcbsp->io_base, WAKEUPEN);
341 wakeupen &= ~WAKEUPEN_ALL;
342 OMAP_MCBSP_WRITE(mcbsp->io_base, WAKEUPEN, wakeupen);
343 }
344}
345#else
346static inline void omap34xx_mcbsp_request(struct omap_mcbsp *mcbsp) {}
347static inline void omap34xx_mcbsp_free(struct omap_mcbsp *mcbsp) {}
308#endif 348#endif
309 349
310/* 350/*
@@ -366,6 +406,9 @@ int omap_mcbsp_request(unsigned int id)
366 clk_enable(mcbsp->iclk); 406 clk_enable(mcbsp->iclk);
367 clk_enable(mcbsp->fclk); 407 clk_enable(mcbsp->fclk);
368 408
409 /* Do procedure specific to omap34xx arch, if applicable */
410 omap34xx_mcbsp_request(mcbsp);
411
369 /* 412 /*
370 * Make sure that transmitter, receiver and sample-rate generator are 413 * Make sure that transmitter, receiver and sample-rate generator are
371 * not running before activating IRQs. 414 * not running before activating IRQs.
@@ -414,6 +457,9 @@ void omap_mcbsp_free(unsigned int id)
414 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free) 457 if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->free)
415 mcbsp->pdata->ops->free(id); 458 mcbsp->pdata->ops->free(id);
416 459
460 /* Do procedure specific to omap34xx arch, if applicable */
461 omap34xx_mcbsp_free(mcbsp);
462
417 clk_disable(mcbsp->fclk); 463 clk_disable(mcbsp->fclk);
418 clk_disable(mcbsp->iclk); 464 clk_disable(mcbsp->iclk);
419 465