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authorVille Syrjälä <ville.syrjala@linux.intel.com>2014-05-22 12:00:50 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-08-08 11:43:26 -0400
commit210871b67cd201c198b61ca80e1c51cd4b58c051 (patch)
tree426afb3e5616a98c44843e45fdc5e79479c7d807
parent020178a1bcadf20b9d057988984f374c905d542e (diff)
drm/i915: Kill intel_crtc->vbl_wait
Share the waitqueue that drm_irq uses when performing the vblank evade trick for atomic pipe updates. v2: Keep intel_pipe_handle_vblank() (Chris) Suggested-by: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c5
-rw-r--r--drivers/gpu/drm/i915/intel_display.c2
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h2
-rw-r--r--drivers/gpu/drm/i915/intel_sprite.c5
4 files changed, 3 insertions, 11 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 390ccc2a3096..0e44c433cfc3 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1989,14 +1989,9 @@ static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv, u32 pm_iir)
1989 1989
1990static bool intel_pipe_handle_vblank(struct drm_device *dev, enum pipe pipe) 1990static bool intel_pipe_handle_vblank(struct drm_device *dev, enum pipe pipe)
1991{ 1991{
1992 struct intel_crtc *crtc;
1993
1994 if (!drm_handle_vblank(dev, pipe)) 1992 if (!drm_handle_vblank(dev, pipe))
1995 return false; 1993 return false;
1996 1994
1997 crtc = to_intel_crtc(intel_get_crtc_for_pipe(dev, pipe));
1998 wake_up(&crtc->vbl_wait);
1999
2000 return true; 1995 return true;
2001} 1996}
2002 1997
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 620a89961d36..a9b351d1ff88 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11870,8 +11870,6 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
11870 intel_crtc->cursor_base = ~0; 11870 intel_crtc->cursor_base = ~0;
11871 intel_crtc->cursor_cntl = ~0; 11871 intel_crtc->cursor_cntl = ~0;
11872 11872
11873 init_waitqueue_head(&intel_crtc->vbl_wait);
11874
11875 BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) || 11873 BUG_ON(pipe >= ARRAY_SIZE(dev_priv->plane_to_crtc_mapping) ||
11876 dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL); 11874 dev_priv->plane_to_crtc_mapping[intel_crtc->plane] != NULL);
11877 dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = &intel_crtc->base; 11875 dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = &intel_crtc->base;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 7a3cac095afe..3198de3007be 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -425,8 +425,6 @@ struct intel_crtc {
425 struct intel_pipe_wm active; 425 struct intel_pipe_wm active;
426 } wm; 426 } wm;
427 427
428 wait_queue_head_t vbl_wait;
429
430 int scanline_offset; 428 int scanline_offset;
431 struct intel_mmio_flip mmio_flip; 429 struct intel_mmio_flip mmio_flip;
432}; 430};
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 168c6652cda1..d34a5696ffb6 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -53,6 +53,7 @@ static bool intel_pipe_update_start(struct intel_crtc *crtc, uint32_t *start_vbl
53 enum pipe pipe = crtc->pipe; 53 enum pipe pipe = crtc->pipe;
54 long timeout = msecs_to_jiffies_timeout(1); 54 long timeout = msecs_to_jiffies_timeout(1);
55 int scanline, min, max, vblank_start; 55 int scanline, min, max, vblank_start;
56 wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
56 DEFINE_WAIT(wait); 57 DEFINE_WAIT(wait);
57 58
58 WARN_ON(!drm_modeset_is_locked(&crtc->base.mutex)); 59 WARN_ON(!drm_modeset_is_locked(&crtc->base.mutex));
@@ -81,7 +82,7 @@ static bool intel_pipe_update_start(struct intel_crtc *crtc, uint32_t *start_vbl
81 * other CPUs can see the task state update by the time we 82 * other CPUs can see the task state update by the time we
82 * read the scanline. 83 * read the scanline.
83 */ 84 */
84 prepare_to_wait(&crtc->vbl_wait, &wait, TASK_UNINTERRUPTIBLE); 85 prepare_to_wait(wq, &wait, TASK_UNINTERRUPTIBLE);
85 86
86 scanline = intel_get_crtc_scanline(crtc); 87 scanline = intel_get_crtc_scanline(crtc);
87 if (scanline < min || scanline > max) 88 if (scanline < min || scanline > max)
@@ -100,7 +101,7 @@ static bool intel_pipe_update_start(struct intel_crtc *crtc, uint32_t *start_vbl
100 local_irq_disable(); 101 local_irq_disable();
101 } 102 }
102 103
103 finish_wait(&crtc->vbl_wait, &wait); 104 finish_wait(wq, &wait);
104 105
105 drm_vblank_put(dev, pipe); 106 drm_vblank_put(dev, pipe);
106 107