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authorArnd Bergmann <arnd@arndb.de>2015-01-28 11:54:38 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2015-02-06 15:16:39 -0500
commit20e783e39e55c2615fb61d1b3d139ee9edcf6772 (patch)
tree9d3709364434f46e470b209e0925b1664a432ddf
parent56b60b8bce4ae87470da4ed95435433b0ba8795c (diff)
ARM: 8296/1: cache-l2x0: clean up aurora cache handling
The aurora cache controller is the only remaining user of a couple of functions in this file and are completely unused when that is disabled, leading to build warnings: arch/arm/mm/cache-l2x0.c:167:13: warning: 'l2x0_cache_sync' defined but not used [-Wunused-function] arch/arm/mm/cache-l2x0.c:184:13: warning: 'l2x0_flush_all' defined but not used [-Wunused-function] arch/arm/mm/cache-l2x0.c:194:13: warning: 'l2x0_disable' defined but not used [-Wunused-function] With the knowledge that the code is now aurora-specific, we can simplify it noticeably: - The pl310 errata workarounds are not needed on aurora and can be removed - As confirmed by Thomas Petazzoni from the data sheet, the cache_wait() macro is never needed. - No need to hold the lock across atomic cache sync - We can load the l2x0_base into a local variable across operations There should be no functional change in this patch, but readability and the generated object code improves, along with avoiding the warnings. (on Armada 370 RD and Armada XP GP, boot tested, plus a little bit of DMA traffic by reading data from a SD card) Acked-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/mm/cache-l2x0.c111
1 files changed, 38 insertions, 73 deletions
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index 01de13809454..404c598da27d 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -156,73 +156,6 @@ static void l2c_disable(void)
156 dsb(st); 156 dsb(st);
157} 157}
158 158
159#ifdef CONFIG_CACHE_PL310
160static inline void cache_wait(void __iomem *reg, unsigned long mask)
161{
162 /* cache operations by line are atomic on PL310 */
163}
164#else
165#define cache_wait l2c_wait_mask
166#endif
167
168static inline void cache_sync(void)
169{
170 void __iomem *base = l2x0_base;
171
172 writel_relaxed(0, base + sync_reg_offset);
173 cache_wait(base + L2X0_CACHE_SYNC, 1);
174}
175
176#if defined(CONFIG_PL310_ERRATA_588369) || defined(CONFIG_PL310_ERRATA_727915)
177static inline void debug_writel(unsigned long val)
178{
179 l2c_set_debug(l2x0_base, val);
180}
181#else
182/* Optimised out for non-errata case */
183static inline void debug_writel(unsigned long val)
184{
185}
186#endif
187
188static void l2x0_cache_sync(void)
189{
190 unsigned long flags;
191
192 raw_spin_lock_irqsave(&l2x0_lock, flags);
193 cache_sync();
194 raw_spin_unlock_irqrestore(&l2x0_lock, flags);
195}
196
197static void __l2x0_flush_all(void)
198{
199 debug_writel(0x03);
200 __l2c_op_way(l2x0_base + L2X0_CLEAN_INV_WAY);
201 cache_sync();
202 debug_writel(0x00);
203}
204
205static void l2x0_flush_all(void)
206{
207 unsigned long flags;
208
209 /* clean all ways */
210 raw_spin_lock_irqsave(&l2x0_lock, flags);
211 __l2x0_flush_all();
212 raw_spin_unlock_irqrestore(&l2x0_lock, flags);
213}
214
215static void l2x0_disable(void)
216{
217 unsigned long flags;
218
219 raw_spin_lock_irqsave(&l2x0_lock, flags);
220 __l2x0_flush_all();
221 l2c_write_sec(0, l2x0_base, L2X0_CTRL);
222 dsb(st);
223 raw_spin_unlock_irqrestore(&l2x0_lock, flags);
224}
225
226static void l2c_save(void __iomem *base) 159static void l2c_save(void __iomem *base)
227{ 160{
228 l2x0_saved_regs.aux_ctrl = readl_relaxed(l2x0_base + L2X0_AUX_CTRL); 161 l2x0_saved_regs.aux_ctrl = readl_relaxed(l2x0_base + L2X0_AUX_CTRL);
@@ -1349,14 +1282,15 @@ static unsigned long calc_range_end(unsigned long start, unsigned long end)
1349static void aurora_pa_range(unsigned long start, unsigned long end, 1282static void aurora_pa_range(unsigned long start, unsigned long end,
1350 unsigned long offset) 1283 unsigned long offset)
1351{ 1284{
1285 void __iomem *base = l2x0_base;
1352 unsigned long flags; 1286 unsigned long flags;
1353 1287
1354 raw_spin_lock_irqsave(&l2x0_lock, flags); 1288 raw_spin_lock_irqsave(&l2x0_lock, flags);
1355 writel_relaxed(start, l2x0_base + AURORA_RANGE_BASE_ADDR_REG); 1289 writel_relaxed(start, base + AURORA_RANGE_BASE_ADDR_REG);
1356 writel_relaxed(end, l2x0_base + offset); 1290 writel_relaxed(end, base + offset);
1357 raw_spin_unlock_irqrestore(&l2x0_lock, flags); 1291 raw_spin_unlock_irqrestore(&l2x0_lock, flags);
1358 1292
1359 cache_sync(); 1293 writel_relaxed(0, base + AURORA_SYNC_REG);
1360} 1294}
1361 1295
1362static void aurora_inv_range(unsigned long start, unsigned long end) 1296static void aurora_inv_range(unsigned long start, unsigned long end)
@@ -1416,6 +1350,37 @@ static void aurora_flush_range(unsigned long start, unsigned long end)
1416 } 1350 }
1417} 1351}
1418 1352
1353static void aurora_flush_all(void)
1354{
1355 void __iomem *base = l2x0_base;
1356 unsigned long flags;
1357
1358 /* clean all ways */
1359 raw_spin_lock_irqsave(&l2x0_lock, flags);
1360 __l2c_op_way(base + L2X0_CLEAN_INV_WAY);
1361 raw_spin_unlock_irqrestore(&l2x0_lock, flags);
1362
1363 writel_relaxed(0, base + AURORA_SYNC_REG);
1364}
1365
1366static void aurora_cache_sync(void)
1367{
1368 writel_relaxed(0, l2x0_base + AURORA_SYNC_REG);
1369}
1370
1371static void aurora_disable(void)
1372{
1373 void __iomem *base = l2x0_base;
1374 unsigned long flags;
1375
1376 raw_spin_lock_irqsave(&l2x0_lock, flags);
1377 __l2c_op_way(base + L2X0_CLEAN_INV_WAY);
1378 writel_relaxed(0, base + AURORA_SYNC_REG);
1379 l2c_write_sec(0, base, L2X0_CTRL);
1380 dsb(st);
1381 raw_spin_unlock_irqrestore(&l2x0_lock, flags);
1382}
1383
1419static void aurora_save(void __iomem *base) 1384static void aurora_save(void __iomem *base)
1420{ 1385{
1421 l2x0_saved_regs.ctrl = readl_relaxed(base + L2X0_CTRL); 1386 l2x0_saved_regs.ctrl = readl_relaxed(base + L2X0_CTRL);
@@ -1480,9 +1445,9 @@ static const struct l2c_init_data of_aurora_with_outer_data __initconst = {
1480 .inv_range = aurora_inv_range, 1445 .inv_range = aurora_inv_range,
1481 .clean_range = aurora_clean_range, 1446 .clean_range = aurora_clean_range,
1482 .flush_range = aurora_flush_range, 1447 .flush_range = aurora_flush_range,
1483 .flush_all = l2x0_flush_all, 1448 .flush_all = aurora_flush_all,
1484 .disable = l2x0_disable, 1449 .disable = aurora_disable,
1485 .sync = l2x0_cache_sync, 1450 .sync = aurora_cache_sync,
1486 .resume = l2c_resume, 1451 .resume = l2c_resume,
1487 }, 1452 },
1488}; 1453};