diff options
author | Manuel Lauss <manuel.lauss@googlemail.com> | 2009-10-19 06:53:37 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2010-02-27 06:52:59 -0500 |
commit | 206aa6cdadad8bbedee5649f1346fe47e922a039 (patch) | |
tree | 1b66e9d98b65d7afe962bb6c6989f3ad212f2e6d | |
parent | 8facefd0907ae16f96a35bef7ce654206d87c2fc (diff) |
MIPS: Alchemy: physmap-flash for all devboards
Replace the devboard NOR MTD mapping driver with physmap-flash support.
Also honor the "swapboot" switch settings wrt. to the layout of the
NOR partitions.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Cc: Linux-MIPS <linux-mips@linux-mips.org>
Acked-By: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/alchemy/devboards/db1x00/platform.c | 20 | ||||
-rw-r--r-- | arch/mips/alchemy/devboards/pb1000/board_setup.c | 7 | ||||
-rw-r--r-- | arch/mips/alchemy/devboards/pb1100/platform.c | 7 | ||||
-rw-r--r-- | arch/mips/alchemy/devboards/pb1200/platform.c | 9 | ||||
-rw-r--r-- | arch/mips/alchemy/devboards/pb1500/platform.c | 7 | ||||
-rw-r--r-- | arch/mips/alchemy/devboards/pb1550/platform.c | 6 | ||||
-rw-r--r-- | arch/mips/alchemy/devboards/platform.c | 104 | ||||
-rw-r--r-- | arch/mips/alchemy/devboards/platform.h | 3 | ||||
-rw-r--r-- | drivers/mtd/maps/Kconfig | 6 | ||||
-rw-r--r-- | drivers/mtd/maps/Makefile | 1 | ||||
-rw-r--r-- | drivers/mtd/maps/alchemy-flash.c | 166 |
11 files changed, 163 insertions, 173 deletions
diff --git a/arch/mips/alchemy/devboards/db1x00/platform.c b/arch/mips/alchemy/devboards/db1x00/platform.c index 0ac5dd05d3c0..62e2a96fe119 100644 --- a/arch/mips/alchemy/devboards/db1x00/platform.c +++ b/arch/mips/alchemy/devboards/db1x00/platform.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
23 | 23 | ||
24 | #include <asm/mach-au1x00/au1xxx.h> | 24 | #include <asm/mach-au1x00/au1xxx.h> |
25 | #include <asm/mach-db1x00/bcsr.h> | ||
25 | #include "../platform.h" | 26 | #include "../platform.h" |
26 | 27 | ||
27 | /* DB1xxx PCMCIA interrupt sources: | 28 | /* DB1xxx PCMCIA interrupt sources: |
@@ -32,6 +33,7 @@ | |||
32 | */ | 33 | */ |
33 | 34 | ||
34 | #define DB1XXX_HAS_PCMCIA | 35 | #define DB1XXX_HAS_PCMCIA |
36 | #define F_SWAPPED (bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT) | ||
35 | 37 | ||
36 | #if defined(CONFIG_MIPS_DB1000) | 38 | #if defined(CONFIG_MIPS_DB1000) |
37 | #define DB1XXX_PCMCIA_CD0 AU1000_GPIO0_INT | 39 | #define DB1XXX_PCMCIA_CD0 AU1000_GPIO0_INT |
@@ -40,6 +42,8 @@ | |||
40 | #define DB1XXX_PCMCIA_CD1 AU1000_GPIO3_INT | 42 | #define DB1XXX_PCMCIA_CD1 AU1000_GPIO3_INT |
41 | #define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO4_INT | 43 | #define DB1XXX_PCMCIA_STSCHG1 AU1000_GPIO4_INT |
42 | #define DB1XXX_PCMCIA_CARD1 AU1000_GPIO5_INT | 44 | #define DB1XXX_PCMCIA_CARD1 AU1000_GPIO5_INT |
45 | #define BOARD_FLASH_SIZE 0x02000000 /* 32MB */ | ||
46 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
43 | #elif defined(CONFIG_MIPS_DB1100) | 47 | #elif defined(CONFIG_MIPS_DB1100) |
44 | #define DB1XXX_PCMCIA_CD0 AU1100_GPIO0_INT | 48 | #define DB1XXX_PCMCIA_CD0 AU1100_GPIO0_INT |
45 | #define DB1XXX_PCMCIA_STSCHG0 AU1100_GPIO1_INT | 49 | #define DB1XXX_PCMCIA_STSCHG0 AU1100_GPIO1_INT |
@@ -47,6 +51,8 @@ | |||
47 | #define DB1XXX_PCMCIA_CD1 AU1100_GPIO3_INT | 51 | #define DB1XXX_PCMCIA_CD1 AU1100_GPIO3_INT |
48 | #define DB1XXX_PCMCIA_STSCHG1 AU1100_GPIO4_INT | 52 | #define DB1XXX_PCMCIA_STSCHG1 AU1100_GPIO4_INT |
49 | #define DB1XXX_PCMCIA_CARD1 AU1100_GPIO5_INT | 53 | #define DB1XXX_PCMCIA_CARD1 AU1100_GPIO5_INT |
54 | #define BOARD_FLASH_SIZE 0x02000000 /* 32MB */ | ||
55 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
50 | #elif defined(CONFIG_MIPS_DB1500) | 56 | #elif defined(CONFIG_MIPS_DB1500) |
51 | #define DB1XXX_PCMCIA_CD0 AU1500_GPIO0_INT | 57 | #define DB1XXX_PCMCIA_CD0 AU1500_GPIO0_INT |
52 | #define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO1_INT | 58 | #define DB1XXX_PCMCIA_STSCHG0 AU1500_GPIO1_INT |
@@ -54,6 +60,8 @@ | |||
54 | #define DB1XXX_PCMCIA_CD1 AU1500_GPIO3_INT | 60 | #define DB1XXX_PCMCIA_CD1 AU1500_GPIO3_INT |
55 | #define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO4_INT | 61 | #define DB1XXX_PCMCIA_STSCHG1 AU1500_GPIO4_INT |
56 | #define DB1XXX_PCMCIA_CARD1 AU1500_GPIO5_INT | 62 | #define DB1XXX_PCMCIA_CARD1 AU1500_GPIO5_INT |
63 | #define BOARD_FLASH_SIZE 0x02000000 /* 32MB */ | ||
64 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
57 | #elif defined(CONFIG_MIPS_DB1550) | 65 | #elif defined(CONFIG_MIPS_DB1550) |
58 | #define DB1XXX_PCMCIA_CD0 AU1550_GPIO0_INT | 66 | #define DB1XXX_PCMCIA_CD0 AU1550_GPIO0_INT |
59 | #define DB1XXX_PCMCIA_STSCHG0 AU1550_GPIO21_INT | 67 | #define DB1XXX_PCMCIA_STSCHG0 AU1550_GPIO21_INT |
@@ -61,9 +69,20 @@ | |||
61 | #define DB1XXX_PCMCIA_CD1 AU1550_GPIO1_INT | 69 | #define DB1XXX_PCMCIA_CD1 AU1550_GPIO1_INT |
62 | #define DB1XXX_PCMCIA_STSCHG1 AU1550_GPIO22_INT | 70 | #define DB1XXX_PCMCIA_STSCHG1 AU1550_GPIO22_INT |
63 | #define DB1XXX_PCMCIA_CARD1 AU1550_GPIO5_INT | 71 | #define DB1XXX_PCMCIA_CARD1 AU1550_GPIO5_INT |
72 | #define BOARD_FLASH_SIZE 0x08000000 /* 128MB */ | ||
73 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
64 | #else | 74 | #else |
65 | /* other board: no PCMCIA */ | 75 | /* other board: no PCMCIA */ |
66 | #undef DB1XXX_HAS_PCMCIA | 76 | #undef DB1XXX_HAS_PCMCIA |
77 | #undef F_SWAPPED | ||
78 | #define F_SWAPPED 0 | ||
79 | #if defined(CONFIG_MIPS_BOSPORUS) | ||
80 | #define BOARD_FLASH_SIZE 0x01000000 /* 16MB */ | ||
81 | #define BOARD_FLASH_WIDTH 2 /* 16-bits */ | ||
82 | #elif defined(CONFIG_MIPS_MIRAGE) | ||
83 | #define BOARD_FLASH_SIZE 0x04000000 /* 64MB */ | ||
84 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
85 | #endif | ||
67 | #endif | 86 | #endif |
68 | 87 | ||
69 | static int __init db1xxx_dev_init(void) | 88 | static int __init db1xxx_dev_init(void) |
@@ -93,6 +112,7 @@ static int __init db1xxx_dev_init(void) | |||
93 | 0, | 112 | 0, |
94 | 1); | 113 | 1); |
95 | #endif | 114 | #endif |
115 | db1x_register_norflash(BOARD_FLASH_SIZE, BOARD_FLASH_WIDTH, F_SWAPPED); | ||
96 | return 0; | 116 | return 0; |
97 | } | 117 | } |
98 | device_initcall(db1xxx_dev_init); | 118 | device_initcall(db1xxx_dev_init); |
diff --git a/arch/mips/alchemy/devboards/pb1000/board_setup.c b/arch/mips/alchemy/devboards/pb1000/board_setup.c index 50fff504ae05..28b8bd278a16 100644 --- a/arch/mips/alchemy/devboards/pb1000/board_setup.c +++ b/arch/mips/alchemy/devboards/pb1000/board_setup.c | |||
@@ -31,6 +31,7 @@ | |||
31 | #include <asm/mach-pb1x00/pb1000.h> | 31 | #include <asm/mach-pb1x00/pb1000.h> |
32 | #include <prom.h> | 32 | #include <prom.h> |
33 | 33 | ||
34 | #include "../platform.h" | ||
34 | 35 | ||
35 | const char *get_system_type(void) | 36 | const char *get_system_type(void) |
36 | { | 37 | { |
@@ -194,3 +195,9 @@ static int __init pb1000_init_irq(void) | |||
194 | return 0; | 195 | return 0; |
195 | } | 196 | } |
196 | arch_initcall(pb1000_init_irq); | 197 | arch_initcall(pb1000_init_irq); |
198 | |||
199 | static int __init pb1000_device_init(void) | ||
200 | { | ||
201 | return db1x_register_norflash(8 * 1024 * 1024, 4, 0); | ||
202 | } | ||
203 | device_initcall(pb1000_device_init); | ||
diff --git a/arch/mips/alchemy/devboards/pb1100/platform.c b/arch/mips/alchemy/devboards/pb1100/platform.c index ec932e773a40..bfc5ab6a121c 100644 --- a/arch/mips/alchemy/devboards/pb1100/platform.c +++ b/arch/mips/alchemy/devboards/pb1100/platform.c | |||
@@ -21,11 +21,14 @@ | |||
21 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | 22 | ||
23 | #include <asm/mach-au1x00/au1000.h> | 23 | #include <asm/mach-au1x00/au1000.h> |
24 | #include <asm/mach-db1x00/bcsr.h> | ||
24 | 25 | ||
25 | #include "../platform.h" | 26 | #include "../platform.h" |
26 | 27 | ||
27 | static int __init pb1100_dev_init(void) | 28 | static int __init pb1100_dev_init(void) |
28 | { | 29 | { |
30 | int swapped; | ||
31 | |||
29 | /* PCMCIA. single socket, identical to Pb1500 */ | 32 | /* PCMCIA. single socket, identical to Pb1500 */ |
30 | db1x_register_pcmcia_socket(PCMCIA_ATTR_PSEUDO_PHYS, | 33 | db1x_register_pcmcia_socket(PCMCIA_ATTR_PSEUDO_PHYS, |
31 | PCMCIA_ATTR_PSEUDO_PHYS + 0x00040000 - 1, | 34 | PCMCIA_ATTR_PSEUDO_PHYS + 0x00040000 - 1, |
@@ -38,6 +41,10 @@ static int __init pb1100_dev_init(void) | |||
38 | /*AU1100_GPIO10_INT*/0, /* stschg */ | 41 | /*AU1100_GPIO10_INT*/0, /* stschg */ |
39 | 0, /* eject */ | 42 | 0, /* eject */ |
40 | 0); /* id */ | 43 | 0); /* id */ |
44 | |||
45 | swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT; | ||
46 | db1x_register_norflash(64 * 1024 * 1024, 4, swapped); | ||
47 | |||
41 | return 0; | 48 | return 0; |
42 | } | 49 | } |
43 | device_initcall(pb1100_dev_init); | 50 | device_initcall(pb1100_dev_init); |
diff --git a/arch/mips/alchemy/devboards/pb1200/platform.c b/arch/mips/alchemy/devboards/pb1200/platform.c index c8b7ae3f3253..736d647ebe0c 100644 --- a/arch/mips/alchemy/devboards/pb1200/platform.c +++ b/arch/mips/alchemy/devboards/pb1200/platform.c | |||
@@ -172,6 +172,8 @@ static struct platform_device *board_platform_devices[] __initdata = { | |||
172 | 172 | ||
173 | static int __init board_register_devices(void) | 173 | static int __init board_register_devices(void) |
174 | { | 174 | { |
175 | int swapped; | ||
176 | |||
175 | #ifdef CONFIG_MIPS_PB1200 | 177 | #ifdef CONFIG_MIPS_PB1200 |
176 | db1x_register_pcmcia_socket(PCMCIA_ATTR_PSEUDO_PHYS, | 178 | db1x_register_pcmcia_socket(PCMCIA_ATTR_PSEUDO_PHYS, |
177 | PCMCIA_ATTR_PSEUDO_PHYS + 0x00040000 - 1, | 179 | PCMCIA_ATTR_PSEUDO_PHYS + 0x00040000 - 1, |
@@ -222,6 +224,13 @@ static int __init board_register_devices(void) | |||
222 | 1); | 224 | 1); |
223 | #endif | 225 | #endif |
224 | 226 | ||
227 | swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT; | ||
228 | #ifdef CONFIG_MIPS_PB1200 | ||
229 | db1x_register_norflash(128 * 1024 * 1024, 2, swapped); | ||
230 | #else | ||
231 | db1x_register_norflash(64 * 1024 * 1024, 2, swapped); | ||
232 | #endif | ||
233 | |||
225 | return platform_add_devices(board_platform_devices, | 234 | return platform_add_devices(board_platform_devices, |
226 | ARRAY_SIZE(board_platform_devices)); | 235 | ARRAY_SIZE(board_platform_devices)); |
227 | } | 236 | } |
diff --git a/arch/mips/alchemy/devboards/pb1500/platform.c b/arch/mips/alchemy/devboards/pb1500/platform.c index cdce775e2131..529acb789254 100644 --- a/arch/mips/alchemy/devboards/pb1500/platform.c +++ b/arch/mips/alchemy/devboards/pb1500/platform.c | |||
@@ -20,11 +20,14 @@ | |||
20 | 20 | ||
21 | #include <linux/init.h> | 21 | #include <linux/init.h> |
22 | #include <asm/mach-au1x00/au1000.h> | 22 | #include <asm/mach-au1x00/au1000.h> |
23 | #include <asm/mach-db1x00/bcsr.h> | ||
23 | 24 | ||
24 | #include "../platform.h" | 25 | #include "../platform.h" |
25 | 26 | ||
26 | static int __init pb1500_dev_init(void) | 27 | static int __init pb1500_dev_init(void) |
27 | { | 28 | { |
29 | int swapped; | ||
30 | |||
28 | /* PCMCIA. single socket, identical to Pb1500 */ | 31 | /* PCMCIA. single socket, identical to Pb1500 */ |
29 | db1x_register_pcmcia_socket(PCMCIA_ATTR_PSEUDO_PHYS, | 32 | db1x_register_pcmcia_socket(PCMCIA_ATTR_PSEUDO_PHYS, |
30 | PCMCIA_ATTR_PSEUDO_PHYS + 0x00040000 - 1, | 33 | PCMCIA_ATTR_PSEUDO_PHYS + 0x00040000 - 1, |
@@ -37,6 +40,10 @@ static int __init pb1500_dev_init(void) | |||
37 | /*AU1500_GPIO10_INT*/0, /* stschg */ | 40 | /*AU1500_GPIO10_INT*/0, /* stschg */ |
38 | 0, /* eject */ | 41 | 0, /* eject */ |
39 | 0); /* id */ | 42 | 0); /* id */ |
43 | |||
44 | swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1000_SWAPBOOT; | ||
45 | db1x_register_norflash(64 * 1024 * 1024, 4, swapped); | ||
46 | |||
40 | return 0; | 47 | return 0; |
41 | } | 48 | } |
42 | device_initcall(pb1500_dev_init); | 49 | device_initcall(pb1500_dev_init); |
diff --git a/arch/mips/alchemy/devboards/pb1550/platform.c b/arch/mips/alchemy/devboards/pb1550/platform.c index b496fb6de231..461339166a4e 100644 --- a/arch/mips/alchemy/devboards/pb1550/platform.c +++ b/arch/mips/alchemy/devboards/pb1550/platform.c | |||
@@ -22,11 +22,14 @@ | |||
22 | 22 | ||
23 | #include <asm/mach-au1x00/au1000.h> | 23 | #include <asm/mach-au1x00/au1000.h> |
24 | #include <asm/mach-pb1x00/pb1550.h> | 24 | #include <asm/mach-pb1x00/pb1550.h> |
25 | #include <asm/mach-db1x00/bcsr.h> | ||
25 | 26 | ||
26 | #include "../platform.h" | 27 | #include "../platform.h" |
27 | 28 | ||
28 | static int __init pb1550_dev_init(void) | 29 | static int __init pb1550_dev_init(void) |
29 | { | 30 | { |
31 | int swapped; | ||
32 | |||
30 | /* Pb1550, like all others, also has statuschange irqs; however they're | 33 | /* Pb1550, like all others, also has statuschange irqs; however they're |
31 | * wired up on one of the Au1550's shared GPIO201_205 line, which also | 34 | * wired up on one of the Au1550's shared GPIO201_205 line, which also |
32 | * services the PCMCIA card interrupts. So we ignore statuschange and | 35 | * services the PCMCIA card interrupts. So we ignore statuschange and |
@@ -58,6 +61,9 @@ static int __init pb1550_dev_init(void) | |||
58 | 0, | 61 | 0, |
59 | 1); | 62 | 1); |
60 | 63 | ||
64 | swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_PB1550_SWAPBOOT; | ||
65 | db1x_register_norflash(128 * 1024 * 1024, 4, swapped); | ||
66 | |||
61 | return 0; | 67 | return 0; |
62 | } | 68 | } |
63 | device_initcall(pb1550_dev_init); | 69 | device_initcall(pb1550_dev_init); |
diff --git a/arch/mips/alchemy/devboards/platform.c b/arch/mips/alchemy/devboards/platform.c index 48c537cc8efb..7f2bcee7ac34 100644 --- a/arch/mips/alchemy/devboards/platform.c +++ b/arch/mips/alchemy/devboards/platform.c | |||
@@ -3,6 +3,9 @@ | |||
3 | */ | 3 | */ |
4 | 4 | ||
5 | #include <linux/init.h> | 5 | #include <linux/init.h> |
6 | #include <linux/mtd/mtd.h> | ||
7 | #include <linux/mtd/map.h> | ||
8 | #include <linux/mtd/physmap.h> | ||
6 | #include <linux/slab.h> | 9 | #include <linux/slab.h> |
7 | #include <linux/platform_device.h> | 10 | #include <linux/platform_device.h> |
8 | 11 | ||
@@ -87,3 +90,104 @@ out: | |||
87 | kfree(sr); | 90 | kfree(sr); |
88 | return ret; | 91 | return ret; |
89 | } | 92 | } |
93 | |||
94 | #define YAMON_SIZE 0x00100000 | ||
95 | #define YAMON_ENV_SIZE 0x00040000 | ||
96 | |||
97 | int __init db1x_register_norflash(unsigned long size, int width, | ||
98 | int swapped) | ||
99 | { | ||
100 | struct physmap_flash_data *pfd; | ||
101 | struct platform_device *pd; | ||
102 | struct mtd_partition *parts; | ||
103 | struct resource *res; | ||
104 | int ret, i; | ||
105 | |||
106 | if (size < (8 * 1024 * 1024)) | ||
107 | return -EINVAL; | ||
108 | |||
109 | ret = -ENOMEM; | ||
110 | parts = kzalloc(sizeof(struct mtd_partition) * 5, GFP_KERNEL); | ||
111 | if (!parts) | ||
112 | goto out; | ||
113 | |||
114 | res = kzalloc(sizeof(struct resource), GFP_KERNEL); | ||
115 | if (!res) | ||
116 | goto out1; | ||
117 | |||
118 | pfd = kzalloc(sizeof(struct physmap_flash_data), GFP_KERNEL); | ||
119 | if (!pfd) | ||
120 | goto out2; | ||
121 | |||
122 | pd = platform_device_alloc("physmap-flash", 0); | ||
123 | if (!pd) | ||
124 | goto out3; | ||
125 | |||
126 | /* NOR flash ends at 0x20000000, regardless of size */ | ||
127 | res->start = 0x20000000 - size; | ||
128 | res->end = 0x20000000 - 1; | ||
129 | res->flags = IORESOURCE_MEM; | ||
130 | |||
131 | /* partition setup. Most Develboards have a switch which allows | ||
132 | * to swap the physical locations of the 2 NOR flash banks. | ||
133 | */ | ||
134 | i = 0; | ||
135 | if (!swapped) { | ||
136 | /* first NOR chip */ | ||
137 | parts[i].offset = 0; | ||
138 | parts[i].name = "User FS"; | ||
139 | parts[i].size = size / 2; | ||
140 | i++; | ||
141 | } | ||
142 | |||
143 | parts[i].offset = MTDPART_OFS_APPEND; | ||
144 | parts[i].name = "User FS 2"; | ||
145 | parts[i].size = (size / 2) - (0x20000000 - 0x1fc00000); | ||
146 | i++; | ||
147 | |||
148 | parts[i].offset = MTDPART_OFS_APPEND; | ||
149 | parts[i].name = "YAMON"; | ||
150 | parts[i].size = YAMON_SIZE; | ||
151 | parts[i].mask_flags = MTD_WRITEABLE; | ||
152 | i++; | ||
153 | |||
154 | parts[i].offset = MTDPART_OFS_APPEND; | ||
155 | parts[i].name = "raw kernel"; | ||
156 | parts[i].size = 0x00400000 - YAMON_SIZE - YAMON_ENV_SIZE; | ||
157 | i++; | ||
158 | |||
159 | parts[i].offset = MTDPART_OFS_APPEND; | ||
160 | parts[i].name = "YAMON Env"; | ||
161 | parts[i].size = YAMON_ENV_SIZE; | ||
162 | parts[i].mask_flags = MTD_WRITEABLE; | ||
163 | i++; | ||
164 | |||
165 | if (swapped) { | ||
166 | parts[i].offset = MTDPART_OFS_APPEND; | ||
167 | parts[i].name = "User FS"; | ||
168 | parts[i].size = size / 2; | ||
169 | i++; | ||
170 | } | ||
171 | |||
172 | pfd->width = width; | ||
173 | pfd->parts = parts; | ||
174 | pfd->nr_parts = 5; | ||
175 | |||
176 | pd->dev.platform_data = pfd; | ||
177 | pd->resource = res; | ||
178 | pd->num_resources = 1; | ||
179 | |||
180 | ret = platform_device_add(pd); | ||
181 | if (!ret) | ||
182 | return ret; | ||
183 | |||
184 | platform_device_put(pd); | ||
185 | out3: | ||
186 | kfree(pfd); | ||
187 | out2: | ||
188 | kfree(res); | ||
189 | out1: | ||
190 | kfree(parts); | ||
191 | out: | ||
192 | return ret; | ||
193 | } | ||
diff --git a/arch/mips/alchemy/devboards/platform.h b/arch/mips/alchemy/devboards/platform.h index 55ecf7e9258f..828c54e31157 100644 --- a/arch/mips/alchemy/devboards/platform.h +++ b/arch/mips/alchemy/devboards/platform.h | |||
@@ -15,4 +15,7 @@ int __init db1x_register_pcmcia_socket(unsigned long pseudo_attr_start, | |||
15 | int eject_irq, | 15 | int eject_irq, |
16 | int id); | 16 | int id); |
17 | 17 | ||
18 | int __init db1x_register_norflash(unsigned long size, int width, | ||
19 | int swapped); | ||
20 | |||
18 | #endif | 21 | #endif |
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig index 2de0cc823d60..2bb03a8b9ef1 100644 --- a/drivers/mtd/maps/Kconfig +++ b/drivers/mtd/maps/Kconfig | |||
@@ -251,12 +251,6 @@ config MTD_NETtel | |||
251 | help | 251 | help |
252 | Support for flash chips on NETtel/SecureEdge/SnapGear boards. | 252 | Support for flash chips on NETtel/SecureEdge/SnapGear boards. |
253 | 253 | ||
254 | config MTD_ALCHEMY | ||
255 | tristate "AMD Alchemy Pb1xxx/Db1xxx/RDK MTD support" | ||
256 | depends on SOC_AU1X00 && MTD_PARTITIONS && MTD_CFI | ||
257 | help | ||
258 | Flash memory access on AMD Alchemy Pb/Db/RDK Reference Boards | ||
259 | |||
260 | config MTD_DILNETPC | 254 | config MTD_DILNETPC |
261 | tristate "CFI Flash device mapped on DIL/Net PC" | 255 | tristate "CFI Flash device mapped on DIL/Net PC" |
262 | depends on X86 && MTD_CONCAT && MTD_PARTITIONS && MTD_CFI_INTELEXT && BROKEN | 256 | depends on X86 && MTD_CONCAT && MTD_PARTITIONS && MTD_CFI_INTELEXT && BROKEN |
diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile index ce315214ff2b..a44919f3f3d2 100644 --- a/drivers/mtd/maps/Makefile +++ b/drivers/mtd/maps/Makefile | |||
@@ -40,7 +40,6 @@ obj-$(CONFIG_MTD_SCx200_DOCFLASH)+= scx200_docflash.o | |||
40 | obj-$(CONFIG_MTD_DBOX2) += dbox2-flash.o | 40 | obj-$(CONFIG_MTD_DBOX2) += dbox2-flash.o |
41 | obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o | 41 | obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o |
42 | obj-$(CONFIG_MTD_PCI) += pci.o | 42 | obj-$(CONFIG_MTD_PCI) += pci.o |
43 | obj-$(CONFIG_MTD_ALCHEMY) += alchemy-flash.o | ||
44 | obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o | 43 | obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o |
45 | obj-$(CONFIG_MTD_EDB7312) += edb7312.o | 44 | obj-$(CONFIG_MTD_EDB7312) += edb7312.o |
46 | obj-$(CONFIG_MTD_IMPA7) += impa7.o | 45 | obj-$(CONFIG_MTD_IMPA7) += impa7.o |
diff --git a/drivers/mtd/maps/alchemy-flash.c b/drivers/mtd/maps/alchemy-flash.c deleted file mode 100644 index 845ad4f2a542..000000000000 --- a/drivers/mtd/maps/alchemy-flash.c +++ /dev/null | |||
@@ -1,166 +0,0 @@ | |||
1 | /* | ||
2 | * Flash memory access on AMD Alchemy evaluation boards | ||
3 | * | ||
4 | * (C) 2003, 2004 Pete Popov <ppopov@embeddedalley.com> | ||
5 | */ | ||
6 | |||
7 | #include <linux/init.h> | ||
8 | #include <linux/module.h> | ||
9 | #include <linux/types.h> | ||
10 | #include <linux/kernel.h> | ||
11 | |||
12 | #include <linux/mtd/mtd.h> | ||
13 | #include <linux/mtd/map.h> | ||
14 | #include <linux/mtd/partitions.h> | ||
15 | |||
16 | #include <asm/io.h> | ||
17 | |||
18 | #ifdef CONFIG_MIPS_PB1000 | ||
19 | #define BOARD_MAP_NAME "Pb1000 Flash" | ||
20 | #define BOARD_FLASH_SIZE 0x00800000 /* 8MB */ | ||
21 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
22 | #endif | ||
23 | |||
24 | #ifdef CONFIG_MIPS_PB1500 | ||
25 | #define BOARD_MAP_NAME "Pb1500 Flash" | ||
26 | #define BOARD_FLASH_SIZE 0x04000000 /* 64MB */ | ||
27 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
28 | #endif | ||
29 | |||
30 | #ifdef CONFIG_MIPS_PB1100 | ||
31 | #define BOARD_MAP_NAME "Pb1100 Flash" | ||
32 | #define BOARD_FLASH_SIZE 0x04000000 /* 64MB */ | ||
33 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
34 | #endif | ||
35 | |||
36 | #ifdef CONFIG_MIPS_PB1550 | ||
37 | #define BOARD_MAP_NAME "Pb1550 Flash" | ||
38 | #define BOARD_FLASH_SIZE 0x08000000 /* 128MB */ | ||
39 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
40 | #endif | ||
41 | |||
42 | #ifdef CONFIG_MIPS_PB1200 | ||
43 | #define BOARD_MAP_NAME "Pb1200 Flash" | ||
44 | #define BOARD_FLASH_SIZE 0x08000000 /* 128MB */ | ||
45 | #define BOARD_FLASH_WIDTH 2 /* 16-bits */ | ||
46 | #endif | ||
47 | |||
48 | #ifdef CONFIG_MIPS_DB1000 | ||
49 | #define BOARD_MAP_NAME "Db1000 Flash" | ||
50 | #define BOARD_FLASH_SIZE 0x02000000 /* 32MB */ | ||
51 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
52 | #endif | ||
53 | |||
54 | #ifdef CONFIG_MIPS_DB1500 | ||
55 | #define BOARD_MAP_NAME "Db1500 Flash" | ||
56 | #define BOARD_FLASH_SIZE 0x02000000 /* 32MB */ | ||
57 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
58 | #endif | ||
59 | |||
60 | #ifdef CONFIG_MIPS_DB1100 | ||
61 | #define BOARD_MAP_NAME "Db1100 Flash" | ||
62 | #define BOARD_FLASH_SIZE 0x02000000 /* 32MB */ | ||
63 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
64 | #endif | ||
65 | |||
66 | #ifdef CONFIG_MIPS_DB1550 | ||
67 | #define BOARD_MAP_NAME "Db1550 Flash" | ||
68 | #define BOARD_FLASH_SIZE 0x08000000 /* 128MB */ | ||
69 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
70 | #endif | ||
71 | |||
72 | #ifdef CONFIG_MIPS_DB1200 | ||
73 | #define BOARD_MAP_NAME "Db1200 Flash" | ||
74 | #define BOARD_FLASH_SIZE 0x04000000 /* 64MB */ | ||
75 | #define BOARD_FLASH_WIDTH 2 /* 16-bits */ | ||
76 | #endif | ||
77 | |||
78 | #ifdef CONFIG_MIPS_BOSPORUS | ||
79 | #define BOARD_MAP_NAME "Bosporus Flash" | ||
80 | #define BOARD_FLASH_SIZE 0x01000000 /* 16MB */ | ||
81 | #define BOARD_FLASH_WIDTH 2 /* 16-bits */ | ||
82 | #endif | ||
83 | |||
84 | #ifdef CONFIG_MIPS_MIRAGE | ||
85 | #define BOARD_MAP_NAME "Mirage Flash" | ||
86 | #define BOARD_FLASH_SIZE 0x04000000 /* 64MB */ | ||
87 | #define BOARD_FLASH_WIDTH 4 /* 32-bits */ | ||
88 | #define USE_LOCAL_ACCESSORS /* why? */ | ||
89 | #endif | ||
90 | |||
91 | static struct map_info alchemy_map = { | ||
92 | .name = BOARD_MAP_NAME, | ||
93 | }; | ||
94 | |||
95 | static struct mtd_partition alchemy_partitions[] = { | ||
96 | { | ||
97 | .name = "User FS", | ||
98 | .size = BOARD_FLASH_SIZE - 0x00400000, | ||
99 | .offset = 0x0000000 | ||
100 | },{ | ||
101 | .name = "YAMON", | ||
102 | .size = 0x0100000, | ||
103 | .offset = MTDPART_OFS_APPEND, | ||
104 | .mask_flags = MTD_WRITEABLE | ||
105 | },{ | ||
106 | .name = "raw kernel", | ||
107 | .size = (0x300000 - 0x40000), /* last 256KB is yamon env */ | ||
108 | .offset = MTDPART_OFS_APPEND, | ||
109 | } | ||
110 | }; | ||
111 | |||
112 | static struct mtd_info *mymtd; | ||
113 | |||
114 | static int __init alchemy_mtd_init(void) | ||
115 | { | ||
116 | struct mtd_partition *parts; | ||
117 | int nb_parts = 0; | ||
118 | unsigned long window_addr; | ||
119 | unsigned long window_size; | ||
120 | |||
121 | /* Default flash buswidth */ | ||
122 | alchemy_map.bankwidth = BOARD_FLASH_WIDTH; | ||
123 | |||
124 | window_addr = 0x20000000 - BOARD_FLASH_SIZE; | ||
125 | window_size = BOARD_FLASH_SIZE; | ||
126 | |||
127 | /* | ||
128 | * Static partition definition selection | ||
129 | */ | ||
130 | parts = alchemy_partitions; | ||
131 | nb_parts = ARRAY_SIZE(alchemy_partitions); | ||
132 | alchemy_map.size = window_size; | ||
133 | |||
134 | /* | ||
135 | * Now let's probe for the actual flash. Do it here since | ||
136 | * specific machine settings might have been set above. | ||
137 | */ | ||
138 | printk(KERN_NOTICE BOARD_MAP_NAME ": probing %d-bit flash bus\n", | ||
139 | alchemy_map.bankwidth*8); | ||
140 | alchemy_map.virt = ioremap(window_addr, window_size); | ||
141 | mymtd = do_map_probe("cfi_probe", &alchemy_map); | ||
142 | if (!mymtd) { | ||
143 | iounmap(alchemy_map.virt); | ||
144 | return -ENXIO; | ||
145 | } | ||
146 | mymtd->owner = THIS_MODULE; | ||
147 | |||
148 | add_mtd_partitions(mymtd, parts, nb_parts); | ||
149 | return 0; | ||
150 | } | ||
151 | |||
152 | static void __exit alchemy_mtd_cleanup(void) | ||
153 | { | ||
154 | if (mymtd) { | ||
155 | del_mtd_partitions(mymtd); | ||
156 | map_destroy(mymtd); | ||
157 | iounmap(alchemy_map.virt); | ||
158 | } | ||
159 | } | ||
160 | |||
161 | module_init(alchemy_mtd_init); | ||
162 | module_exit(alchemy_mtd_cleanup); | ||
163 | |||
164 | MODULE_AUTHOR("Embedded Alley Solutions, Inc"); | ||
165 | MODULE_DESCRIPTION(BOARD_MAP_NAME " MTD driver"); | ||
166 | MODULE_LICENSE("GPL"); | ||