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authorYong Wang <yong.y.wang@linux.intel.com>2010-01-10 14:52:34 -0500
committerJean Delvare <khali@linux-fr.org>2010-01-10 14:52:34 -0500
commit1fe63ab47a617ee95f562eaa7ddbbc59981ff8c6 (patch)
tree45b7d542d9a9b25bb9416f92f748c336d9aae40f
parentc5114a1cd6d84b2b3144c1c3e093c80ca6c30f47 (diff)
hwmon: (coretemp) Fix TjMax for Atom N450/D410/D510 CPUs
The max junction temperature of Atom N450/D410/D510 CPUs is 100 degrees Celsius. Since these CPUs are always coupled with Intel NM10 chipset in one package, the best way to verify whether an Atom CPU is N450/D410/D510 is to check the host bridge device. Signed-off-by: Yong Wang <yong.y.wang@intel.com> Acked-by: Huaxu Wan <huaxu.wan@intel.com> Signed-off-by: Jean Delvare <khali@linux-fr.org>
-rw-r--r--drivers/hwmon/Kconfig2
-rw-r--r--drivers/hwmon/coretemp.c16
2 files changed, 15 insertions, 3 deletions
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 46c3c566307e..435ae72fc47a 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -392,7 +392,7 @@ config SENSORS_GL520SM
392 392
393config SENSORS_CORETEMP 393config SENSORS_CORETEMP
394 tristate "Intel Core/Core2/Atom temperature sensor" 394 tristate "Intel Core/Core2/Atom temperature sensor"
395 depends on X86 && EXPERIMENTAL 395 depends on X86 && PCI && EXPERIMENTAL
396 help 396 help
397 If you say yes here you get support for the temperature 397 If you say yes here you get support for the temperature
398 sensor inside your CPU. Most of the family 6 CPUs 398 sensor inside your CPU. Most of the family 6 CPUs
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index caef39cda8c8..2d7bceeed0bc 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -33,6 +33,7 @@
33#include <linux/list.h> 33#include <linux/list.h>
34#include <linux/platform_device.h> 34#include <linux/platform_device.h>
35#include <linux/cpu.h> 35#include <linux/cpu.h>
36#include <linux/pci.h>
36#include <asm/msr.h> 37#include <asm/msr.h>
37#include <asm/processor.h> 38#include <asm/processor.h>
38 39
@@ -161,6 +162,7 @@ static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *
161 int usemsr_ee = 1; 162 int usemsr_ee = 1;
162 int err; 163 int err;
163 u32 eax, edx; 164 u32 eax, edx;
165 struct pci_dev *host_bridge;
164 166
165 /* Early chips have no MSR for TjMax */ 167 /* Early chips have no MSR for TjMax */
166 168
@@ -168,11 +170,21 @@ static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *
168 usemsr_ee = 0; 170 usemsr_ee = 0;
169 } 171 }
170 172
171 /* Atoms seems to have TjMax at 90C */ 173 /* Atom CPUs */
172 174
173 if (c->x86_model == 0x1c) { 175 if (c->x86_model == 0x1c) {
174 usemsr_ee = 0; 176 usemsr_ee = 0;
175 tjmax = 90000; 177
178 host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
179
180 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
181 && (host_bridge->device == 0xa000 /* NM10 based nettop */
182 || host_bridge->device == 0xa010)) /* NM10 based netbook */
183 tjmax = 100000;
184 else
185 tjmax = 90000;
186
187 pci_dev_put(host_bridge);
176 } 188 }
177 189
178 if ((c->x86_model > 0xe) && (usemsr_ee)) { 190 if ((c->x86_model > 0xe) && (usemsr_ee)) {