diff options
author | Jerome Glisse <jglisse@redhat.com> | 2009-12-10 11:16:28 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2009-12-10 23:09:27 -0500 |
commit | 1fb107fc46692a000533da3d6904ac28b6b3148d (patch) | |
tree | 50f39e63fad88552941006ad8c8e8baa33155210 | |
parent | 09855acb1c2e3779f25317ec9a8ffe1b1784a4a8 (diff) |
drm/radeon/kms: Convert radeon to new ttm_bo_init
Now bo init use placement structure like bo validation does.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_object.c | 39 |
1 files changed, 9 insertions, 30 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index 2040937682fd..544e18ffaf22 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c | |||
@@ -56,25 +56,6 @@ static void radeon_ttm_bo_destroy(struct ttm_buffer_object *tbo) | |||
56 | kfree(bo); | 56 | kfree(bo); |
57 | } | 57 | } |
58 | 58 | ||
59 | static inline u32 radeon_ttm_flags_from_domain(u32 domain) | ||
60 | { | ||
61 | u32 flags = 0; | ||
62 | |||
63 | if (domain & RADEON_GEM_DOMAIN_VRAM) { | ||
64 | flags |= TTM_PL_FLAG_VRAM | TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED; | ||
65 | } | ||
66 | if (domain & RADEON_GEM_DOMAIN_GTT) { | ||
67 | flags |= TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING; | ||
68 | } | ||
69 | if (domain & RADEON_GEM_DOMAIN_CPU) { | ||
70 | flags |= TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING; | ||
71 | } | ||
72 | if (!flags) { | ||
73 | flags |= TTM_PL_FLAG_SYSTEM | TTM_PL_MASK_CACHING; | ||
74 | } | ||
75 | return flags; | ||
76 | } | ||
77 | |||
78 | void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain) | 59 | void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain) |
79 | { | 60 | { |
80 | u32 c = 0; | 61 | u32 c = 0; |
@@ -100,7 +81,6 @@ int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj, | |||
100 | { | 81 | { |
101 | struct radeon_bo *bo; | 82 | struct radeon_bo *bo; |
102 | enum ttm_bo_type type; | 83 | enum ttm_bo_type type; |
103 | u32 flags; | ||
104 | int r; | 84 | int r; |
105 | 85 | ||
106 | if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) { | 86 | if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) { |
@@ -120,16 +100,16 @@ int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj, | |||
120 | bo->surface_reg = -1; | 100 | bo->surface_reg = -1; |
121 | INIT_LIST_HEAD(&bo->list); | 101 | INIT_LIST_HEAD(&bo->list); |
122 | 102 | ||
123 | flags = radeon_ttm_flags_from_domain(domain); | 103 | radeon_ttm_placement_from_domain(bo, domain); |
124 | /* Kernel allocation are uninterruptible */ | 104 | /* Kernel allocation are uninterruptible */ |
125 | r = ttm_buffer_object_init(&rdev->mman.bdev, &bo->tbo, size, type, | 105 | r = ttm_bo_init(&rdev->mman.bdev, &bo->tbo, size, type, |
126 | flags, 0, 0, !kernel, NULL, size, | 106 | &bo->placement, 0, 0, !kernel, NULL, size, |
127 | &radeon_ttm_bo_destroy); | 107 | &radeon_ttm_bo_destroy); |
128 | if (unlikely(r != 0)) { | 108 | if (unlikely(r != 0)) { |
129 | if (r != -ERESTARTSYS) | 109 | if (r != -ERESTARTSYS) |
130 | dev_err(rdev->dev, | 110 | dev_err(rdev->dev, |
131 | "object_init failed for (%ld, 0x%08X)\n", | 111 | "object_init failed for (%lu, 0x%08X)\n", |
132 | size, flags); | 112 | size, domain); |
133 | return r; | 113 | return r; |
134 | } | 114 | } |
135 | *bo_ptr = bo; | 115 | *bo_ptr = bo; |
@@ -199,7 +179,7 @@ int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr) | |||
199 | radeon_ttm_placement_from_domain(bo, domain); | 179 | radeon_ttm_placement_from_domain(bo, domain); |
200 | for (i = 0; i < bo->placement.num_placement; i++) | 180 | for (i = 0; i < bo->placement.num_placement; i++) |
201 | bo->placements[i] |= TTM_PL_FLAG_NO_EVICT; | 181 | bo->placements[i] |= TTM_PL_FLAG_NO_EVICT; |
202 | r = ttm_buffer_object_validate(&bo->tbo, &bo->placement, false, false); | 182 | r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false); |
203 | if (likely(r == 0)) { | 183 | if (likely(r == 0)) { |
204 | bo->pin_count = 1; | 184 | bo->pin_count = 1; |
205 | if (gpu_addr != NULL) | 185 | if (gpu_addr != NULL) |
@@ -223,7 +203,7 @@ int radeon_bo_unpin(struct radeon_bo *bo) | |||
223 | return 0; | 203 | return 0; |
224 | for (i = 0; i < bo->placement.num_placement; i++) | 204 | for (i = 0; i < bo->placement.num_placement; i++) |
225 | bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT; | 205 | bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT; |
226 | r = ttm_buffer_object_validate(&bo->tbo, &bo->placement, false, false); | 206 | r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false); |
227 | if (unlikely(r != 0)) | 207 | if (unlikely(r != 0)) |
228 | dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo); | 208 | dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo); |
229 | return r; | 209 | return r; |
@@ -336,8 +316,7 @@ int radeon_bo_list_validate(struct list_head *head, void *fence) | |||
336 | radeon_ttm_placement_from_domain(bo, | 316 | radeon_ttm_placement_from_domain(bo, |
337 | lobj->rdomain); | 317 | lobj->rdomain); |
338 | } | 318 | } |
339 | r = ttm_buffer_object_validate(&bo->tbo, | 319 | r = ttm_bo_validate(&bo->tbo, &bo->placement, |
340 | &bo->placement, | ||
341 | true, false); | 320 | true, false); |
342 | if (unlikely(r)) | 321 | if (unlikely(r)) |
343 | return r; | 322 | return r; |