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author | Ivan Khoronzhuk <ivan.khoronzhuk@ti.com> | 2014-03-18 15:59:26 -0400 |
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committer | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2014-03-18 15:59:26 -0400 |
commit | 1f9f5201a3983ce12fd8b4b8838586606ef13dd2 (patch) | |
tree | 74fb1edfe8e479fbf8fc670c275eac7e42382e24 | |
parent | 754f67cdfe708b4bacefb869e89bf3fc50a4f49e (diff) |
ARM: dts: keystone: Fix control register range for clktsip
The control register range for clktsio interferes with clkaemifspi clock.
And it causes issues for NAND/AEMIF. So fix it.
Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
-rw-r--r-- | arch/arm/boot/dts/k2hk-clocks.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/k2hk-clocks.dtsi b/arch/arm/boot/dts/k2hk-clocks.dtsi index f8e5729bd858..96e65365afe3 100644 --- a/arch/arm/boot/dts/k2hk-clocks.dtsi +++ b/arch/arm/boot/dts/k2hk-clocks.dtsi | |||
@@ -59,7 +59,7 @@ clocks { | |||
59 | compatible = "ti,keystone,psc-clock"; | 59 | compatible = "ti,keystone,psc-clock"; |
60 | clocks = <&chipclk16>; | 60 | clocks = <&chipclk16>; |
61 | clock-output-names = "tsip"; | 61 | clock-output-names = "tsip"; |
62 | reg = <0x0235000c 0xb00>, <0x02350000 0x400>; | 62 | reg = <0x02350000 0xb00>, <0x02350000 0x400>; |
63 | reg-names = "control", "domain"; | 63 | reg-names = "control", "domain"; |
64 | domain-id = <0>; | 64 | domain-id = <0>; |
65 | }; | 65 | }; |