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authorBrian Murphy <brm@murphy.dk>2007-08-21 16:34:16 -0400
committerRalf Baechle <ralf@linux-mips.org>2007-10-11 18:46:00 -0400
commit1f21d2bde0046e959b53756f74d96dfd040a803b (patch)
tree5ca1a0319982f1e665e57f22bd1dae1d90b07e35
parent0caf583398309398ec05fc76bff15c711e9f936d (diff)
[MIPS] Add back support for LASAT platforms
Signed-off-by: Brian Murphy <brian@murphy.dk> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat
-rw-r--r--arch/mips/Kconfig18
-rw-r--r--arch/mips/Makefile13
-rw-r--r--arch/mips/configs/lasat_defconfig828
-rw-r--r--arch/mips/lasat/Kconfig15
-rw-r--r--arch/mips/lasat/Makefile16
-rw-r--r--arch/mips/lasat/at93c.c149
-rw-r--r--arch/mips/lasat/at93c.h18
-rw-r--r--arch/mips/lasat/ds1603.c183
-rw-r--r--arch/mips/lasat/ds1603.h33
-rw-r--r--arch/mips/lasat/image/Makefile54
-rw-r--r--arch/mips/lasat/image/head.S31
-rw-r--r--arch/mips/lasat/image/romscript.normal23
-rw-r--r--arch/mips/lasat/interrupt.c130
-rw-r--r--arch/mips/lasat/lasat_board.c280
-rw-r--r--arch/mips/lasat/lasat_models.h67
-rw-r--r--arch/mips/lasat/picvue.c244
-rw-r--r--arch/mips/lasat/picvue.h48
-rw-r--r--arch/mips/lasat/picvue_proc.c191
-rw-r--r--arch/mips/lasat/prom.c128
-rw-r--r--arch/mips/lasat/prom.h7
-rw-r--r--arch/mips/lasat/reset.c61
-rw-r--r--arch/mips/lasat/serial.c94
-rw-r--r--arch/mips/lasat/setup.c158
-rw-r--r--arch/mips/lasat/sysctl.c454
-rw-r--r--arch/mips/lasat/sysctl.h24
-rw-r--r--arch/mips/pci/Makefile2
-rw-r--r--arch/mips/pci/ops-nile4.c147
-rw-r--r--arch/mips/pci/pci-lasat.c91
-rw-r--r--include/asm-mips/bootinfo.h7
-rw-r--r--include/asm-mips/lasat/ds1603.h18
-rw-r--r--include/asm-mips/lasat/eeprom.h17
-rw-r--r--include/asm-mips/lasat/head.h22
-rw-r--r--include/asm-mips/lasat/lasat.h256
-rw-r--r--include/asm-mips/lasat/lasatint.h12
-rw-r--r--include/asm-mips/lasat/picvue.h15
-rw-r--r--include/asm-mips/lasat/serial.h13
-rw-r--r--include/asm-mips/mach-lasat/mach-gt64120.h27
-rw-r--r--include/asm-mips/nile4.h310
38 files changed, 4204 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 492f581fe6ba..bb3fb4018602 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -107,6 +107,20 @@ config MACH_JAZZ
107 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and 107 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and
108 Olivetti M700-10 workstations. 108 Olivetti M700-10 workstations.
109 109
110config LASAT
111 bool "LASAT Networks platforms"
112 select DMA_NONCOHERENT
113 select SYS_HAS_EARLY_PRINTK
114 select HW_HAS_PCI
115 select PCI_GT64XXX_PCI0
116 select MIPS_NILE4
117 select R5000_CPU_SCACHE
118 select SYS_HAS_CPU_R5000
119 select SYS_SUPPORTS_32BIT_KERNEL
120 select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
121 select SYS_SUPPORTS_LITTLE_ENDIAN
122 select GENERIC_HARDIRQS_NO__DO_IRQ
123
110config LEMOTE_FULONG 124config LEMOTE_FULONG
111 bool "Lemote Fulong mini-PC" 125 bool "Lemote Fulong mini-PC"
112 select ARCH_SPARSEMEM_ENABLE 126 select ARCH_SPARSEMEM_ENABLE
@@ -599,6 +613,7 @@ endchoice
599 613
600source "arch/mips/au1000/Kconfig" 614source "arch/mips/au1000/Kconfig"
601source "arch/mips/jazz/Kconfig" 615source "arch/mips/jazz/Kconfig"
616source "arch/mips/lasat/Kconfig"
602source "arch/mips/pmc-sierra/Kconfig" 617source "arch/mips/pmc-sierra/Kconfig"
603source "arch/mips/sgi-ip27/Kconfig" 618source "arch/mips/sgi-ip27/Kconfig"
604source "arch/mips/sibyte/Kconfig" 619source "arch/mips/sibyte/Kconfig"
@@ -706,6 +721,9 @@ config MIPS_BONITO64
706config MIPS_MSC 721config MIPS_MSC
707 bool 722 bool
708 723
724config MIPS_NILE4
725 bool
726
709config MIPS_DISABLE_OBSOLETE_IDE 727config MIPS_DISABLE_OBSOLETE_IDE
710 bool 728 bool
711 729
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index ce7e02e613a7..6dcdbfb15ce3 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -362,6 +362,13 @@ cflags-$(CONFIG_BASLER_EXCITE) += -Iinclude/asm-mips/mach-excite
362load-$(CONFIG_BASLER_EXCITE) += 0x80100000 362load-$(CONFIG_BASLER_EXCITE) += 0x80100000
363 363
364# 364#
365# LASAT platforms
366#
367core-$(CONFIG_LASAT) += arch/mips/lasat/
368cflags-$(CONFIG_LASAT) += -Iinclude/asm-mips/mach-lasat
369load-$(CONFIG_LASAT) += 0xffffffff80000000
370
371#
365# Common VR41xx 372# Common VR41xx
366# 373#
367core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/ 374core-$(CONFIG_MACH_VR41XX) += arch/mips/vr41xx/common/
@@ -628,6 +635,11 @@ core-y += arch/mips/kernel/ arch/mips/mm/ arch/mips/math-emu/
628 635
629drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/ 636drivers-$(CONFIG_OPROFILE) += arch/mips/oprofile/
630 637
638ifdef CONFIG_LASAT
639rom.bin rom.sw: vmlinux
640 $(Q)$(MAKE) $(build)=arch/mips/lasat/image $@
641endif
642
631# 643#
632# Some machines like the Indy need 32-bit ELF binaries for booting purposes. 644# Some machines like the Indy need 32-bit ELF binaries for booting purposes.
633# Other need ECOFF, so we build a 32-bit ELF binary for them which we then 645# Other need ECOFF, so we build a 32-bit ELF binary for them which we then
@@ -671,6 +683,7 @@ endif
671 683
672archclean: 684archclean:
673 @$(MAKE) $(clean)=arch/mips/boot 685 @$(MAKE) $(clean)=arch/mips/boot
686 @$(MAKE) $(clean)=arch/mips/lasat
674 687
675define archhelp 688define archhelp
676 echo ' vmlinux.ecoff - ECOFF boot image' 689 echo ' vmlinux.ecoff - ECOFF boot image'
diff --git a/arch/mips/configs/lasat_defconfig b/arch/mips/configs/lasat_defconfig
new file mode 100644
index 000000000000..2c665fcef089
--- /dev/null
+++ b/arch/mips/configs/lasat_defconfig
@@ -0,0 +1,828 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.23-rc3
4# Sat Aug 18 17:37:58 2007
5#
6CONFIG_MIPS=y
7
8#
9# Machine selection
10#
11# CONFIG_MACH_ALCHEMY is not set
12# CONFIG_BASLER_EXCITE is not set
13# CONFIG_MIPS_COBALT is not set
14# CONFIG_MACH_DECSTATION is not set
15# CONFIG_MACH_JAZZ is not set
16CONFIG_LASAT=y
17# CONFIG_LEMOTE_FULONG is not set
18# CONFIG_MIPS_ATLAS is not set
19# CONFIG_MIPS_MALTA is not set
20# CONFIG_MIPS_SEAD is not set
21# CONFIG_MIPS_SIM is not set
22# CONFIG_MARKEINS is not set
23# CONFIG_MACH_VR41XX is not set
24# CONFIG_PNX8550_JBS is not set
25# CONFIG_PNX8550_STB810 is not set
26# CONFIG_PMC_MSP is not set
27# CONFIG_PMC_YOSEMITE is not set
28# CONFIG_QEMU is not set
29# CONFIG_SGI_IP22 is not set
30# CONFIG_SGI_IP27 is not set
31# CONFIG_SGI_IP32 is not set
32# CONFIG_SIBYTE_CRHINE is not set
33# CONFIG_SIBYTE_CARMEL is not set
34# CONFIG_SIBYTE_CRHONE is not set
35# CONFIG_SIBYTE_RHONE is not set
36# CONFIG_SIBYTE_SWARM is not set
37# CONFIG_SIBYTE_LITTLESUR is not set
38# CONFIG_SIBYTE_SENTOSA is not set
39# CONFIG_SIBYTE_PTSWARM is not set
40# CONFIG_SIBYTE_BIGSUR is not set
41# CONFIG_SNI_RM is not set
42# CONFIG_TOSHIBA_JMR3927 is not set
43# CONFIG_TOSHIBA_RBTX4927 is not set
44# CONFIG_TOSHIBA_RBTX4938 is not set
45# CONFIG_WR_PPMC is not set
46CONFIG_PICVUE=y
47CONFIG_PICVUE_PROC=y
48CONFIG_DS1603=y
49CONFIG_LASAT_SYSCTL=y
50CONFIG_RWSEM_GENERIC_SPINLOCK=y
51# CONFIG_ARCH_HAS_ILOG2_U32 is not set
52# CONFIG_ARCH_HAS_ILOG2_U64 is not set
53CONFIG_GENERIC_FIND_NEXT_BIT=y
54CONFIG_GENERIC_HWEIGHT=y
55CONFIG_GENERIC_CALIBRATE_DELAY=y
56CONFIG_GENERIC_TIME=y
57CONFIG_GENERIC_CMOS_UPDATE=y
58CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
59CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
60CONFIG_DMA_NONCOHERENT=y
61CONFIG_DMA_NEED_PCI_MAP_STATE=y
62CONFIG_EARLY_PRINTK=y
63CONFIG_SYS_HAS_EARLY_PRINTK=y
64# CONFIG_HOTPLUG_CPU is not set
65CONFIG_MIPS_NILE4=y
66# CONFIG_NO_IOPORT is not set
67# CONFIG_CPU_BIG_ENDIAN is not set
68CONFIG_CPU_LITTLE_ENDIAN=y
69CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
70CONFIG_PCI_GT64XXX_PCI0=y
71CONFIG_MIPS_L1_CACHE_SHIFT=5
72
73#
74# CPU selection
75#
76# CONFIG_CPU_LOONGSON2 is not set
77# CONFIG_CPU_MIPS32_R1 is not set
78# CONFIG_CPU_MIPS32_R2 is not set
79# CONFIG_CPU_MIPS64_R1 is not set
80# CONFIG_CPU_MIPS64_R2 is not set
81# CONFIG_CPU_R3000 is not set
82# CONFIG_CPU_TX39XX is not set
83# CONFIG_CPU_VR41XX is not set
84# CONFIG_CPU_R4300 is not set
85# CONFIG_CPU_R4X00 is not set
86# CONFIG_CPU_TX49XX is not set
87CONFIG_CPU_R5000=y
88# CONFIG_CPU_R5432 is not set
89# CONFIG_CPU_R6000 is not set
90# CONFIG_CPU_NEVADA is not set
91# CONFIG_CPU_R8000 is not set
92# CONFIG_CPU_R10000 is not set
93# CONFIG_CPU_RM7000 is not set
94# CONFIG_CPU_RM9000 is not set
95# CONFIG_CPU_SB1 is not set
96CONFIG_SYS_HAS_CPU_R5000=y
97CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
98CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
99CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y
100
101#
102# Kernel type
103#
104CONFIG_32BIT=y
105# CONFIG_64BIT is not set
106CONFIG_PAGE_SIZE_4KB=y
107# CONFIG_PAGE_SIZE_8KB is not set
108# CONFIG_PAGE_SIZE_16KB is not set
109# CONFIG_PAGE_SIZE_64KB is not set
110CONFIG_BOARD_SCACHE=y
111CONFIG_R5000_CPU_SCACHE=y
112CONFIG_MIPS_MT_DISABLED=y
113# CONFIG_MIPS_MT_SMP is not set
114# CONFIG_MIPS_MT_SMTC is not set
115CONFIG_CPU_HAS_LLSC=y
116CONFIG_CPU_HAS_SYNC=y
117CONFIG_GENERIC_HARDIRQS=y
118CONFIG_GENERIC_IRQ_PROBE=y
119CONFIG_ARCH_FLATMEM_ENABLE=y
120CONFIG_SELECT_MEMORY_MODEL=y
121CONFIG_FLATMEM_MANUAL=y
122# CONFIG_DISCONTIGMEM_MANUAL is not set
123# CONFIG_SPARSEMEM_MANUAL is not set
124CONFIG_FLATMEM=y
125CONFIG_FLAT_NODE_MEM_MAP=y
126# CONFIG_SPARSEMEM_STATIC is not set
127CONFIG_SPLIT_PTLOCK_CPUS=4
128# CONFIG_RESOURCES_64BIT is not set
129CONFIG_ZONE_DMA_FLAG=0
130CONFIG_VIRT_TO_BUS=y
131# CONFIG_HZ_48 is not set
132# CONFIG_HZ_100 is not set
133# CONFIG_HZ_128 is not set
134# CONFIG_HZ_250 is not set
135# CONFIG_HZ_256 is not set
136CONFIG_HZ_1000=y
137# CONFIG_HZ_1024 is not set
138CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
139CONFIG_HZ=1000
140CONFIG_PREEMPT_NONE=y
141# CONFIG_PREEMPT_VOLUNTARY is not set
142# CONFIG_PREEMPT is not set
143# CONFIG_KEXEC is not set
144# CONFIG_SECCOMP is not set
145CONFIG_LOCKDEP_SUPPORT=y
146CONFIG_STACKTRACE_SUPPORT=y
147CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
148
149#
150# General setup
151#
152CONFIG_EXPERIMENTAL=y
153CONFIG_BROKEN_ON_SMP=y
154CONFIG_INIT_ENV_ARG_LIMIT=32
155CONFIG_LOCALVERSION=""
156CONFIG_LOCALVERSION_AUTO=y
157CONFIG_SWAP=y
158CONFIG_SYSVIPC=y
159CONFIG_SYSVIPC_SYSCTL=y
160# CONFIG_POSIX_MQUEUE is not set
161# CONFIG_BSD_PROCESS_ACCT is not set
162# CONFIG_TASKSTATS is not set
163# CONFIG_USER_NS is not set
164# CONFIG_AUDIT is not set
165# CONFIG_IKCONFIG is not set
166CONFIG_LOG_BUF_SHIFT=14
167# CONFIG_SYSFS_DEPRECATED is not set
168# CONFIG_RELAY is not set
169# CONFIG_BLK_DEV_INITRD is not set
170CONFIG_CC_OPTIMIZE_FOR_SIZE=y
171CONFIG_SYSCTL=y
172CONFIG_EMBEDDED=y
173# CONFIG_SYSCTL_SYSCALL is not set
174# CONFIG_KALLSYMS is not set
175# CONFIG_HOTPLUG is not set
176CONFIG_PRINTK=y
177CONFIG_BUG=y
178CONFIG_ELF_CORE=y
179CONFIG_BASE_FULL=y
180CONFIG_FUTEX=y
181# CONFIG_EPOLL is not set
182# CONFIG_SIGNALFD is not set
183# CONFIG_TIMERFD is not set
184# CONFIG_EVENTFD is not set
185CONFIG_SHMEM=y
186CONFIG_VM_EVENT_COUNTERS=y
187CONFIG_SLAB=y
188# CONFIG_SLUB is not set
189# CONFIG_SLOB is not set
190CONFIG_RT_MUTEXES=y
191# CONFIG_TINY_SHMEM is not set
192CONFIG_BASE_SMALL=0
193# CONFIG_MODULES is not set
194CONFIG_BLOCK=y
195# CONFIG_LBD is not set
196# CONFIG_BLK_DEV_IO_TRACE is not set
197# CONFIG_LSF is not set
198# CONFIG_BLK_DEV_BSG is not set
199
200#
201# IO Schedulers
202#
203CONFIG_IOSCHED_NOOP=y
204CONFIG_IOSCHED_AS=y
205# CONFIG_IOSCHED_DEADLINE is not set
206# CONFIG_IOSCHED_CFQ is not set
207CONFIG_DEFAULT_AS=y
208# CONFIG_DEFAULT_DEADLINE is not set
209# CONFIG_DEFAULT_CFQ is not set
210# CONFIG_DEFAULT_NOOP is not set
211CONFIG_DEFAULT_IOSCHED="anticipatory"
212
213#
214# Bus options (PCI, PCMCIA, EISA, ISA, TC)
215#
216CONFIG_HW_HAS_PCI=y
217CONFIG_PCI=y
218# CONFIG_ARCH_SUPPORTS_MSI is not set
219CONFIG_MMU=y
220
221#
222# PCCARD (PCMCIA/CardBus) support
223#
224
225#
226# Executable file formats
227#
228CONFIG_BINFMT_ELF=y
229# CONFIG_BINFMT_MISC is not set
230CONFIG_TRAD_SIGNALS=y
231
232#
233# Power management options
234#
235# CONFIG_PM is not set
236
237#
238# Networking
239#
240CONFIG_NET=y
241
242#
243# Networking options
244#
245CONFIG_PACKET=y
246CONFIG_PACKET_MMAP=y
247CONFIG_UNIX=y
248# CONFIG_NET_KEY is not set
249CONFIG_INET=y
250# CONFIG_IP_MULTICAST is not set
251# CONFIG_IP_ADVANCED_ROUTER is not set
252CONFIG_IP_FIB_HASH=y
253# CONFIG_IP_PNP is not set
254# CONFIG_NET_IPIP is not set
255# CONFIG_NET_IPGRE is not set
256# CONFIG_ARPD is not set
257# CONFIG_SYN_COOKIES is not set
258# CONFIG_INET_AH is not set
259# CONFIG_INET_ESP is not set
260# CONFIG_INET_IPCOMP is not set
261# CONFIG_INET_XFRM_TUNNEL is not set
262# CONFIG_INET_TUNNEL is not set
263# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
264# CONFIG_INET_XFRM_MODE_TUNNEL is not set
265# CONFIG_INET_XFRM_MODE_BEET is not set
266# CONFIG_INET_DIAG is not set
267# CONFIG_TCP_CONG_ADVANCED is not set
268CONFIG_TCP_CONG_CUBIC=y
269CONFIG_DEFAULT_TCP_CONG="cubic"
270# CONFIG_TCP_MD5SIG is not set
271# CONFIG_IPV6 is not set
272# CONFIG_INET6_XFRM_TUNNEL is not set
273# CONFIG_INET6_TUNNEL is not set
274# CONFIG_NETWORK_SECMARK is not set
275# CONFIG_NETFILTER is not set
276# CONFIG_IP_DCCP is not set
277# CONFIG_IP_SCTP is not set
278# CONFIG_TIPC is not set
279# CONFIG_ATM is not set
280# CONFIG_BRIDGE is not set
281# CONFIG_VLAN_8021Q is not set
282# CONFIG_DECNET is not set
283# CONFIG_LLC2 is not set
284# CONFIG_IPX is not set
285# CONFIG_ATALK is not set
286# CONFIG_X25 is not set
287# CONFIG_LAPB is not set
288# CONFIG_ECONET is not set
289# CONFIG_WAN_ROUTER is not set
290
291#
292# QoS and/or fair queueing
293#
294# CONFIG_NET_SCHED is not set
295
296#
297# Network testing
298#
299# CONFIG_NET_PKTGEN is not set
300# CONFIG_HAMRADIO is not set
301# CONFIG_IRDA is not set
302# CONFIG_BT is not set
303# CONFIG_AF_RXRPC is not set
304
305#
306# Wireless
307#
308# CONFIG_CFG80211 is not set
309# CONFIG_WIRELESS_EXT is not set
310# CONFIG_MAC80211 is not set
311# CONFIG_IEEE80211 is not set
312# CONFIG_RFKILL is not set
313# CONFIG_NET_9P is not set
314
315#
316# Device Drivers
317#
318
319#
320# Generic Driver Options
321#
322CONFIG_STANDALONE=y
323CONFIG_PREVENT_FIRMWARE_BUILD=y
324# CONFIG_SYS_HYPERVISOR is not set
325# CONFIG_CONNECTOR is not set
326CONFIG_MTD=y
327# CONFIG_MTD_DEBUG is not set
328# CONFIG_MTD_CONCAT is not set
329CONFIG_MTD_PARTITIONS=y
330# CONFIG_MTD_REDBOOT_PARTS is not set
331# CONFIG_MTD_CMDLINE_PARTS is not set
332
333#
334# User Modules And Translation Layers
335#
336CONFIG_MTD_CHAR=y
337CONFIG_MTD_BLKDEVS=y
338CONFIG_MTD_BLOCK=y
339# CONFIG_FTL is not set
340# CONFIG_NFTL is not set
341# CONFIG_INFTL is not set
342# CONFIG_RFD_FTL is not set
343# CONFIG_SSFDC is not set
344
345#
346# RAM/ROM/Flash chip drivers
347#
348CONFIG_MTD_CFI=y
349# CONFIG_MTD_JEDECPROBE is not set
350CONFIG_MTD_GEN_PROBE=y
351# CONFIG_MTD_CFI_ADV_OPTIONS is not set
352CONFIG_MTD_MAP_BANK_WIDTH_1=y
353CONFIG_MTD_MAP_BANK_WIDTH_2=y
354CONFIG_MTD_MAP_BANK_WIDTH_4=y
355# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
356# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
357# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
358CONFIG_MTD_CFI_I1=y
359CONFIG_MTD_CFI_I2=y
360# CONFIG_MTD_CFI_I4 is not set
361# CONFIG_MTD_CFI_I8 is not set
362# CONFIG_MTD_CFI_INTELEXT is not set
363CONFIG_MTD_CFI_AMDSTD=y
364# CONFIG_MTD_CFI_STAA is not set
365CONFIG_MTD_CFI_UTIL=y
366# CONFIG_MTD_RAM is not set
367# CONFIG_MTD_ROM is not set
368# CONFIG_MTD_ABSENT is not set
369
370#
371# Mapping drivers for chip access
372#
373# CONFIG_MTD_COMPLEX_MAPPINGS is not set
374# CONFIG_MTD_PHYSMAP is not set
375CONFIG_MTD_LASAT=y
376# CONFIG_MTD_PLATRAM is not set
377
378#
379# Self-contained MTD device drivers
380#
381# CONFIG_MTD_PMC551 is not set
382# CONFIG_MTD_SLRAM is not set
383# CONFIG_MTD_PHRAM is not set
384# CONFIG_MTD_MTDRAM is not set
385# CONFIG_MTD_BLOCK2MTD is not set
386
387#
388# Disk-On-Chip Device Drivers
389#
390# CONFIG_MTD_DOC2000 is not set
391# CONFIG_MTD_DOC2001 is not set
392# CONFIG_MTD_DOC2001PLUS is not set
393# CONFIG_MTD_NAND is not set
394# CONFIG_MTD_ONENAND is not set
395
396#
397# UBI - Unsorted block images
398#
399# CONFIG_MTD_UBI is not set
400# CONFIG_PARPORT is not set
401CONFIG_BLK_DEV=y
402# CONFIG_BLK_CPQ_DA is not set
403# CONFIG_BLK_CPQ_CISS_DA is not set
404# CONFIG_BLK_DEV_DAC960 is not set
405# CONFIG_BLK_DEV_UMEM is not set
406# CONFIG_BLK_DEV_COW_COMMON is not set
407# CONFIG_BLK_DEV_LOOP is not set
408# CONFIG_BLK_DEV_NBD is not set
409# CONFIG_BLK_DEV_SX8 is not set
410# CONFIG_BLK_DEV_RAM is not set
411# CONFIG_CDROM_PKTCDVD is not set
412# CONFIG_ATA_OVER_ETH is not set
413# CONFIG_MISC_DEVICES is not set
414CONFIG_IDE=y
415CONFIG_IDE_MAX_HWIFS=4
416CONFIG_BLK_DEV_IDE=y
417
418#
419# Please see Documentation/ide.txt for help/info on IDE drives
420#
421# CONFIG_BLK_DEV_IDE_SATA is not set
422CONFIG_BLK_DEV_IDEDISK=y
423CONFIG_IDEDISK_MULTI_MODE=y
424# CONFIG_BLK_DEV_IDECD is not set
425# CONFIG_BLK_DEV_IDETAPE is not set
426# CONFIG_BLK_DEV_IDEFLOPPY is not set
427# CONFIG_IDE_TASK_IOCTL is not set
428CONFIG_IDE_PROC_FS=y
429
430#
431# IDE chipset support/bugfixes
432#
433CONFIG_IDE_GENERIC=y
434CONFIG_BLK_DEV_IDEPCI=y
435# CONFIG_IDEPCI_SHARE_IRQ is not set
436CONFIG_IDEPCI_PCIBUS_ORDER=y
437# CONFIG_BLK_DEV_OFFBOARD is not set
438CONFIG_BLK_DEV_GENERIC=y
439# CONFIG_BLK_DEV_OPTI621 is not set
440CONFIG_BLK_DEV_IDEDMA_PCI=y
441# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
442# CONFIG_IDEDMA_ONLYDISK is not set
443# CONFIG_BLK_DEV_AEC62XX is not set
444# CONFIG_BLK_DEV_ALI15X3 is not set
445# CONFIG_BLK_DEV_AMD74XX is not set
446CONFIG_BLK_DEV_CMD64X=y
447# CONFIG_BLK_DEV_TRIFLEX is not set
448# CONFIG_BLK_DEV_CY82C693 is not set
449# CONFIG_BLK_DEV_CS5520 is not set
450# CONFIG_BLK_DEV_CS5530 is not set
451# CONFIG_BLK_DEV_HPT34X is not set
452# CONFIG_BLK_DEV_HPT366 is not set
453# CONFIG_BLK_DEV_JMICRON is not set
454# CONFIG_BLK_DEV_SC1200 is not set
455# CONFIG_BLK_DEV_PIIX is not set
456# CONFIG_BLK_DEV_IT8213 is not set
457# CONFIG_BLK_DEV_IT821X is not set
458# CONFIG_BLK_DEV_NS87415 is not set
459# CONFIG_BLK_DEV_PDC202XX_OLD is not set
460# CONFIG_BLK_DEV_PDC202XX_NEW is not set
461# CONFIG_BLK_DEV_SVWKS is not set
462# CONFIG_BLK_DEV_SIIMAGE is not set
463# CONFIG_BLK_DEV_SLC90E66 is not set
464# CONFIG_BLK_DEV_TRM290 is not set
465# CONFIG_BLK_DEV_VIA82CXXX is not set
466# CONFIG_BLK_DEV_TC86C001 is not set
467# CONFIG_IDE_ARM is not set
468CONFIG_BLK_DEV_IDEDMA=y
469# CONFIG_IDEDMA_IVB is not set
470# CONFIG_BLK_DEV_HD is not set
471
472#
473# SCSI device support
474#
475# CONFIG_RAID_ATTRS is not set
476# CONFIG_SCSI is not set
477# CONFIG_SCSI_DMA is not set
478# CONFIG_SCSI_NETLINK is not set
479# CONFIG_ATA is not set
480# CONFIG_MD is not set
481
482#
483# Fusion MPT device support
484#
485# CONFIG_FUSION is not set
486
487#
488# IEEE 1394 (FireWire) support
489#
490# CONFIG_FIREWIRE is not set
491# CONFIG_IEEE1394 is not set
492# CONFIG_I2O is not set
493CONFIG_NETDEVICES=y
494# CONFIG_NETDEVICES_MULTIQUEUE is not set
495# CONFIG_DUMMY is not set
496# CONFIG_BONDING is not set
497# CONFIG_MACVLAN is not set
498# CONFIG_EQUALIZER is not set
499# CONFIG_TUN is not set
500# CONFIG_ARCNET is not set
501# CONFIG_PHYLIB is not set
502CONFIG_NET_ETHERNET=y
503CONFIG_MII=y
504# CONFIG_AX88796 is not set
505# CONFIG_HAPPYMEAL is not set
506# CONFIG_SUNGEM is not set
507# CONFIG_CASSINI is not set
508# CONFIG_NET_VENDOR_3COM is not set
509# CONFIG_DM9000 is not set
510# CONFIG_NET_TULIP is not set
511# CONFIG_HP100 is not set
512CONFIG_NET_PCI=y
513CONFIG_PCNET32=y
514# CONFIG_PCNET32_NAPI is not set
515# CONFIG_AMD8111_ETH is not set
516# CONFIG_ADAPTEC_STARFIRE is not set
517# CONFIG_B44 is not set
518# CONFIG_FORCEDETH is not set
519# CONFIG_TC35815 is not set
520# CONFIG_DGRS is not set
521# CONFIG_EEPRO100 is not set
522# CONFIG_E100 is not set
523# CONFIG_FEALNX is not set
524# CONFIG_NATSEMI is not set
525# CONFIG_NE2K_PCI is not set
526# CONFIG_8139CP is not set
527# CONFIG_8139TOO is not set
528# CONFIG_SIS900 is not set
529# CONFIG_EPIC100 is not set
530# CONFIG_SUNDANCE is not set
531# CONFIG_TLAN is not set
532# CONFIG_VIA_RHINE is not set
533# CONFIG_SC92031 is not set
534# CONFIG_NETDEV_1000 is not set
535# CONFIG_NETDEV_10000 is not set
536# CONFIG_TR is not set
537
538#
539# Wireless LAN
540#
541# CONFIG_WLAN_PRE80211 is not set
542# CONFIG_WLAN_80211 is not set
543# CONFIG_WAN is not set
544# CONFIG_FDDI is not set
545# CONFIG_HIPPI is not set
546# CONFIG_PPP is not set
547# CONFIG_SLIP is not set
548# CONFIG_SHAPER is not set
549# CONFIG_NETCONSOLE is not set
550# CONFIG_NETPOLL is not set
551# CONFIG_NET_POLL_CONTROLLER is not set
552# CONFIG_ISDN is not set
553# CONFIG_PHONE is not set
554
555#
556# Input device support
557#
558CONFIG_INPUT=y
559# CONFIG_INPUT_FF_MEMLESS is not set
560# CONFIG_INPUT_POLLDEV is not set
561
562#
563# Userland interfaces
564#
565# CONFIG_INPUT_MOUSEDEV is not set
566# CONFIG_INPUT_JOYDEV is not set
567# CONFIG_INPUT_TSDEV is not set
568# CONFIG_INPUT_EVDEV is not set
569# CONFIG_INPUT_EVBUG is not set
570
571#
572# Input Device Drivers
573#
574# CONFIG_INPUT_KEYBOARD is not set
575# CONFIG_INPUT_MOUSE is not set
576# CONFIG_INPUT_JOYSTICK is not set
577# CONFIG_INPUT_TABLET is not set
578# CONFIG_INPUT_TOUCHSCREEN is not set
579# CONFIG_INPUT_MISC is not set
580
581#
582# Hardware I/O ports
583#
584CONFIG_SERIO=y
585CONFIG_SERIO_I8042=y
586CONFIG_SERIO_SERPORT=y
587# CONFIG_SERIO_PCIPS2 is not set
588# CONFIG_SERIO_LIBPS2 is not set
589CONFIG_SERIO_RAW=y
590# CONFIG_GAMEPORT is not set
591
592#
593# Character devices
594#
595# CONFIG_VT is not set
596# CONFIG_SERIAL_NONSTANDARD is not set
597
598#
599# Serial drivers
600#
601CONFIG_SERIAL_8250=y
602CONFIG_SERIAL_8250_CONSOLE=y
603# CONFIG_SERIAL_8250_PCI is not set
604CONFIG_SERIAL_8250_NR_UARTS=4
605CONFIG_SERIAL_8250_RUNTIME_UARTS=4
606# CONFIG_SERIAL_8250_EXTENDED is not set
607
608#
609# Non-8250 serial port support
610#
611CONFIG_SERIAL_CORE=y
612CONFIG_SERIAL_CORE_CONSOLE=y
613# CONFIG_SERIAL_JSM is not set
614CONFIG_UNIX98_PTYS=y
615CONFIG_LEGACY_PTYS=y
616CONFIG_LEGACY_PTY_COUNT=256
617# CONFIG_IPMI_HANDLER is not set
618# CONFIG_WATCHDOG is not set
619# CONFIG_HW_RANDOM is not set
620# CONFIG_RTC is not set
621# CONFIG_R3964 is not set
622# CONFIG_APPLICOM is not set
623# CONFIG_DRM is not set
624# CONFIG_RAW_DRIVER is not set
625# CONFIG_TCG_TPM is not set
626CONFIG_DEVPORT=y
627# CONFIG_I2C is not set
628
629#
630# SPI support
631#
632# CONFIG_SPI is not set
633# CONFIG_SPI_MASTER is not set
634# CONFIG_W1 is not set
635# CONFIG_POWER_SUPPLY is not set
636# CONFIG_HWMON is not set
637
638#
639# Multifunction device drivers
640#
641# CONFIG_MFD_SM501 is not set
642
643#
644# Multimedia devices
645#
646# CONFIG_VIDEO_DEV is not set
647# CONFIG_DVB_CORE is not set
648# CONFIG_DAB is not set
649
650#
651# Graphics support
652#
653# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
654
655#
656# Display device support
657#
658# CONFIG_DISPLAY_SUPPORT is not set
659# CONFIG_VGASTATE is not set
660# CONFIG_VIDEO_OUTPUT_CONTROL is not set
661# CONFIG_FB is not set
662
663#
664# Sound
665#
666# CONFIG_SOUND is not set
667# CONFIG_HID_SUPPORT is not set
668# CONFIG_USB_SUPPORT is not set
669# CONFIG_MMC is not set
670# CONFIG_NEW_LEDS is not set
671# CONFIG_INFINIBAND is not set
672# CONFIG_RTC_CLASS is not set
673
674#
675# DMA Engine support
676#
677# CONFIG_DMA_ENGINE is not set
678
679#
680# DMA Clients
681#
682
683#
684# DMA Devices
685#
686
687#
688# Userspace I/O
689#
690# CONFIG_UIO is not set
691
692#
693# File systems
694#
695CONFIG_EXT2_FS=y
696# CONFIG_EXT2_FS_XATTR is not set
697# CONFIG_EXT2_FS_XIP is not set
698CONFIG_EXT3_FS=y
699# CONFIG_EXT3_FS_XATTR is not set
700# CONFIG_EXT4DEV_FS is not set
701CONFIG_JBD=y
702# CONFIG_JBD_DEBUG is not set
703# CONFIG_REISERFS_FS is not set
704# CONFIG_JFS_FS is not set
705# CONFIG_FS_POSIX_ACL is not set
706# CONFIG_XFS_FS is not set
707# CONFIG_GFS2_FS is not set
708# CONFIG_OCFS2_FS is not set
709# CONFIG_MINIX_FS is not set
710# CONFIG_ROMFS_FS is not set
711# CONFIG_INOTIFY is not set
712# CONFIG_QUOTA is not set
713# CONFIG_DNOTIFY is not set
714# CONFIG_AUTOFS_FS is not set
715# CONFIG_AUTOFS4_FS is not set
716# CONFIG_FUSE_FS is not set
717
718#
719# CD-ROM/DVD Filesystems
720#
721# CONFIG_ISO9660_FS is not set
722# CONFIG_UDF_FS is not set
723
724#
725# DOS/FAT/NT Filesystems
726#
727# CONFIG_MSDOS_FS is not set
728# CONFIG_VFAT_FS is not set
729# CONFIG_NTFS_FS is not set
730
731#
732# Pseudo filesystems
733#
734CONFIG_PROC_FS=y
735CONFIG_PROC_KCORE=y
736CONFIG_PROC_SYSCTL=y
737CONFIG_SYSFS=y
738CONFIG_TMPFS=y
739# CONFIG_TMPFS_POSIX_ACL is not set
740# CONFIG_HUGETLB_PAGE is not set
741CONFIG_RAMFS=y
742CONFIG_CONFIGFS_FS=y
743
744#
745# Miscellaneous filesystems
746#
747# CONFIG_ADFS_FS is not set
748# CONFIG_AFFS_FS is not set
749# CONFIG_HFS_FS is not set
750# CONFIG_HFSPLUS_FS is not set
751# CONFIG_BEFS_FS is not set
752# CONFIG_BFS_FS is not set
753# CONFIG_EFS_FS is not set
754# CONFIG_JFFS2_FS is not set
755# CONFIG_CRAMFS is not set
756# CONFIG_VXFS_FS is not set
757# CONFIG_HPFS_FS is not set
758# CONFIG_QNX4FS_FS is not set
759# CONFIG_SYSV_FS is not set
760# CONFIG_UFS_FS is not set
761
762#
763# Network File Systems
764#
765# CONFIG_NFS_FS is not set
766# CONFIG_NFSD is not set
767# CONFIG_SMB_FS is not set
768# CONFIG_CIFS is not set
769# CONFIG_NCP_FS is not set
770# CONFIG_CODA_FS is not set
771# CONFIG_AFS_FS is not set
772
773#
774# Partition Types
775#
776# CONFIG_PARTITION_ADVANCED is not set
777CONFIG_MSDOS_PARTITION=y
778
779#
780# Native Language Support
781#
782# CONFIG_NLS is not set
783
784#
785# Distributed Lock Manager
786#
787# CONFIG_DLM is not set
788
789#
790# Profiling support
791#
792# CONFIG_PROFILING is not set
793
794#
795# Kernel hacking
796#
797CONFIG_TRACE_IRQFLAGS_SUPPORT=y
798# CONFIG_PRINTK_TIME is not set
799CONFIG_ENABLE_MUST_CHECK=y
800CONFIG_MAGIC_SYSRQ=y
801# CONFIG_UNUSED_SYMBOLS is not set
802# CONFIG_DEBUG_FS is not set
803# CONFIG_HEADERS_CHECK is not set
804# CONFIG_DEBUG_KERNEL is not set
805CONFIG_CROSSCOMPILE=y
806CONFIG_CMDLINE=""
807
808#
809# Security options
810#
811# CONFIG_KEYS is not set
812# CONFIG_SECURITY is not set
813# CONFIG_CRYPTO is not set
814
815#
816# Library routines
817#
818CONFIG_BITREVERSE=y
819# CONFIG_CRC_CCITT is not set
820# CONFIG_CRC16 is not set
821# CONFIG_CRC_ITU_T is not set
822CONFIG_CRC32=y
823# CONFIG_CRC7 is not set
824# CONFIG_LIBCRC32C is not set
825CONFIG_PLIST=y
826CONFIG_HAS_IOMEM=y
827CONFIG_HAS_IOPORT=y
828CONFIG_HAS_DMA=y
diff --git a/arch/mips/lasat/Kconfig b/arch/mips/lasat/Kconfig
new file mode 100644
index 000000000000..1d2ee8a9be13
--- /dev/null
+++ b/arch/mips/lasat/Kconfig
@@ -0,0 +1,15 @@
1config PICVUE
2 tristate "PICVUE LCD display driver"
3 depends on LASAT
4
5config PICVUE_PROC
6 tristate "PICVUE LCD display driver /proc interface"
7 depends on PICVUE
8
9config DS1603
10 bool "DS1603 RTC driver"
11 depends on LASAT
12
13config LASAT_SYSCTL
14 bool "LASAT sysctl interface"
15 depends on LASAT
diff --git a/arch/mips/lasat/Makefile b/arch/mips/lasat/Makefile
new file mode 100644
index 000000000000..33791609fe99
--- /dev/null
+++ b/arch/mips/lasat/Makefile
@@ -0,0 +1,16 @@
1#
2# Makefile for the LASAT specific kernel interface routines under Linux.
3#
4
5obj-y += reset.o setup.o prom.o lasat_board.o \
6 at93c.o interrupt.o serial.o
7
8obj-$(CONFIG_LASAT_SYSCTL) += sysctl.o
9obj-$(CONFIG_DS1603) += ds1603.o
10obj-$(CONFIG_PICVUE) += picvue.o
11obj-$(CONFIG_PICVUE_PROC) += picvue_proc.o
12
13clean:
14 make -C image clean
15
16EXTRA_CFLAGS += -Werror
diff --git a/arch/mips/lasat/at93c.c b/arch/mips/lasat/at93c.c
new file mode 100644
index 000000000000..793e234719a6
--- /dev/null
+++ b/arch/mips/lasat/at93c.c
@@ -0,0 +1,149 @@
1/*
2 * Atmel AT93C46 serial eeprom driver
3 *
4 * Brian Murphy <brian.murphy@eicon.com>
5 *
6 */
7#include <linux/kernel.h>
8#include <linux/delay.h>
9#include <asm/lasat/lasat.h>
10#include <linux/module.h>
11#include <linux/init.h>
12
13#include "at93c.h"
14
15#define AT93C_ADDR_SHIFT 7
16#define AT93C_ADDR_MAX ((1 << AT93C_ADDR_SHIFT) - 1)
17#define AT93C_RCMD (0x6 << AT93C_ADDR_SHIFT)
18#define AT93C_WCMD (0x5 << AT93C_ADDR_SHIFT)
19#define AT93C_WENCMD 0x260
20#define AT93C_WDSCMD 0x200
21
22struct at93c_defs *at93c;
23
24static void at93c_reg_write(u32 val)
25{
26 *at93c->reg = val;
27}
28
29static u32 at93c_reg_read(void)
30{
31 u32 tmp = *at93c->reg;
32 return tmp;
33}
34
35static u32 at93c_datareg_read(void)
36{
37 u32 tmp = *at93c->rdata_reg;
38 return tmp;
39}
40
41static void at93c_cycle_clk(u32 data)
42{
43 at93c_reg_write(data | at93c->clk);
44 lasat_ndelay(250);
45 at93c_reg_write(data & ~at93c->clk);
46 lasat_ndelay(250);
47}
48
49static void at93c_write_databit(u8 bit)
50{
51 u32 data = at93c_reg_read();
52 if (bit)
53 data |= 1 << at93c->wdata_shift;
54 else
55 data &= ~(1 << at93c->wdata_shift);
56
57 at93c_reg_write(data);
58 lasat_ndelay(100);
59 at93c_cycle_clk(data);
60}
61
62static unsigned int at93c_read_databit(void)
63{
64 u32 data;
65
66 at93c_cycle_clk(at93c_reg_read());
67 data = (at93c_datareg_read() >> at93c->rdata_shift) & 1;
68 return data;
69}
70
71static u8 at93c_read_byte(void)
72{
73 int i;
74 u8 data = 0;
75
76 for (i = 0; i <= 7; i++) {
77 data <<= 1;
78 data |= at93c_read_databit();
79 }
80 return data;
81}
82
83static void at93c_write_bits(u32 data, int size)
84{
85 int i;
86 int shift = size - 1;
87 u32 mask = (1 << shift);
88
89 for (i = 0; i < size; i++) {
90 at93c_write_databit((data & mask) >> shift);
91 data <<= 1;
92 }
93}
94
95static void at93c_init_op(void)
96{
97 at93c_reg_write((at93c_reg_read() | at93c->cs) &
98 ~at93c->clk & ~(1 << at93c->rdata_shift));
99 lasat_ndelay(50);
100}
101
102static void at93c_end_op(void)
103{
104 at93c_reg_write(at93c_reg_read() & ~at93c->cs);
105 lasat_ndelay(250);
106}
107
108static void at93c_wait(void)
109{
110 at93c_init_op();
111 while (!at93c_read_databit())
112 ;
113 at93c_end_op();
114};
115
116static void at93c_disable_wp(void)
117{
118 at93c_init_op();
119 at93c_write_bits(AT93C_WENCMD, 10);
120 at93c_end_op();
121}
122
123static void at93c_enable_wp(void)
124{
125 at93c_init_op();
126 at93c_write_bits(AT93C_WDSCMD, 10);
127 at93c_end_op();
128}
129
130u8 at93c_read(u8 addr)
131{
132 u8 byte;
133 at93c_init_op();
134 at93c_write_bits((addr & AT93C_ADDR_MAX)|AT93C_RCMD, 10);
135 byte = at93c_read_byte();
136 at93c_end_op();
137 return byte;
138}
139
140void at93c_write(u8 addr, u8 data)
141{
142 at93c_disable_wp();
143 at93c_init_op();
144 at93c_write_bits((addr & AT93C_ADDR_MAX)|AT93C_WCMD, 10);
145 at93c_write_bits(data, 8);
146 at93c_end_op();
147 at93c_wait();
148 at93c_enable_wp();
149}
diff --git a/arch/mips/lasat/at93c.h b/arch/mips/lasat/at93c.h
new file mode 100644
index 000000000000..cfe2f99b1d44
--- /dev/null
+++ b/arch/mips/lasat/at93c.h
@@ -0,0 +1,18 @@
1/*
2 * Atmel AT93C46 serial eeprom driver
3 *
4 * Brian Murphy <brian.murphy@eicon.com>
5 *
6 */
7
8extern struct at93c_defs {
9 volatile u32 *reg;
10 volatile u32 *rdata_reg;
11 int rdata_shift;
12 int wdata_shift;
13 u32 cs;
14 u32 clk;
15} *at93c;
16
17u8 at93c_read(u8 addr);
18void at93c_write(u8 addr, u8 data);
diff --git a/arch/mips/lasat/ds1603.c b/arch/mips/lasat/ds1603.c
new file mode 100644
index 000000000000..0b315f51d62c
--- /dev/null
+++ b/arch/mips/lasat/ds1603.c
@@ -0,0 +1,183 @@
1/*
2 * Dallas Semiconductors 1603 RTC driver
3 *
4 * Brian Murphy <brian@murphy.dk>
5 *
6 */
7#include <linux/kernel.h>
8#include <asm/lasat/lasat.h>
9#include <linux/delay.h>
10#include <asm/lasat/ds1603.h>
11#include <asm/time.h>
12
13#include "ds1603.h"
14
15#define READ_TIME_CMD 0x81
16#define SET_TIME_CMD 0x80
17#define TRIMMER_SET_CMD 0xC0
18#define TRIMMER_VALUE_MASK 0x38
19#define TRIMMER_SHIFT 3
20
21struct ds_defs *ds1603;
22
23/* HW specific register functions */
24static void rtc_reg_write(unsigned long val)
25{
26 *ds1603->reg = val;
27}
28
29static unsigned long rtc_reg_read(void)
30{
31 unsigned long tmp = *ds1603->reg;
32 return tmp;
33}
34
35static unsigned long rtc_datareg_read(void)
36{
37 unsigned long tmp = *ds1603->data_reg;
38 return tmp;
39}
40
41static void rtc_nrst_high(void)
42{
43 rtc_reg_write(rtc_reg_read() | ds1603->rst);
44}
45
46static void rtc_nrst_low(void)
47{
48 rtc_reg_write(rtc_reg_read() & ~ds1603->rst);
49}
50
51static void rtc_cycle_clock(unsigned long data)
52{
53 data |= ds1603->clk;
54 rtc_reg_write(data);
55 lasat_ndelay(250);
56 if (ds1603->data_reversed)
57 data &= ~ds1603->data;
58 else
59 data |= ds1603->data;
60 data &= ~ds1603->clk;
61 rtc_reg_write(data);
62 lasat_ndelay(250 + ds1603->huge_delay);
63}
64
65static void rtc_write_databit(unsigned int bit)
66{
67 unsigned long data = rtc_reg_read();
68 if (ds1603->data_reversed)
69 bit = !bit;
70 if (bit)
71 data |= ds1603->data;
72 else
73 data &= ~ds1603->data;
74
75 rtc_reg_write(data);
76 lasat_ndelay(50 + ds1603->huge_delay);
77 rtc_cycle_clock(data);
78}
79
80static unsigned int rtc_read_databit(void)
81{
82 unsigned int data;
83
84 data = (rtc_datareg_read() & (1 << ds1603->data_read_shift))
85 >> ds1603->data_read_shift;
86 rtc_cycle_clock(rtc_reg_read());
87 return data;
88}
89
90static void rtc_write_byte(unsigned int byte)
91{
92 int i;
93
94 for (i = 0; i <= 7; i++) {
95 rtc_write_databit(byte & 1L);
96 byte >>= 1;
97 }
98}
99
100static void rtc_write_word(unsigned long word)
101{
102 int i;
103
104 for (i = 0; i <= 31; i++) {
105 rtc_write_databit(word & 1L);
106 word >>= 1;
107 }
108}
109
110static unsigned long rtc_read_word(void)
111{
112 int i;
113 unsigned long word = 0;
114 unsigned long shift = 0;
115
116 for (i = 0; i <= 31; i++) {
117 word |= rtc_read_databit() << shift;
118 shift++;
119 }
120 return word;
121}
122
123static void rtc_init_op(void)
124{
125 rtc_nrst_high();
126
127 rtc_reg_write(rtc_reg_read() & ~ds1603->clk);
128
129 lasat_ndelay(50);
130}
131
132static void rtc_end_op(void)
133{
134 rtc_nrst_low();
135 lasat_ndelay(1000);
136}
137
138/* interface */
139unsigned long ds1603_read(void)
140{
141 unsigned long word;
142 unsigned long flags;
143
144 spin_lock_irqsave(&rtc_lock, flags);
145 rtc_init_op();
146 rtc_write_byte(READ_TIME_CMD);
147 word = rtc_read_word();
148 rtc_end_op();
149 spin_unlock_irqrestore(&rtc_lock, flags);
150 return word;
151}
152
153int ds1603_set(unsigned long time)
154{
155 unsigned long flags;
156
157 spin_lock_irqsave(&rtc_lock, flags);
158 rtc_init_op();
159 rtc_write_byte(SET_TIME_CMD);
160 rtc_write_word(time);
161 rtc_end_op();
162 spin_unlock_irqrestore(&rtc_lock, flags);
163
164 return 0;
165}
166
167void ds1603_set_trimmer(unsigned int trimval)
168{
169 rtc_init_op();
170 rtc_write_byte(((trimval << TRIMMER_SHIFT) & TRIMMER_VALUE_MASK)
171 | (TRIMMER_SET_CMD));
172 rtc_end_op();
173}
174
175void ds1603_disable(void)
176{
177 ds1603_set_trimmer(TRIMMER_DISABLE_RTC);
178}
179
180void ds1603_enable(void)
181{
182 ds1603_set_trimmer(TRIMMER_DEFAULT);
183}
diff --git a/arch/mips/lasat/ds1603.h b/arch/mips/lasat/ds1603.h
new file mode 100644
index 000000000000..c2e5c76a379d
--- /dev/null
+++ b/arch/mips/lasat/ds1603.h
@@ -0,0 +1,33 @@
1/*
2 * Dallas Semiconductors 1603 RTC driver
3 *
4 * Brian Murphy <brian@murphy.dk>
5 *
6 */
7#ifndef __DS1603_H
8#define __DS1603_H
9
10struct ds_defs {
11 volatile u32 *reg;
12 volatile u32 *data_reg;
13 u32 rst;
14 u32 clk;
15 u32 data;
16 u32 data_read_shift;
17 char data_reversed;
18 u32 huge_delay;
19};
20
21extern struct ds_defs *ds1603;
22
23unsigned long ds1603_read(void);
24int ds1603_set(unsigned long);
25void ds1603_set_trimmer(unsigned int);
26void ds1603_enable(void);
27void ds1603_disable(void);
28void ds1603_init(struct ds_defs *);
29
30#define TRIMMER_DEFAULT 3
31#define TRIMMER_DISABLE_RTC 0
32
33#endif
diff --git a/arch/mips/lasat/image/Makefile b/arch/mips/lasat/image/Makefile
new file mode 100644
index 000000000000..5332449ec040
--- /dev/null
+++ b/arch/mips/lasat/image/Makefile
@@ -0,0 +1,54 @@
1#
2# MAKEFILE FOR THE MIPS LINUX BOOTLOADER AND ROM DEBUGGER
3#
4# i-data Networks
5#
6# Author: Thomas Horsten <thh@i-data.com>
7#
8
9ifndef Version
10 Version = "$(USER)-test"
11endif
12
13MKLASATIMG = mklasatimg
14MKLASATIMG_ARCH = mq2,mqpro,sp100,sp200
15KERNEL_IMAGE = $(TOPDIR)/vmlinux
16KERNEL_START = $(shell $(NM) $(KERNEL_IMAGE) | grep " _text" | cut -f1 -d\ )
17KERNEL_ENTRY = $(shell $(NM) $(KERNEL_IMAGE) | grep kernel_entry | cut -f1 -d\ )
18
19LDSCRIPT= -L$(obj) -Tromscript.normal
20
21HEAD_DEFINES := -D_kernel_start=0x$(KERNEL_START) \
22 -D_kernel_entry=0x$(KERNEL_ENTRY) \
23 -D VERSION="\"$(Version)\"" \
24 -D TIMESTAMP=$(shell date +%s)
25
26$(obj)/head.o: $(obj)/head.S $(KERNEL_IMAGE)
27 $(CC) -fno-pic $(HEAD_DEFINES) -I$(TOPDIR)/include -c -o $@ $<
28
29OBJECTS = head.o kImage.o
30
31rom.sw: $(obj)/rom.sw
32rom.bin: $(obj)/rom.bin
33
34$(obj)/rom.sw: $(obj)/rom.bin
35 $(MKLASATIMG) -o $@ -k $^ -m $(MKLASATIMG_ARCH)
36
37$(obj)/rom.bin: $(obj)/rom
38 $(OBJCOPY) -O binary -S $^ $@
39
40# Rule to make the bootloader
41$(obj)/rom: $(addprefix $(obj)/,$(OBJECTS))
42 $(LD) $(LDFLAGS) $(LDSCRIPT) -o $@ $^
43
44$(obj)/%.o: $(obj)/%.gz
45 $(LD) -r -o $@ -b binary $<
46
47$(obj)/%.gz: $(obj)/%.bin
48 gzip -cf -9 $< > $@
49
50$(obj)/kImage.bin: $(KERNEL_IMAGE)
51 $(OBJCOPY) -O binary -S $^ $@
52
53clean:
54 rm -f rom rom.bin rom.sw kImage.bin kImage.o
diff --git a/arch/mips/lasat/image/head.S b/arch/mips/lasat/image/head.S
new file mode 100644
index 000000000000..efb95f2609c2
--- /dev/null
+++ b/arch/mips/lasat/image/head.S
@@ -0,0 +1,31 @@
1#include <asm/lasat/head.h>
2
3 .text
4 .section .text.start, "ax"
5 .set noreorder
6 .set mips3
7
8 /* Magic words identifying a software image */
9 .word LASAT_K_MAGIC0_VAL
10 .word LASAT_K_MAGIC1_VAL
11
12 /* Image header version */
13 .word 0x00000002
14
15 /* image start and size */
16 .word _image_start
17 .word _image_size
18
19 /* start of kernel and entrypoint in uncompressed image */
20 .word _kernel_start
21 .word _kernel_entry
22
23 /* Here we have room for future flags */
24
25 .org 0x40
26reldate:
27 .word TIMESTAMP
28
29 .org 0x50
30release:
31 .string VERSION
diff --git a/arch/mips/lasat/image/romscript.normal b/arch/mips/lasat/image/romscript.normal
new file mode 100644
index 000000000000..988f8ad189cb
--- /dev/null
+++ b/arch/mips/lasat/image/romscript.normal
@@ -0,0 +1,23 @@
1OUTPUT_ARCH(mips)
2
3SECTIONS
4{
5 .text :
6 {
7 *(.text.start)
8 }
9
10 /* Data in ROM */
11
12 .data ALIGN(0x10) :
13 {
14 *(.data)
15 }
16 _image_start = ADDR(.data);
17 _image_size = SIZEOF(.data);
18
19 .other :
20 {
21 *(.*)
22 }
23}
diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c
new file mode 100644
index 000000000000..5f35289bfff5
--- /dev/null
+++ b/arch/mips/lasat/interrupt.c
@@ -0,0 +1,130 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 *
18 * Routines for generic manipulation of the interrupts found on the
19 * Lasat boards.
20 */
21#include <linux/init.h>
22#include <linux/irq.h>
23#include <linux/sched.h>
24#include <linux/slab.h>
25#include <linux/interrupt.h>
26#include <linux/kernel_stat.h>
27
28#include <asm/bootinfo.h>
29#include <asm/lasat/lasatint.h>
30#include <asm/time.h>
31#include <asm/gdb-stub.h>
32
33static volatile int *lasat_int_status;
34static volatile int *lasat_int_mask;
35static volatile int lasat_int_mask_shift;
36
37void disable_lasat_irq(unsigned int irq_nr)
38{
39 *lasat_int_mask &= ~(1 << irq_nr) << lasat_int_mask_shift;
40}
41
42void enable_lasat_irq(unsigned int irq_nr)
43{
44 *lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift;
45}
46
47static struct irq_chip lasat_irq_type = {
48 .name = "Lasat",
49 .ack = disable_lasat_irq,
50 .mask = disable_lasat_irq,
51 .mask_ack = disable_lasat_irq,
52 .unmask = enable_lasat_irq,
53};
54
55static inline int ls1bit32(unsigned int x)
56{
57 int b = 31, s;
58
59 s = 16; if (x << 16 == 0) s = 0; b -= s; x <<= s;
60 s = 8; if (x << 8 == 0) s = 0; b -= s; x <<= s;
61 s = 4; if (x << 4 == 0) s = 0; b -= s; x <<= s;
62 s = 2; if (x << 2 == 0) s = 0; b -= s; x <<= s;
63 s = 1; if (x << 1 == 0) s = 0; b -= s;
64
65 return b;
66}
67
68static unsigned long (*get_int_status)(void);
69
70static unsigned long get_int_status_100(void)
71{
72 return *lasat_int_status & *lasat_int_mask;
73}
74
75static unsigned long get_int_status_200(void)
76{
77 unsigned long int_status;
78
79 int_status = *lasat_int_status;
80 int_status &= (int_status >> LASATINT_MASK_SHIFT_200) & 0xffff;
81 return int_status;
82}
83
84asmlinkage void plat_irq_dispatch(void)
85{
86 unsigned long int_status;
87 unsigned int cause = read_c0_cause();
88 int irq;
89
90 if (cause & CAUSEF_IP7) { /* R4000 count / compare IRQ */
91 ll_timer_interrupt(7);
92 return;
93 }
94
95 int_status = get_int_status();
96
97 /* if int_status == 0, then the interrupt has already been cleared */
98 if (int_status) {
99 irq = ls1bit32(int_status);
100
101 do_IRQ(irq);
102 }
103}
104
105void __init arch_init_irq(void)
106{
107 int i;
108
109 switch (mips_machtype) {
110 case MACH_LASAT_100:
111 lasat_int_status = (void *)LASAT_INT_STATUS_REG_100;
112 lasat_int_mask = (void *)LASAT_INT_MASK_REG_100;
113 lasat_int_mask_shift = LASATINT_MASK_SHIFT_100;
114 get_int_status = get_int_status_100;
115 *lasat_int_mask = 0;
116 break;
117 case MACH_LASAT_200:
118 lasat_int_status = (void *)LASAT_INT_STATUS_REG_200;
119 lasat_int_mask = (void *)LASAT_INT_MASK_REG_200;
120 lasat_int_mask_shift = LASATINT_MASK_SHIFT_200;
121 get_int_status = get_int_status_200;
122 *lasat_int_mask &= 0xffff;
123 break;
124 default:
125 panic("arch_init_irq: mips_machtype incorrect");
126 }
127
128 for (i = 0; i <= LASATINT_END; i++)
129 set_irq_chip_and_handler(i, &lasat_irq_type, handle_level_irq);
130}
diff --git a/arch/mips/lasat/lasat_board.c b/arch/mips/lasat/lasat_board.c
new file mode 100644
index 000000000000..ec2f658c3709
--- /dev/null
+++ b/arch/mips/lasat/lasat_board.c
@@ -0,0 +1,280 @@
1/*
2 * Thomas Horsten <thh@lasat.com>
3 * Copyright (C) 2000 LASAT Networks A/S.
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 *
18 * Routines specific to the LASAT boards
19 */
20#include <linux/types.h>
21#include <linux/crc32.h>
22#include <asm/lasat/lasat.h>
23#include <linux/kernel.h>
24#include <linux/string.h>
25#include <linux/ctype.h>
26#include <asm/bootinfo.h>
27#include <asm/addrspace.h>
28#include "at93c.h"
29/* New model description table */
30#include "lasat_models.h"
31
32#define EEPROM_CRC(data, len) (~crc32(~0, data, len))
33
34struct lasat_info lasat_board_info;
35
36void update_bcastaddr(void);
37
38int EEPROMRead(unsigned int pos, unsigned char *data, int len)
39{
40 int i;
41
42 for (i = 0; i < len; i++)
43 *data++ = at93c_read(pos++);
44
45 return 0;
46}
47
48int EEPROMWrite(unsigned int pos, unsigned char *data, int len)
49{
50 int i;
51
52 for (i = 0; i < len; i++)
53 at93c_write(pos++, *data++);
54
55 return 0;
56}
57
58static void init_flash_sizes(void)
59{
60 unsigned long *lb = lasat_board_info.li_flashpart_base;
61 unsigned long *ls = lasat_board_info.li_flashpart_size;
62 int i;
63
64 ls[LASAT_MTD_BOOTLOADER] = 0x40000;
65 ls[LASAT_MTD_SERVICE] = 0xC0000;
66 ls[LASAT_MTD_NORMAL] = 0x100000;
67
68 if (mips_machtype == MACH_LASAT_100) {
69 lasat_board_info.li_flash_base = 0x1e000000;
70
71 lb[LASAT_MTD_BOOTLOADER] = 0x1e400000;
72
73 if (lasat_board_info.li_flash_size > 0x200000) {
74 ls[LASAT_MTD_CONFIG] = 0x100000;
75 ls[LASAT_MTD_FS] = 0x500000;
76 }
77 } else {
78 lasat_board_info.li_flash_base = 0x10000000;
79
80 if (lasat_board_info.li_flash_size < 0x1000000) {
81 lb[LASAT_MTD_BOOTLOADER] = 0x10000000;
82 ls[LASAT_MTD_CONFIG] = 0x100000;
83 if (lasat_board_info.li_flash_size >= 0x400000)
84 ls[LASAT_MTD_FS] =
85 lasat_board_info.li_flash_size - 0x300000;
86 }
87 }
88
89 for (i = 1; i < LASAT_MTD_LAST; i++)
90 lb[i] = lb[i-1] + ls[i-1];
91}
92
93int lasat_init_board_info(void)
94{
95 int c;
96 unsigned long crc;
97 unsigned long cfg0, cfg1;
98 const struct product_info *ppi;
99 int i_n_base_models = N_BASE_MODELS;
100 const char * const * i_txt_base_models = txt_base_models;
101 int i_n_prids = N_PRIDS;
102
103 memset(&lasat_board_info, 0, sizeof(lasat_board_info));
104
105 /* First read the EEPROM info */
106 EEPROMRead(0, (unsigned char *)&lasat_board_info.li_eeprom_info,
107 sizeof(struct lasat_eeprom_struct));
108
109 /* Check the CRC */
110 crc = EEPROM_CRC((unsigned char *)(&lasat_board_info.li_eeprom_info),
111 sizeof(struct lasat_eeprom_struct) - 4);
112
113 if (crc != lasat_board_info.li_eeprom_info.crc32) {
114 printk(KERN_WARNING "WARNING...\nWARNING...\nEEPROM CRC does "
115 "not match calculated, attempting to soldier on...\n");
116 }
117
118 if (lasat_board_info.li_eeprom_info.version != LASAT_EEPROM_VERSION) {
119 printk(KERN_WARNING "WARNING...\nWARNING...\nEEPROM version "
120 "%d, wanted version %d, attempting to soldier on...\n",
121 (unsigned int)lasat_board_info.li_eeprom_info.version,
122 LASAT_EEPROM_VERSION);
123 }
124
125 cfg0 = lasat_board_info.li_eeprom_info.cfg[0];
126 cfg1 = lasat_board_info.li_eeprom_info.cfg[1];
127
128 if (LASAT_W0_DSCTYPE(cfg0) != 1) {
129 printk(KERN_WARNING "WARNING...\nWARNING...\n"
130 "Invalid configuration read from EEPROM, attempting to "
131 "soldier on...");
132 }
133 /* We have a valid configuration */
134
135 switch (LASAT_W0_SDRAMBANKSZ(cfg0)) {
136 case 0:
137 lasat_board_info.li_memsize = 0x0800000;
138 break;
139 case 1:
140 lasat_board_info.li_memsize = 0x1000000;
141 break;
142 case 2:
143 lasat_board_info.li_memsize = 0x2000000;
144 break;
145 case 3:
146 lasat_board_info.li_memsize = 0x4000000;
147 break;
148 case 4:
149 lasat_board_info.li_memsize = 0x8000000;
150 break;
151 default:
152 lasat_board_info.li_memsize = 0;
153 }
154
155 switch (LASAT_W0_SDRAMBANKS(cfg0)) {
156 case 0:
157 break;
158 case 1:
159 lasat_board_info.li_memsize *= 2;
160 break;
161 default:
162 break;
163 }
164
165 switch (LASAT_W0_BUSSPEED(cfg0)) {
166 case 0x0:
167 lasat_board_info.li_bus_hz = 60000000;
168 break;
169 case 0x1:
170 lasat_board_info.li_bus_hz = 66000000;
171 break;
172 case 0x2:
173 lasat_board_info.li_bus_hz = 66666667;
174 break;
175 case 0x3:
176 lasat_board_info.li_bus_hz = 80000000;
177 break;
178 case 0x4:
179 lasat_board_info.li_bus_hz = 83333333;
180 break;
181 case 0x5:
182 lasat_board_info.li_bus_hz = 100000000;
183 break;
184 }
185
186 switch (LASAT_W0_CPUCLK(cfg0)) {
187 case 0x0:
188 lasat_board_info.li_cpu_hz =
189 lasat_board_info.li_bus_hz;
190 break;
191 case 0x1:
192 lasat_board_info.li_cpu_hz =
193 lasat_board_info.li_bus_hz +
194 (lasat_board_info.li_bus_hz >> 1);
195 break;
196 case 0x2:
197 lasat_board_info.li_cpu_hz =
198 lasat_board_info.li_bus_hz +
199 lasat_board_info.li_bus_hz;
200 break;
201 case 0x3:
202 lasat_board_info.li_cpu_hz =
203 lasat_board_info.li_bus_hz +
204 lasat_board_info.li_bus_hz +
205 (lasat_board_info.li_bus_hz >> 1);
206 break;
207 case 0x4:
208 lasat_board_info.li_cpu_hz =
209 lasat_board_info.li_bus_hz +
210 lasat_board_info.li_bus_hz +
211 lasat_board_info.li_bus_hz;
212 break;
213 }
214
215 /* Flash size */
216 switch (LASAT_W1_FLASHSIZE(cfg1)) {
217 case 0:
218 lasat_board_info.li_flash_size = 0x200000;
219 break;
220 case 1:
221 lasat_board_info.li_flash_size = 0x400000;
222 break;
223 case 2:
224 lasat_board_info.li_flash_size = 0x800000;
225 break;
226 case 3:
227 lasat_board_info.li_flash_size = 0x1000000;
228 break;
229 case 4:
230 lasat_board_info.li_flash_size = 0x2000000;
231 break;
232 }
233
234 init_flash_sizes();
235
236 lasat_board_info.li_bmid = LASAT_W0_BMID(cfg0);
237 lasat_board_info.li_prid = lasat_board_info.li_eeprom_info.prid;
238 if (lasat_board_info.li_prid == 0xffff || lasat_board_info.li_prid == 0)
239 lasat_board_info.li_prid = lasat_board_info.li_bmid;
240
241 /* Base model stuff */
242 if (lasat_board_info.li_bmid > i_n_base_models)
243 lasat_board_info.li_bmid = i_n_base_models;
244 strcpy(lasat_board_info.li_bmstr,
245 i_txt_base_models[lasat_board_info.li_bmid]);
246
247 /* Product ID dependent values */
248 c = lasat_board_info.li_prid;
249 if (c >= i_n_prids) {
250 strcpy(lasat_board_info.li_namestr, "Unknown Model");
251 strcpy(lasat_board_info.li_typestr, "Unknown Type");
252 } else {
253 ppi = &vendor_info_table[0].vi_product_info[c];
254 strcpy(lasat_board_info.li_namestr, ppi->pi_name);
255 if (ppi->pi_type)
256 strcpy(lasat_board_info.li_typestr, ppi->pi_type);
257 else
258 sprintf(lasat_board_info.li_typestr, "%d", 10 * c);
259 }
260
261#if defined(CONFIG_INET) && defined(CONFIG_SYSCTL)
262 update_bcastaddr();
263#endif
264
265 return 0;
266}
267
268void lasat_write_eeprom_info(void)
269{
270 unsigned long crc;
271
272 /* Generate the CRC */
273 crc = EEPROM_CRC((unsigned char *)(&lasat_board_info.li_eeprom_info),
274 sizeof(struct lasat_eeprom_struct) - 4);
275 lasat_board_info.li_eeprom_info.crc32 = crc;
276
277 /* Write the EEPROM info */
278 EEPROMWrite(0, (unsigned char *)&lasat_board_info.li_eeprom_info,
279 sizeof(struct lasat_eeprom_struct));
280}
diff --git a/arch/mips/lasat/lasat_models.h b/arch/mips/lasat/lasat_models.h
new file mode 100644
index 000000000000..e1cbd26ae1b3
--- /dev/null
+++ b/arch/mips/lasat/lasat_models.h
@@ -0,0 +1,67 @@
1/*
2 * Model description tables
3 */
4#include <linux/kernel.h>
5
6struct product_info {
7 const char *pi_name;
8 const char *pi_type;
9};
10
11struct vendor_info {
12 const char *vi_name;
13 const struct product_info *vi_product_info;
14};
15
16/*
17 * Base models
18 */
19static const char * const txt_base_models[] = {
20 "MQ 2", "MQ Pro", "SP 25", "SP 50", "SP 100", "SP 5000", "SP 7000",
21 "SP 1000", "Unknown"
22};
23#define N_BASE_MODELS (ARRAY_SIZE(txt_base_models) - 1)
24
25/*
26 * Eicon Networks
27 */
28static const char txt_en_mq[] = "Masquerade";
29static const char txt_en_sp[] = "Safepipe";
30
31static const struct product_info product_info_eicon[] = {
32 { txt_en_mq, "II" }, /* 0 */
33 { txt_en_mq, "Pro" }, /* 1 */
34 { txt_en_sp, "25" }, /* 2 */
35 { txt_en_sp, "50" }, /* 3 */
36 { txt_en_sp, "100" }, /* 4 */
37 { txt_en_sp, "5000" }, /* 5 */
38 { txt_en_sp, "7000" }, /* 6 */
39 { txt_en_sp, "30" }, /* 7 */
40 { txt_en_sp, "5100" }, /* 8 */
41 { txt_en_sp, "7100" }, /* 9 */
42 { txt_en_sp, "1110" }, /* 10 */
43 { txt_en_sp, "3020" }, /* 11 */
44 { txt_en_sp, "3030" }, /* 12 */
45 { txt_en_sp, "5020" }, /* 13 */
46 { txt_en_sp, "5030" }, /* 14 */
47 { txt_en_sp, "1120" }, /* 15 */
48 { txt_en_sp, "1130" }, /* 16 */
49 { txt_en_sp, "6010" }, /* 17 */
50 { txt_en_sp, "6110" }, /* 18 */
51 { txt_en_sp, "6210" }, /* 19 */
52 { txt_en_sp, "1020" }, /* 20 */
53 { txt_en_sp, "1040" }, /* 21 */
54 { txt_en_sp, "1050" }, /* 22 */
55 { txt_en_sp, "1060" }, /* 23 */
56};
57
58#define N_PRIDS ARRAY_SIZE(product_info_eicon)
59
60/*
61 * The vendor table
62 */
63static struct vendor_info const vendor_info_table[] = {
64 { "Eicon Networks", product_info_eicon },
65};
66
67#define N_VENDORS ARRAY_SIZE(vendor_info_table)
diff --git a/arch/mips/lasat/picvue.c b/arch/mips/lasat/picvue.c
new file mode 100644
index 000000000000..6471d0663fd8
--- /dev/null
+++ b/arch/mips/lasat/picvue.c
@@ -0,0 +1,244 @@
1/*
2 * Picvue PVC160206 display driver
3 *
4 * Brian Murphy <brian@murphy.dk>
5 *
6 */
7#include <linux/kernel.h>
8#include <linux/delay.h>
9#include <asm/bootinfo.h>
10#include <asm/lasat/lasat.h>
11#include <linux/module.h>
12#include <linux/init.h>
13#include <linux/errno.h>
14#include <linux/string.h>
15
16#include "picvue.h"
17
18#define PVC_BUSY 0x80
19#define PVC_NLINES 2
20#define PVC_DISPMEM 80
21#define PVC_LINELEN PVC_DISPMEM / PVC_NLINES
22
23struct pvc_defs *picvue;
24
25DECLARE_MUTEX(pvc_sem);
26
27static void pvc_reg_write(u32 val)
28{
29 *picvue->reg = val;
30}
31
32static u32 pvc_reg_read(void)
33{
34 u32 tmp = *picvue->reg;
35 return tmp;
36}
37
38static void pvc_write_byte(u32 data, u8 byte)
39{
40 data |= picvue->e;
41 pvc_reg_write(data);
42 data &= ~picvue->data_mask;
43 data |= byte << picvue->data_shift;
44 pvc_reg_write(data);
45 ndelay(220);
46 pvc_reg_write(data & ~picvue->e);
47 ndelay(220);
48}
49
50static u8 pvc_read_byte(u32 data)
51{
52 u8 byte;
53
54 data |= picvue->e;
55 pvc_reg_write(data);
56 ndelay(220);
57 byte = (pvc_reg_read() & picvue->data_mask) >> picvue->data_shift;
58 data &= ~picvue->e;
59 pvc_reg_write(data);
60 ndelay(220);
61 return byte;
62}
63
64static u8 pvc_read_data(void)
65{
66 u32 data = pvc_reg_read();
67 u8 byte;
68 data |= picvue->rw;
69 data &= ~picvue->rs;
70 pvc_reg_write(data);
71 ndelay(40);
72 byte = pvc_read_byte(data);
73 data |= picvue->rs;
74 pvc_reg_write(data);
75 return byte;
76}
77
78#define TIMEOUT 1000
79static int pvc_wait(void)
80{
81 int i = TIMEOUT;
82 int err = 0;
83
84 while ((pvc_read_data() & PVC_BUSY) && i)
85 i--;
86 if (i == 0)
87 err = -ETIME;
88
89 return err;
90}
91
92#define MODE_INST 0
93#define MODE_DATA 1
94static void pvc_write(u8 byte, int mode)
95{
96 u32 data = pvc_reg_read();
97 data &= ~picvue->rw;
98 if (mode == MODE_DATA)
99 data |= picvue->rs;
100 else
101 data &= ~picvue->rs;
102 pvc_reg_write(data);
103 ndelay(40);
104 pvc_write_byte(data, byte);
105 if (mode == MODE_DATA)
106 data &= ~picvue->rs;
107 else
108 data |= picvue->rs;
109 pvc_reg_write(data);
110 pvc_wait();
111}
112
113void pvc_write_string(const unsigned char *str, u8 addr, int line)
114{
115 int i = 0;
116
117 if (line > 0 && (PVC_NLINES > 1))
118 addr += 0x40 * line;
119 pvc_write(0x80 | addr, MODE_INST);
120
121 while (*str != 0 && i < PVC_LINELEN) {
122 pvc_write(*str++, MODE_DATA);
123 i++;
124 }
125}
126
127void pvc_write_string_centered(const unsigned char *str, int line)
128{
129 int len = strlen(str);
130 u8 addr;
131
132 if (len > PVC_VISIBLE_CHARS)
133 addr = 0;
134 else
135 addr = (PVC_VISIBLE_CHARS - strlen(str))/2;
136
137 pvc_write_string(str, addr, line);
138}
139
140void pvc_dump_string(const unsigned char *str)
141{
142 int len = strlen(str);
143
144 pvc_write_string(str, 0, 0);
145 if (len > PVC_VISIBLE_CHARS)
146 pvc_write_string(&str[PVC_VISIBLE_CHARS], 0, 1);
147}
148
149#define BM_SIZE 8
150#define MAX_PROGRAMMABLE_CHARS 8
151int pvc_program_cg(int charnum, u8 bitmap[BM_SIZE])
152{
153 int i;
154 int addr;
155
156 if (charnum > MAX_PROGRAMMABLE_CHARS)
157 return -ENOENT;
158
159 addr = charnum * 8;
160 pvc_write(0x40 | addr, MODE_INST);
161
162 for (i = 0; i < BM_SIZE; i++)
163 pvc_write(bitmap[i], MODE_DATA);
164 return 0;
165}
166
167#define FUNC_SET_CMD 0x20
168#define EIGHT_BYTE (1 << 4)
169#define FOUR_BYTE 0
170#define TWO_LINES (1 << 3)
171#define ONE_LINE 0
172#define LARGE_FONT (1 << 2)
173#define SMALL_FONT 0
174
175static void pvc_funcset(u8 cmd)
176{
177 pvc_write(FUNC_SET_CMD | (cmd & (EIGHT_BYTE|TWO_LINES|LARGE_FONT)),
178 MODE_INST);
179}
180
181#define ENTRYMODE_CMD 0x4
182#define AUTO_INC (1 << 1)
183#define AUTO_DEC 0
184#define CURSOR_FOLLOWS_DISP (1 << 0)
185
186static void pvc_entrymode(u8 cmd)
187{
188 pvc_write(ENTRYMODE_CMD | (cmd & (AUTO_INC|CURSOR_FOLLOWS_DISP)),
189 MODE_INST);
190}
191
192#define DISP_CNT_CMD 0x08
193#define DISP_OFF 0
194#define DISP_ON (1 << 2)
195#define CUR_ON (1 << 1)
196#define CUR_BLINK (1 << 0)
197void pvc_dispcnt(u8 cmd)
198{
199 pvc_write(DISP_CNT_CMD | (cmd & (DISP_ON|CUR_ON|CUR_BLINK)), MODE_INST);
200}
201
202#define MOVE_CMD 0x10
203#define DISPLAY (1 << 3)
204#define CURSOR 0
205#define RIGHT (1 << 2)
206#define LEFT 0
207void pvc_move(u8 cmd)
208{
209 pvc_write(MOVE_CMD | (cmd & (DISPLAY|RIGHT)), MODE_INST);
210}
211
212#define CLEAR_CMD 0x1
213void pvc_clear(void)
214{
215 pvc_write(CLEAR_CMD, MODE_INST);
216}
217
218#define HOME_CMD 0x2
219void pvc_home(void)
220{
221 pvc_write(HOME_CMD, MODE_INST);
222}
223
224int pvc_init(void)
225{
226 u8 cmd = EIGHT_BYTE;
227
228 if (PVC_NLINES == 2)
229 cmd |= (SMALL_FONT|TWO_LINES);
230 else
231 cmd |= (LARGE_FONT|ONE_LINE);
232 pvc_funcset(cmd);
233 pvc_dispcnt(DISP_ON);
234 pvc_entrymode(AUTO_INC);
235
236 pvc_clear();
237 pvc_write_string_centered("Display", 0);
238 pvc_write_string_centered("Initialized", 1);
239
240 return 0;
241}
242
243module_init(pvc_init);
244MODULE_LICENSE("GPL");
diff --git a/arch/mips/lasat/picvue.h b/arch/mips/lasat/picvue.h
new file mode 100644
index 000000000000..2a96bf971897
--- /dev/null
+++ b/arch/mips/lasat/picvue.h
@@ -0,0 +1,48 @@
1/*
2 * Picvue PVC160206 display driver
3 *
4 * Brian Murphy <brian.murphy@eicon.com>
5 *
6 */
7#include <asm/semaphore.h>
8
9struct pvc_defs {
10 volatile u32 *reg;
11 u32 data_shift;
12 u32 data_mask;
13 u32 e;
14 u32 rw;
15 u32 rs;
16};
17
18extern struct pvc_defs *picvue;
19
20#define PVC_NLINES 2
21#define PVC_DISPMEM 80
22#define PVC_LINELEN PVC_DISPMEM / PVC_NLINES
23#define PVC_VISIBLE_CHARS 16
24
25void pvc_write_string(const unsigned char *str, u8 addr, int line);
26void pvc_write_string_centered(const unsigned char *str, int line);
27void pvc_dump_string(const unsigned char *str);
28
29#define BM_SIZE 8
30#define MAX_PROGRAMMABLE_CHARS 8
31int pvc_program_cg(int charnum, u8 bitmap[BM_SIZE]);
32
33void pvc_dispcnt(u8 cmd);
34#define DISP_OFF 0
35#define DISP_ON (1 << 2)
36#define CUR_ON (1 << 1)
37#define CUR_BLINK (1 << 0)
38
39void pvc_move(u8 cmd);
40#define DISPLAY (1 << 3)
41#define CURSOR 0
42#define RIGHT (1 << 2)
43#define LEFT 0
44
45void pvc_clear(void);
46void pvc_home(void);
47
48extern struct semaphore pvc_sem;
diff --git a/arch/mips/lasat/picvue_proc.c b/arch/mips/lasat/picvue_proc.c
new file mode 100644
index 000000000000..9947c1525822
--- /dev/null
+++ b/arch/mips/lasat/picvue_proc.c
@@ -0,0 +1,191 @@
1/*
2 * Picvue PVC160206 display driver
3 *
4 * Brian Murphy <brian.murphy@eicon.com>
5 *
6 */
7#include <linux/kernel.h>
8#include <linux/module.h>
9#include <linux/init.h>
10#include <linux/errno.h>
11
12#include <linux/proc_fs.h>
13#include <linux/interrupt.h>
14
15#include <linux/timer.h>
16
17#include "picvue.h"
18
19static char pvc_lines[PVC_NLINES][PVC_LINELEN+1];
20static int pvc_linedata[PVC_NLINES];
21static struct proc_dir_entry *pvc_display_dir;
22static char *pvc_linename[PVC_NLINES] = {"line1", "line2"};
23#define DISPLAY_DIR_NAME "display"
24static int scroll_dir, scroll_interval;
25
26static struct timer_list timer;
27
28static void pvc_display(unsigned long data)
29{
30 int i;
31
32 pvc_clear();
33 for (i = 0; i < PVC_NLINES; i++)
34 pvc_write_string(pvc_lines[i], 0, i);
35}
36
37static DECLARE_TASKLET(pvc_display_tasklet, &pvc_display, 0);
38
39static int pvc_proc_read_line(char *page, char **start,
40 off_t off, int count,
41 int *eof, void *data)
42{
43 char *origpage = page;
44 int lineno = *(int *)data;
45
46 if (lineno < 0 || lineno > PVC_NLINES) {
47 printk(KERN_WARNING "proc_read_line: invalid lineno %d\n", lineno);
48 return 0;
49 }
50
51 down(&pvc_sem);
52 page += sprintf(page, "%s\n", pvc_lines[lineno]);
53 up(&pvc_sem);
54
55 return page - origpage;
56}
57
58static int pvc_proc_write_line(struct file *file, const char *buffer,
59 unsigned long count, void *data)
60{
61 int origcount = count;
62 int lineno = *(int *)data;
63
64 if (lineno < 0 || lineno > PVC_NLINES) {
65 printk(KERN_WARNING "proc_write_line: invalid lineno %d\n",
66 lineno);
67 return origcount;
68 }
69
70 if (count > PVC_LINELEN)
71 count = PVC_LINELEN;
72
73 if (buffer[count-1] == '\n')
74 count--;
75
76 down(&pvc_sem);
77 strncpy(pvc_lines[lineno], buffer, count);
78 pvc_lines[lineno][count] = '\0';
79 up(&pvc_sem);
80
81 tasklet_schedule(&pvc_display_tasklet);
82
83 return origcount;
84}
85
86static int pvc_proc_write_scroll(struct file *file, const char *buffer,
87 unsigned long count, void *data)
88{
89 int origcount = count;
90 int cmd = simple_strtol(buffer, NULL, 10);
91
92 down(&pvc_sem);
93 if (scroll_interval != 0)
94 del_timer(&timer);
95
96 if (cmd == 0) {
97 scroll_dir = 0;
98 scroll_interval = 0;
99 } else {
100 if (cmd < 0) {
101 scroll_dir = -1;
102 scroll_interval = -cmd;
103 } else {
104 scroll_dir = 1;
105 scroll_interval = cmd;
106 }
107 add_timer(&timer);
108 }
109 up(&pvc_sem);
110
111 return origcount;
112}
113
114static int pvc_proc_read_scroll(char *page, char **start,
115 off_t off, int count,
116 int *eof, void *data)
117{
118 char *origpage = page;
119
120 down(&pvc_sem);
121 page += sprintf(page, "%d\n", scroll_dir * scroll_interval);
122 up(&pvc_sem);
123
124 return page - origpage;
125}
126
127
128void pvc_proc_timerfunc(unsigned long data)
129{
130 if (scroll_dir < 0)
131 pvc_move(DISPLAY|RIGHT);
132 else if (scroll_dir > 0)
133 pvc_move(DISPLAY|LEFT);
134
135 timer.expires = jiffies + scroll_interval;
136 add_timer(&timer);
137}
138
139static void pvc_proc_cleanup(void)
140{
141 int i;
142 for (i = 0; i < PVC_NLINES; i++)
143 remove_proc_entry(pvc_linename[i], pvc_display_dir);
144 remove_proc_entry("scroll", pvc_display_dir);
145 remove_proc_entry(DISPLAY_DIR_NAME, NULL);
146
147 del_timer(&timer);
148}
149
150static int __init pvc_proc_init(void)
151{
152 struct proc_dir_entry *proc_entry;
153 int i;
154
155 pvc_display_dir = proc_mkdir(DISPLAY_DIR_NAME, NULL);
156 if (pvc_display_dir == NULL)
157 goto error;
158
159 for (i = 0; i < PVC_NLINES; i++) {
160 strcpy(pvc_lines[i], "");
161 pvc_linedata[i] = i;
162 }
163 for (i = 0; i < PVC_NLINES; i++) {
164 proc_entry = create_proc_entry(pvc_linename[i], 0644,
165 pvc_display_dir);
166 if (proc_entry == NULL)
167 goto error;
168
169 proc_entry->read_proc = pvc_proc_read_line;
170 proc_entry->write_proc = pvc_proc_write_line;
171 proc_entry->data = &pvc_linedata[i];
172 }
173 proc_entry = create_proc_entry("scroll", 0644, pvc_display_dir);
174 if (proc_entry == NULL)
175 goto error;
176
177 proc_entry->write_proc = pvc_proc_write_scroll;
178 proc_entry->read_proc = pvc_proc_read_scroll;
179
180 init_timer(&timer);
181 timer.function = pvc_proc_timerfunc;
182
183 return 0;
184error:
185 pvc_proc_cleanup();
186 return -ENOMEM;
187}
188
189module_init(pvc_proc_init);
190module_exit(pvc_proc_cleanup);
191MODULE_LICENSE("GPL");
diff --git a/arch/mips/lasat/prom.c b/arch/mips/lasat/prom.c
new file mode 100644
index 000000000000..4b80fffcf262
--- /dev/null
+++ b/arch/mips/lasat/prom.c
@@ -0,0 +1,128 @@
1/*
2 * PROM interface routines.
3 */
4#include <linux/types.h>
5#include <linux/init.h>
6#include <linux/string.h>
7#include <linux/ctype.h>
8#include <linux/kernel.h>
9#include <linux/mm.h>
10#include <linux/bootmem.h>
11#include <linux/ioport.h>
12#include <asm/bootinfo.h>
13#include <asm/lasat/lasat.h>
14#include <asm/cpu.h>
15
16#include "at93c.h"
17#include <asm/lasat/eeprom.h>
18#include "prom.h"
19
20#define RESET_VECTOR 0xbfc00000
21#define PROM_JUMP_TABLE_ENTRY(n) (*((u32 *)(RESET_VECTOR + 0x20) + n))
22#define PROM_DISPLAY_ADDR PROM_JUMP_TABLE_ENTRY(0)
23#define PROM_PUTC_ADDR PROM_JUMP_TABLE_ENTRY(1)
24#define PROM_MONITOR_ADDR PROM_JUMP_TABLE_ENTRY(2)
25
26static void null_prom_display(const char *string, int pos, int clear)
27{
28}
29
30static void null_prom_monitor(void)
31{
32}
33
34static void null_prom_putc(char c)
35{
36}
37
38/* these are functions provided by the bootloader */
39static void (*__prom_putc)(char c) = null_prom_putc;
40
41void prom_putchar(char c)
42{
43 __prom_putc(c);
44}
45
46void (*prom_display)(const char *string, int pos, int clear) =
47 null_prom_display;
48void (*prom_monitor)(void) = null_prom_monitor;
49
50unsigned int lasat_ndelay_divider;
51
52static void setup_prom_vectors(void)
53{
54 u32 version = *(u32 *)(RESET_VECTOR + 0x90);
55
56 if (version >= 307) {
57 prom_display = (void *)PROM_DISPLAY_ADDR;
58 __prom_putc = (void *)PROM_PUTC_ADDR;
59 prom_monitor = (void *)PROM_MONITOR_ADDR;
60 }
61 printk(KERN_DEBUG "prom vectors set up\n");
62}
63
64static struct at93c_defs at93c_defs[N_MACHTYPES] = {
65 {
66 .reg = (void *)AT93C_REG_100,
67 .rdata_reg = (void *)AT93C_RDATA_REG_100,
68 .rdata_shift = AT93C_RDATA_SHIFT_100,
69 .wdata_shift = AT93C_WDATA_SHIFT_100,
70 .cs = AT93C_CS_M_100,
71 .clk = AT93C_CLK_M_100
72 }, {
73 .reg = (void *)AT93C_REG_200,
74 .rdata_reg = (void *)AT93C_RDATA_REG_200,
75 .rdata_shift = AT93C_RDATA_SHIFT_200,
76 .wdata_shift = AT93C_WDATA_SHIFT_200,
77 .cs = AT93C_CS_M_200,
78 .clk = AT93C_CLK_M_200
79 },
80};
81
82void __init prom_init(void)
83{
84 int argc = fw_arg0;
85 char **argv = (char **) fw_arg1;
86
87 setup_prom_vectors();
88
89 if (current_cpu_data.cputype == CPU_R5000) {
90 printk(KERN_INFO "LASAT 200 board\n");
91 mips_machtype = MACH_LASAT_200;
92 lasat_ndelay_divider = LASAT_200_DIVIDER;
93 } else {
94 printk(KERN_INFO "LASAT 100 board\n");
95 mips_machtype = MACH_LASAT_100;
96 lasat_ndelay_divider = LASAT_100_DIVIDER;
97 }
98
99 at93c = &at93c_defs[mips_machtype];
100
101 lasat_init_board_info(); /* Read info from EEPROM */
102
103 mips_machgroup = MACH_GROUP_LASAT;
104
105 /* Get the command line */
106 if (argc > 0) {
107 strncpy(arcs_cmdline, argv[0], CL_SIZE-1);
108 arcs_cmdline[CL_SIZE-1] = '\0';
109 }
110
111 /* Set the I/O base address */
112 set_io_port_base(KSEG1);
113
114 /* Set memory regions */
115 ioport_resource.start = 0;
116 ioport_resource.end = 0xffffffff; /* Wrong, fixme. */
117
118 add_memory_region(0, lasat_board_info.li_memsize, BOOT_MEM_RAM);
119}
120
121void __init prom_free_prom_memory(void)
122{
123}
124
125const char *get_system_type(void)
126{
127 return lasat_board_info.li_bmstr;
128}
diff --git a/arch/mips/lasat/prom.h b/arch/mips/lasat/prom.h
new file mode 100644
index 000000000000..337acbc27442
--- /dev/null
+++ b/arch/mips/lasat/prom.h
@@ -0,0 +1,7 @@
1#ifndef __PROM_H
2#define __PROM_H
3
4extern void (*prom_display)(const char *string, int pos, int clear);
5extern void (*prom_monitor)(void);
6
7#endif /* __PROM_H */
diff --git a/arch/mips/lasat/reset.c b/arch/mips/lasat/reset.c
new file mode 100644
index 000000000000..b1e7a89fb730
--- /dev/null
+++ b/arch/mips/lasat/reset.c
@@ -0,0 +1,61 @@
1/*
2 * Thomas Horsten <thh@lasat.com>
3 * Copyright (C) 2000 LASAT Networks A/S.
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 *
18 * Reset the LASAT board.
19 */
20#include <linux/kernel.h>
21#include <linux/pm.h>
22
23#include <asm/reboot.h>
24#include <asm/system.h>
25#include <asm/lasat/lasat.h>
26
27#include "picvue.h"
28#include "prom.h"
29
30static void lasat_machine_restart(char *command);
31static void lasat_machine_halt(void);
32
33/* Used to set machine to boot in service mode via /proc interface */
34int lasat_boot_to_service;
35
36static void lasat_machine_restart(char *command)
37{
38 local_irq_disable();
39
40 if (lasat_boot_to_service) {
41 *(volatile unsigned int *)0xa0000024 = 0xdeadbeef;
42 *(volatile unsigned int *)0xa00000fc = 0xfedeabba;
43 }
44 *lasat_misc->reset_reg = 0xbedead;
45 for (;;) ;
46}
47
48static void lasat_machine_halt(void)
49{
50 local_irq_disable();
51
52 prom_monitor();
53 for (;;) ;
54}
55
56void lasat_reboot_setup(void)
57{
58 _machine_restart = lasat_machine_restart;
59 _machine_halt = lasat_machine_halt;
60 pm_power_off = lasat_machine_halt;
61}
diff --git a/arch/mips/lasat/serial.c b/arch/mips/lasat/serial.c
new file mode 100644
index 000000000000..205bd397d75b
--- /dev/null
+++ b/arch/mips/lasat/serial.c
@@ -0,0 +1,94 @@
1/*
2 * Registration of Lasat UART platform device.
3 *
4 * Copyright (C) 2007 Brian Murphy <brian@murphy.dk>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20#include <linux/errno.h>
21#include <linux/init.h>
22#include <linux/ioport.h>
23#include <linux/platform_device.h>
24#include <linux/serial_8250.h>
25
26#include <asm/bootinfo.h>
27#include <asm/lasat/lasat.h>
28#include <asm/lasat/serial.h>
29
30static struct resource lasat_serial_res[2] __initdata;
31
32static struct plat_serial8250_port lasat_serial8250_port[] = {
33 {
34 .iotype = UPIO_MEM,
35 .flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF |
36 UPF_SKIP_TEST,
37 },
38 {},
39};
40
41static __init int lasat_uart_add(void)
42{
43 struct platform_device *pdev;
44 int retval;
45
46 pdev = platform_device_alloc("serial8250", -1);
47 if (!pdev)
48 return -ENOMEM;
49
50 if (mips_machtype == MACH_LASAT_100) {
51 lasat_serial_res[0].start = KSEG1ADDR(LASAT_UART_REGS_BASE_100);
52 lasat_serial_res[0].end = lasat_serial_res[0].start + LASAT_UART_REGS_SHIFT_100 * 8 - 1;
53 lasat_serial_res[0].flags = IORESOURCE_MEM;
54 lasat_serial_res[1].start = LASATINT_UART_100;
55 lasat_serial_res[1].end = LASATINT_UART_100;
56 lasat_serial_res[1].flags = IORESOURCE_IRQ;
57
58 lasat_serial8250_port[0].mapbase = LASAT_UART_REGS_BASE_100;
59 lasat_serial8250_port[0].uartclk = LASAT_BASE_BAUD_100 * 16;
60 lasat_serial8250_port[0].regshift = LASAT_UART_REGS_SHIFT_100;
61 lasat_serial8250_port[0].irq = LASATINT_UART_100;
62 } else {
63 lasat_serial_res[0].start = KSEG1ADDR(LASAT_UART_REGS_BASE_200);
64 lasat_serial_res[0].end = lasat_serial_res[0].start + LASAT_UART_REGS_SHIFT_200 * 8 - 1;
65 lasat_serial_res[0].flags = IORESOURCE_MEM;
66 lasat_serial_res[1].start = LASATINT_UART_200;
67 lasat_serial_res[1].end = LASATINT_UART_200;
68 lasat_serial_res[1].flags = IORESOURCE_IRQ;
69
70 lasat_serial8250_port[0].mapbase = LASAT_UART_REGS_BASE_200;
71 lasat_serial8250_port[0].uartclk = LASAT_BASE_BAUD_200 * 16;
72 lasat_serial8250_port[0].regshift = LASAT_UART_REGS_SHIFT_200;
73 lasat_serial8250_port[0].irq = LASATINT_UART_200;
74 }
75
76 pdev->id = PLAT8250_DEV_PLATFORM;
77 pdev->dev.platform_data = lasat_serial8250_port;
78
79 retval = platform_device_add_resources(pdev, lasat_serial_res, ARRAY_SIZE(lasat_serial_res));
80 if (retval)
81 goto err_free_device;
82
83 retval = platform_device_add(pdev);
84 if (retval)
85 goto err_free_device;
86
87 return 0;
88
89err_free_device:
90 platform_device_put(pdev);
91
92 return retval;
93}
94device_initcall(lasat_uart_add);
diff --git a/arch/mips/lasat/setup.c b/arch/mips/lasat/setup.c
new file mode 100644
index 000000000000..187e37821d93
--- /dev/null
+++ b/arch/mips/lasat/setup.c
@@ -0,0 +1,158 @@
1/*
2 * Carsten Langgaard, carstenl@mips.com
3 * Copyright (C) 1999 MIPS Technologies, Inc. All rights reserved.
4 *
5 * Thomas Horsten <thh@lasat.com>
6 * Copyright (C) 2000 LASAT Networks A/S.
7 *
8 * Brian Murphy <brian@murphy.dk>
9 *
10 * This program is free software; you can distribute it and/or modify it
11 * under the terms of the GNU General Public License (Version 2) as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 * for more details.
18 *
19 * You should have received a copy of the GNU General Public License along
20 * with this program; if not, write to the Free Software Foundation, Inc.,
21 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
22 *
23 * Lasat specific setup.
24 */
25#include <linux/init.h>
26#include <linux/sched.h>
27#include <linux/pci.h>
28#include <linux/interrupt.h>
29#include <linux/tty.h>
30
31#include <asm/time.h>
32#include <asm/cpu.h>
33#include <asm/bootinfo.h>
34#include <asm/irq.h>
35#include <asm/lasat/lasat.h>
36#include <asm/lasat/serial.h>
37
38#ifdef CONFIG_PICVUE
39#include <linux/notifier.h>
40#endif
41
42#include "ds1603.h"
43#include <asm/lasat/ds1603.h>
44#include <asm/lasat/picvue.h>
45#include <asm/lasat/eeprom.h>
46
47#include "prom.h"
48
49int lasat_command_line;
50void lasatint_init(void);
51
52extern void lasat_reboot_setup(void);
53extern void pcisetup(void);
54extern void edhac_init(void *, void *, void *);
55extern void addrflt_init(void);
56
57struct lasat_misc lasat_misc_info[N_MACHTYPES] = {
58 {
59 .reset_reg = (void *)KSEG1ADDR(0x1c840000),
60 .flash_wp_reg = (void *)KSEG1ADDR(0x1c800000), 2
61 }, {
62 .reset_reg = (void *)KSEG1ADDR(0x11080000),
63 .flash_wp_reg = (void *)KSEG1ADDR(0x11000000), 6
64 }
65};
66
67struct lasat_misc *lasat_misc;
68
69#ifdef CONFIG_DS1603
70static struct ds_defs ds_defs[N_MACHTYPES] = {
71 { (void *)DS1603_REG_100, (void *)DS1603_REG_100,
72 DS1603_RST_100, DS1603_CLK_100, DS1603_DATA_100,
73 DS1603_DATA_SHIFT_100, 0, 0 },
74 { (void *)DS1603_REG_200, (void *)DS1603_DATA_REG_200,
75 DS1603_RST_200, DS1603_CLK_200, DS1603_DATA_200,
76 DS1603_DATA_READ_SHIFT_200, 1, 2000 }
77};
78#endif
79
80#ifdef CONFIG_PICVUE
81#include "picvue.h"
82static struct pvc_defs pvc_defs[N_MACHTYPES] = {
83 { (void *)PVC_REG_100, PVC_DATA_SHIFT_100, PVC_DATA_M_100,
84 PVC_E_100, PVC_RW_100, PVC_RS_100 },
85 { (void *)PVC_REG_200, PVC_DATA_SHIFT_200, PVC_DATA_M_200,
86 PVC_E_200, PVC_RW_200, PVC_RS_200 }
87};
88#endif
89
90static int lasat_panic_display(struct notifier_block *this,
91 unsigned long event, void *ptr)
92{
93#ifdef CONFIG_PICVUE
94 unsigned char *string = ptr;
95 if (string == NULL)
96 string = "Kernel Panic";
97 pvc_dump_string(string);
98#endif
99 return NOTIFY_DONE;
100}
101
102static int lasat_panic_prom_monitor(struct notifier_block *this,
103 unsigned long event, void *ptr)
104{
105 prom_monitor();
106 return NOTIFY_DONE;
107}
108
109static struct notifier_block lasat_panic_block[] =
110{
111 {
112 .notifier_call = lasat_panic_display,
113 .priority = INT_MAX
114 }, {
115 .notifier_call = lasat_panic_prom_monitor,
116 .priority = INT_MIN
117 }
118};
119
120static void lasat_time_init(void)
121{
122 mips_hpt_frequency = lasat_board_info.li_cpu_hz / 2;
123}
124
125void __init plat_timer_setup(struct irqaction *irq)
126{
127 change_c0_status(ST0_IM, IE_IRQ0 | IE_IRQ5);
128}
129
130void __init plat_mem_setup(void)
131{
132 int i;
133 lasat_misc = &lasat_misc_info[mips_machtype];
134#ifdef CONFIG_PICVUE
135 picvue = &pvc_defs[mips_machtype];
136#endif
137
138 /* Set up panic notifier */
139 for (i = 0; i < ARRAY_SIZE(lasat_panic_block); i++)
140 atomic_notifier_chain_register(&panic_notifier_list,
141 &lasat_panic_block[i]);
142
143 lasat_reboot_setup();
144
145 board_time_init = lasat_time_init;
146
147#ifdef CONFIG_DS1603
148 ds1603 = &ds_defs[mips_machtype];
149 rtc_mips_get_time = ds1603_read;
150 rtc_mips_set_time = ds1603_set;
151#endif
152
153#ifdef DYNAMIC_SERIAL_INIT
154 serial_init();
155#endif
156
157 pr_info("Lasat specific initialization complete\n");
158}
diff --git a/arch/mips/lasat/sysctl.c b/arch/mips/lasat/sysctl.c
new file mode 100644
index 000000000000..4575a829766d
--- /dev/null
+++ b/arch/mips/lasat/sysctl.c
@@ -0,0 +1,454 @@
1/*
2 * Thomas Horsten <thh@lasat.com>
3 * Copyright (C) 2000 LASAT Networks A/S.
4 *
5 * This program is free software; you can distribute it and/or modify it
6 * under the terms of the GNU General Public License (Version 2) as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
17 *
18 * Routines specific to the LASAT boards
19 */
20#include <linux/types.h>
21#include <asm/lasat/lasat.h>
22
23#include <linux/module.h>
24#include <linux/sysctl.h>
25#include <linux/stddef.h>
26#include <linux/init.h>
27#include <linux/fs.h>
28#include <linux/ctype.h>
29#include <linux/string.h>
30#include <linux/net.h>
31#include <linux/inet.h>
32#include <linux/mutex.h>
33#include <linux/uaccess.h>
34
35#include "sysctl.h"
36#include "ds1603.h"
37
38static DEFINE_MUTEX(lasat_info_mutex);
39
40/* Strategy function to write EEPROM after changing string entry */
41int sysctl_lasatstring(ctl_table *table, int *name, int nlen,
42 void *oldval, size_t *oldlenp,
43 void *newval, size_t newlen)
44{
45 int r;
46
47 mutex_lock(&lasat_info_mutex);
48 r = sysctl_string(table, name,
49 nlen, oldval, oldlenp, newval, newlen);
50 if (r < 0) {
51 mutex_unlock(&lasat_info_mutex);
52 return r;
53 }
54 if (newval && newlen)
55 lasat_write_eeprom_info();
56 mutex_unlock(&lasat_info_mutex);
57
58 return 1;
59}
60
61
62/* And the same for proc */
63int proc_dolasatstring(ctl_table *table, int write, struct file *filp,
64 void *buffer, size_t *lenp, loff_t *ppos)
65{
66 int r;
67
68 mutex_lock(&lasat_info_mutex);
69 r = proc_dostring(table, write, filp, buffer, lenp, ppos);
70 if ((!write) || r) {
71 mutex_unlock(&lasat_info_mutex);
72 return r;
73 }
74 lasat_write_eeprom_info();
75 mutex_unlock(&lasat_info_mutex);
76
77 return 0;
78}
79
80/* proc function to write EEPROM after changing int entry */
81int proc_dolasatint(ctl_table *table, int write, struct file *filp,
82 void *buffer, size_t *lenp, loff_t *ppos)
83{
84 int r;
85
86 mutex_lock(&lasat_info_mutex);
87 r = proc_dointvec(table, write, filp, buffer, lenp, ppos);
88 if ((!write) || r) {
89 mutex_unlock(&lasat_info_mutex);
90 return r;
91 }
92 lasat_write_eeprom_info();
93 mutex_unlock(&lasat_info_mutex);
94
95 return 0;
96}
97
98static int rtctmp;
99
100#ifdef CONFIG_DS1603
101/* proc function to read/write RealTime Clock */
102int proc_dolasatrtc(ctl_table *table, int write, struct file *filp,
103 void *buffer, size_t *lenp, loff_t *ppos)
104{
105 int r;
106
107 mutex_lock(&lasat_info_mutex);
108 if (!write) {
109 rtctmp = ds1603_read();
110 /* check for time < 0 and set to 0 */
111 if (rtctmp < 0)
112 rtctmp = 0;
113 }
114 r = proc_dointvec(table, write, filp, buffer, lenp, ppos);
115 if ((!write) || r) {
116 mutex_unlock(&lasat_info_mutex);
117 return r;
118 }
119 ds1603_set(rtctmp);
120 mutex_unlock(&lasat_info_mutex);
121
122 return 0;
123}
124#endif
125
126/* Sysctl for setting the IP addresses */
127int sysctl_lasat_intvec(ctl_table *table, int *name, int nlen,
128 void *oldval, size_t *oldlenp,
129 void *newval, size_t newlen)
130{
131 int r;
132
133 mutex_lock(&lasat_info_mutex);
134 r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen);
135 if (r < 0) {
136 mutex_unlock(&lasat_info_mutex);
137 return r;
138 }
139 if (newval && newlen)
140 lasat_write_eeprom_info();
141 mutex_unlock(&lasat_info_mutex);
142
143 return 1;
144}
145
146#ifdef CONFIG_DS1603
147/* Same for RTC */
148int sysctl_lasat_rtc(ctl_table *table, int *name, int nlen,
149 void *oldval, size_t *oldlenp,
150 void *newval, size_t newlen)
151{
152 int r;
153
154 mutex_lock(&lasat_info_mutex);
155 rtctmp = ds1603_read();
156 if (rtctmp < 0)
157 rtctmp = 0;
158 r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen);
159 if (r < 0) {
160 mutex_unlock(&lasat_info_mutex);
161 return r;
162 }
163 if (newval && newlen)
164 ds1603_set(rtctmp);
165 mutex_unlock(&lasat_info_mutex);
166
167 return 1;
168}
169#endif
170
171#ifdef CONFIG_INET
172static char lasat_bcastaddr[16];
173
174void update_bcastaddr(void)
175{
176 unsigned int ip;
177
178 ip = (lasat_board_info.li_eeprom_info.ipaddr &
179 lasat_board_info.li_eeprom_info.netmask) |
180 ~lasat_board_info.li_eeprom_info.netmask;
181
182 sprintf(lasat_bcastaddr, "%d.%d.%d.%d",
183 (ip) & 0xff,
184 (ip >> 8) & 0xff,
185 (ip >> 16) & 0xff,
186 (ip >> 24) & 0xff);
187}
188
189static char proc_lasat_ipbuf[32];
190
191/* Parsing of IP address */
192int proc_lasat_ip(ctl_table *table, int write, struct file *filp,
193 void *buffer, size_t *lenp, loff_t *ppos)
194{
195 unsigned int ip;
196 char *p, c;
197 int len;
198
199 if (!table->data || !table->maxlen || !*lenp ||
200 (*ppos && !write)) {
201 *lenp = 0;
202 return 0;
203 }
204
205 mutex_lock(&lasat_info_mutex);
206 if (write) {
207 len = 0;
208 p = buffer;
209 while (len < *lenp) {
210 if (get_user(c, p++)) {
211 mutex_unlock(&lasat_info_mutex);
212 return -EFAULT;
213 }
214 if (c == 0 || c == '\n')
215 break;
216 len++;
217 }
218 if (len >= sizeof(proc_lasat_ipbuf)-1)
219 len = sizeof(proc_lasat_ipbuf) - 1;
220 if (copy_from_user(proc_lasat_ipbuf, buffer, len)) {
221 mutex_unlock(&lasat_info_mutex);
222 return -EFAULT;
223 }
224 proc_lasat_ipbuf[len] = 0;
225 *ppos += *lenp;
226 /* Now see if we can convert it to a valid IP */
227 ip = in_aton(proc_lasat_ipbuf);
228 *(unsigned int *)(table->data) = ip;
229 lasat_write_eeprom_info();
230 } else {
231 ip = *(unsigned int *)(table->data);
232 sprintf(proc_lasat_ipbuf, "%d.%d.%d.%d",
233 (ip) & 0xff,
234 (ip >> 8) & 0xff,
235 (ip >> 16) & 0xff,
236 (ip >> 24) & 0xff);
237 len = strlen(proc_lasat_ipbuf);
238 if (len > *lenp)
239 len = *lenp;
240 if (len)
241 if (copy_to_user(buffer, proc_lasat_ipbuf, len)) {
242 mutex_unlock(&lasat_info_mutex);
243 return -EFAULT;
244 }
245 if (len < *lenp) {
246 if (put_user('\n', ((char *) buffer) + len)) {
247 mutex_unlock(&lasat_info_mutex);
248 return -EFAULT;
249 }
250 len++;
251 }
252 *lenp = len;
253 *ppos += len;
254 }
255 update_bcastaddr();
256 mutex_unlock(&lasat_info_mutex);
257
258 return 0;
259}
260#endif /* defined(CONFIG_INET) */
261
262static int sysctl_lasat_eeprom_value(ctl_table *table, int *name, int nlen,
263 void *oldval, size_t *oldlenp,
264 void *newval, size_t newlen)
265{
266 int r;
267
268 mutex_lock(&lasat_info_mutex);
269 r = sysctl_intvec(table, name, nlen, oldval, oldlenp, newval, newlen);
270 if (r < 0) {
271 mutex_unlock(&lasat_info_mutex);
272 return r;
273 }
274
275 if (newval && newlen) {
276 if (name && *name == LASAT_PRID)
277 lasat_board_info.li_eeprom_info.prid = *(int *)newval;
278
279 lasat_write_eeprom_info();
280 lasat_init_board_info();
281 }
282 mutex_unlock(&lasat_info_mutex);
283
284 return 0;
285}
286
287int proc_lasat_eeprom_value(ctl_table *table, int write, struct file *filp,
288 void *buffer, size_t *lenp, loff_t *ppos)
289{
290 int r;
291
292 mutex_lock(&lasat_info_mutex);
293 r = proc_dointvec(table, write, filp, buffer, lenp, ppos);
294 if ((!write) || r) {
295 mutex_unlock(&lasat_info_mutex);
296 return r;
297 }
298 if (filp && filp->f_path.dentry) {
299 if (!strcmp(filp->f_path.dentry->d_name.name, "prid"))
300 lasat_board_info.li_eeprom_info.prid =
301 lasat_board_info.li_prid;
302 if (!strcmp(filp->f_path.dentry->d_name.name, "debugaccess"))
303 lasat_board_info.li_eeprom_info.debugaccess =
304 lasat_board_info.li_debugaccess;
305 }
306 lasat_write_eeprom_info();
307 mutex_unlock(&lasat_info_mutex);
308
309 return 0;
310}
311
312extern int lasat_boot_to_service;
313
314#ifdef CONFIG_SYSCTL
315
316static ctl_table lasat_table[] = {
317 {
318 .ctl_name = CTL_UNNUMBERED,
319 .procname = "cpu-hz",
320 .data = &lasat_board_info.li_cpu_hz,
321 .maxlen = sizeof(int),
322 .mode = 0444,
323 .proc_handler = &proc_dointvec,
324 .strategy = &sysctl_intvec
325 },
326 {
327 .ctl_name = CTL_UNNUMBERED,
328 .procname = "bus-hz",
329 .data = &lasat_board_info.li_bus_hz,
330 .maxlen = sizeof(int),
331 .mode = 0444,
332 .proc_handler = &proc_dointvec,
333 .strategy = &sysctl_intvec
334 },
335 {
336 .ctl_name = CTL_UNNUMBERED,
337 .procname = "bmid",
338 .data = &lasat_board_info.li_bmid,
339 .maxlen = sizeof(int),
340 .mode = 0444,
341 .proc_handler = &proc_dointvec,
342 .strategy = &sysctl_intvec
343 },
344 {
345 .ctl_name = CTL_UNNUMBERED,
346 .procname = "prid",
347 .data = &lasat_board_info.li_prid,
348 .maxlen = sizeof(int),
349 .mode = 0644,
350 .proc_handler = &proc_lasat_eeprom_value,
351 .strategy = &sysctl_lasat_eeprom_value
352 },
353#ifdef CONFIG_INET
354 {
355 .ctl_name = CTL_UNNUMBERED,
356 .procname = "ipaddr",
357 .data = &lasat_board_info.li_eeprom_info.ipaddr,
358 .maxlen = sizeof(int),
359 .mode = 0644,
360 .proc_handler = &proc_lasat_ip,
361 .strategy = &sysctl_lasat_intvec
362 },
363 {
364 .ctl_name = LASAT_NETMASK,
365 .procname = "netmask",
366 .data = &lasat_board_info.li_eeprom_info.netmask,
367 .maxlen = sizeof(int),
368 .mode = 0644,
369 .proc_handler = &proc_lasat_ip,
370 .strategy = &sysctl_lasat_intvec
371 },
372 {
373 .ctl_name = CTL_UNNUMBERED,
374 .procname = "bcastaddr",
375 .data = &lasat_bcastaddr,
376 .maxlen = sizeof(lasat_bcastaddr),
377 .mode = 0600,
378 .proc_handler = &proc_dostring,
379 .strategy = &sysctl_string
380 },
381#endif
382 {
383 .ctl_name = CTL_UNNUMBERED,
384 .procname = "passwd_hash",
385 .data = &lasat_board_info.li_eeprom_info.passwd_hash,
386 .maxlen =
387 sizeof(lasat_board_info.li_eeprom_info.passwd_hash),
388 .mode = 0600,
389 .proc_handler = &proc_dolasatstring,
390 .strategy = &sysctl_lasatstring
391 },
392 {
393 .ctl_name = CTL_UNNUMBERED,
394 .procname = "boot-service",
395 .data = &lasat_boot_to_service,
396 .maxlen = sizeof(int),
397 .mode = 0644,
398 .proc_handler = &proc_dointvec,
399 .strategy = &sysctl_intvec
400 },
401#ifdef CONFIG_DS1603
402 {
403 .ctl_name = CTL_UNNUMBERED,
404 .procname = "rtc",
405 .data = &rtctmp,
406 .maxlen = sizeof(int),
407 .mode = 0644,
408 .proc_handler = &proc_dolasatrtc,
409 .strategy = &sysctl_lasat_rtc
410 },
411#endif
412 {
413 .ctl_name = CTL_UNNUMBERED,
414 .procname = "namestr",
415 .data = &lasat_board_info.li_namestr,
416 .maxlen = sizeof(lasat_board_info.li_namestr),
417 .mode = 0444,
418 .proc_handler = &proc_dostring,
419 .strategy = &sysctl_string
420 },
421 {
422 .ctl_name = CTL_UNNUMBERED,
423 .procname = "typestr",
424 .data = &lasat_board_info.li_typestr,
425 .maxlen = sizeof(lasat_board_info.li_typestr),
426 .mode = 0444,
427 .proc_handler = &proc_dostring,
428 .strategy = &sysctl_string
429 },
430 {}
431};
432
433static ctl_table lasat_root_table[] = {
434 {
435 .ctl_name = CTL_UNNUMBERED,
436 .procname = "lasat",
437 .mode = 0555,
438 .child = lasat_table
439 },
440 {}
441};
442
443static int __init lasat_register_sysctl(void)
444{
445 struct ctl_table_header *lasat_table_header;
446
447 lasat_table_header =
448 register_sysctl_table(lasat_root_table);
449
450 return 0;
451}
452
453__initcall(lasat_register_sysctl);
454#endif /* CONFIG_SYSCTL */
diff --git a/arch/mips/lasat/sysctl.h b/arch/mips/lasat/sysctl.h
new file mode 100644
index 000000000000..341b97933423
--- /dev/null
+++ b/arch/mips/lasat/sysctl.h
@@ -0,0 +1,24 @@
1/*
2 * LASAT sysctl values
3 */
4
5#ifndef _LASAT_SYSCTL_H
6#define _LASAT_SYSCTL_H
7
8/* /proc/sys/lasat */
9enum {
10 LASAT_CPU_HZ = 1,
11 LASAT_BUS_HZ,
12 LASAT_MODEL,
13 LASAT_PRID,
14 LASAT_IPADDR,
15 LASAT_NETMASK,
16 LASAT_BCAST,
17 LASAT_PASSWORD,
18 LASAT_SBOOT,
19 LASAT_RTC,
20 LASAT_NAMESTR,
21 LASAT_TYPESTR,
22};
23
24#endif /* _LASAT_SYSCTL_H */
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile
index 4ee6800e67e6..ed0c07622baa 100644
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -10,6 +10,7 @@ obj-y += pci.o
10obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o 10obj-$(CONFIG_MIPS_BONITO64) += ops-bonito64.o
11obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o 11obj-$(CONFIG_PCI_GT64XXX_PCI0) += ops-gt64xxx_pci0.o
12obj-$(CONFIG_MIPS_MSC) += ops-msc.o 12obj-$(CONFIG_MIPS_MSC) += ops-msc.o
13obj-$(CONFIG_MIPS_NILE4) += ops-nile4.o
13obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o 14obj-$(CONFIG_MIPS_TX3927) += ops-tx3927.o
14obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o 15obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o pci-vr41xx.o
15obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o 16obj-$(CONFIG_NEC_CMBVR4133) += fixup-vr4133.o
@@ -19,6 +20,7 @@ obj-$(CONFIG_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
19# These are still pretty much in the old state, watch, go blind. 20# These are still pretty much in the old state, watch, go blind.
20# 21#
21obj-$(CONFIG_BASLER_EXCITE) += ops-titan.o pci-excite.o fixup-excite.o 22obj-$(CONFIG_BASLER_EXCITE) += ops-titan.o pci-excite.o fixup-excite.o
23obj-$(CONFIG_LASAT) += pci-lasat.o
22obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o 24obj-$(CONFIG_MIPS_ATLAS) += fixup-atlas.o
23obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o 25obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o
24obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o 26obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o
diff --git a/arch/mips/pci/ops-nile4.c b/arch/mips/pci/ops-nile4.c
new file mode 100644
index 000000000000..b7f0fb0210f4
--- /dev/null
+++ b/arch/mips/pci/ops-nile4.c
@@ -0,0 +1,147 @@
1#include <linux/kernel.h>
2#include <linux/init.h>
3#include <linux/pci.h>
4#include <asm/bootinfo.h>
5
6#include <asm/lasat/lasat.h>
7#include <asm/gt64120.h>
8#include <asm/nile4.h>
9
10#define PCI_ACCESS_READ 0
11#define PCI_ACCESS_WRITE 1
12
13#define LO(reg) (reg / 4)
14#define HI(reg) (reg / 4 + 1)
15
16volatile unsigned long *const vrc_pciregs = (void *) Vrc5074_BASE;
17
18static DEFINE_SPINLOCK(nile4_pci_lock);
19
20static int nile4_pcibios_config_access(unsigned char access_type,
21 struct pci_bus *bus, unsigned int devfn, int where, u32 *val)
22{
23 unsigned char busnum = bus->number;
24 u32 adr, mask, err;
25
26 if ((busnum == 0) && (PCI_SLOT(devfn) > 8))
27 /* The addressing scheme chosen leaves room for just
28 * 8 devices on the first busnum (besides the PCI
29 * controller itself) */
30 return PCIBIOS_DEVICE_NOT_FOUND;
31
32 if ((busnum == 0) && (devfn == PCI_DEVFN(0, 0))) {
33 /* Access controller registers directly */
34 if (access_type == PCI_ACCESS_WRITE) {
35 vrc_pciregs[(0x200 + where) >> 2] = *val;
36 } else {
37 *val = vrc_pciregs[(0x200 + where) >> 2];
38 }
39 return PCIBIOS_SUCCESSFUL;
40 }
41
42 /* Temporarily map PCI Window 1 to config space */
43 mask = vrc_pciregs[LO(NILE4_PCIINIT1)];
44 vrc_pciregs[LO(NILE4_PCIINIT1)] = 0x0000001a | (busnum ? 0x200 : 0);
45
46 /* Clear PCI Error register. This also clears the Error Type
47 * bits in the Control register */
48 vrc_pciregs[LO(NILE4_PCIERR)] = 0;
49 vrc_pciregs[HI(NILE4_PCIERR)] = 0;
50
51 /* Setup address */
52 if (busnum == 0)
53 adr =
54 KSEG1ADDR(PCI_WINDOW1) +
55 ((1 << (PCI_SLOT(devfn) + 15)) | (PCI_FUNC(devfn) << 8)
56 | (where & ~3));
57 else
58 adr = KSEG1ADDR(PCI_WINDOW1) | (busnum << 16) | (devfn << 8) |
59 (where & ~3);
60
61 if (access_type == PCI_ACCESS_WRITE)
62 *(u32 *) adr = *val;
63 else
64 *val = *(u32 *) adr;
65
66 /* Check for master or target abort */
67 err = (vrc_pciregs[HI(NILE4_PCICTRL)] >> 5) & 0x7;
68
69 /* Restore PCI Window 1 */
70 vrc_pciregs[LO(NILE4_PCIINIT1)] = mask;
71
72 if (err)
73 return PCIBIOS_DEVICE_NOT_FOUND;
74
75 return PCIBIOS_SUCCESSFUL;
76}
77
78static int nile4_pcibios_read(struct pci_bus *bus, unsigned int devfn,
79 int where, int size, u32 *val)
80{
81 unsigned long flags;
82 u32 data = 0;
83 int err;
84
85 if ((size == 2) && (where & 1))
86 return PCIBIOS_BAD_REGISTER_NUMBER;
87 else if ((size == 4) && (where & 3))
88 return PCIBIOS_BAD_REGISTER_NUMBER;
89
90 spin_lock_irqsave(&nile4_pci_lock, flags);
91 err = nile4_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
92 &data);
93 spin_unlock_irqrestore(&nile4_pci_lock, flags);
94
95 if (err)
96 return err;
97
98 if (size == 1)
99 *val = (data >> ((where & 3) << 3)) & 0xff;
100 else if (size == 2)
101 *val = (data >> ((where & 3) << 3)) & 0xffff;
102 else
103 *val = data;
104
105 return PCIBIOS_SUCCESSFUL;
106}
107
108static int nile4_pcibios_write(struct pci_bus *bus, unsigned int devfn,
109 int where, int size, u32 val)
110{
111 unsigned long flags;
112 u32 data = 0;
113 int err;
114
115 if ((size == 2) && (where & 1))
116 return PCIBIOS_BAD_REGISTER_NUMBER;
117 else if ((size == 4) && (where & 3))
118 return PCIBIOS_BAD_REGISTER_NUMBER;
119
120 spin_lock_irqsave(&nile4_pci_lock, flags);
121 err = nile4_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where,
122 &data);
123 spin_unlock_irqrestore(&nile4_pci_lock, flags);
124
125 if (err)
126 return err;
127
128 if (size == 1)
129 data = (data & ~(0xff << ((where & 3) << 3))) |
130 (val << ((where & 3) << 3));
131 else if (size == 2)
132 data = (data & ~(0xffff << ((where & 3) << 3))) |
133 (val << ((where & 3) << 3));
134 else
135 data = val;
136
137 if (nile4_pcibios_config_access
138 (PCI_ACCESS_WRITE, bus, devfn, where, &data))
139 return -1;
140
141 return PCIBIOS_SUCCESSFUL;
142}
143
144struct pci_ops nile4_pci_ops = {
145 .read = nile4_pcibios_read,
146 .write = nile4_pcibios_write,
147};
diff --git a/arch/mips/pci/pci-lasat.c b/arch/mips/pci/pci-lasat.c
new file mode 100644
index 000000000000..5abd5c7119be
--- /dev/null
+++ b/arch/mips/pci/pci-lasat.c
@@ -0,0 +1,91 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2000, 2001, 04 Keith M Wesolowski
7 */
8#include <linux/kernel.h>
9#include <linux/init.h>
10#include <linux/pci.h>
11#include <linux/types.h>
12#include <asm/bootinfo.h>
13
14extern struct pci_ops nile4_pci_ops;
15extern struct pci_ops gt64xxx_pci0_ops;
16static struct resource lasat_pci_mem_resource = {
17 .name = "LASAT PCI MEM",
18 .start = 0x18000000,
19 .end = 0x19ffffff,
20 .flags = IORESOURCE_MEM,
21};
22
23static struct resource lasat_pci_io_resource = {
24 .name = "LASAT PCI IO",
25 .start = 0x1a000000,
26 .end = 0x1bffffff,
27 .flags = IORESOURCE_IO,
28};
29
30static struct pci_controller lasat_pci_controller = {
31 .mem_resource = &lasat_pci_mem_resource,
32 .io_resource = &lasat_pci_io_resource,
33};
34
35static int __init lasat_pci_setup(void)
36{
37 printk(KERN_DEBUG "PCI: starting\n");
38
39 switch (mips_machtype) {
40 case MACH_LASAT_100:
41 lasat_pci_controller.pci_ops = &gt64xxx_pci0_ops;
42 break;
43 case MACH_LASAT_200:
44 lasat_pci_controller.pci_ops = &nile4_pci_ops;
45 break;
46 default:
47 panic("pcibios_init: mips_machtype incorrect");
48 }
49
50 register_pci_controller(&lasat_pci_controller);
51
52 return 0;
53}
54
55arch_initcall(lasat_pci_setup);
56
57#define LASATINT_ETH1 0
58#define LASATINT_ETH0 1
59#define LASATINT_HDC 2
60#define LASATINT_COMP 3
61#define LASATINT_HDLC 4
62#define LASATINT_PCIA 5
63#define LASATINT_PCIB 6
64#define LASATINT_PCIC 7
65#define LASATINT_PCID 8
66
67int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
68{
69 switch (slot) {
70 case 1:
71 case 2:
72 case 3:
73 return LASATINT_PCIA + (((slot-1) + (pin-1)) % 4);
74 case 4:
75 return LASATINT_ETH1; /* Ethernet 1 (LAN 2) */
76 case 5:
77 return LASATINT_ETH0; /* Ethernet 0 (LAN 1) */
78 case 6:
79 return LASATINT_HDC; /* IDE controller */
80 default:
81 return 0xff; /* Illegal */
82 }
83
84 return -1;
85}
86
87/* Do platform specific device initialization at pci_enable_device() time */
88int pcibios_plat_dev_init(struct pci_dev *dev)
89{
90 return 0;
91}
diff --git a/include/asm-mips/bootinfo.h b/include/asm-mips/bootinfo.h
index c0f052b37b9e..1bb4bf657701 100644
--- a/include/asm-mips/bootinfo.h
+++ b/include/asm-mips/bootinfo.h
@@ -175,6 +175,13 @@
175#define MACH_HP_LASERJET 1 175#define MACH_HP_LASERJET 1
176 176
177/* 177/*
178 * Valid machtype for group LASAT
179 */
180#define MACH_GROUP_LASAT 21
181#define MACH_LASAT_100 0 /* Masquerade II/SP100/SP50/SP25 */
182#define MACH_LASAT_200 1 /* Masquerade PRO/SP200 */
183
184/*
178 * Valid machtype for group TITAN 185 * Valid machtype for group TITAN
179 */ 186 */
180#define MACH_GROUP_TITAN 22 /* PMC-Sierra Titan */ 187#define MACH_GROUP_TITAN 22 /* PMC-Sierra Titan */
diff --git a/include/asm-mips/lasat/ds1603.h b/include/asm-mips/lasat/ds1603.h
new file mode 100644
index 000000000000..edcd7544b358
--- /dev/null
+++ b/include/asm-mips/lasat/ds1603.h
@@ -0,0 +1,18 @@
1#include <asm/addrspace.h>
2
3/* Lasat 100 */
4#define DS1603_REG_100 (KSEG1ADDR(0x1c810000))
5#define DS1603_RST_100 (1 << 2)
6#define DS1603_CLK_100 (1 << 0)
7#define DS1603_DATA_SHIFT_100 1
8#define DS1603_DATA_100 (1 << DS1603_DATA_SHIFT_100)
9
10/* Lasat 200 */
11#define DS1603_REG_200 (KSEG1ADDR(0x11000000))
12#define DS1603_RST_200 (1 << 3)
13#define DS1603_CLK_200 (1 << 4)
14#define DS1603_DATA_200 (1 << 5)
15
16#define DS1603_DATA_REG_200 (DS1603_REG_200 + 0x10000)
17#define DS1603_DATA_READ_SHIFT_200 9
18#define DS1603_DATA_READ_200 (1 << DS1603_DATA_READ_SHIFT_200)
diff --git a/include/asm-mips/lasat/eeprom.h b/include/asm-mips/lasat/eeprom.h
new file mode 100644
index 000000000000..3dac203697fa
--- /dev/null
+++ b/include/asm-mips/lasat/eeprom.h
@@ -0,0 +1,17 @@
1#include <asm/addrspace.h>
2
3/* lasat 100 */
4#define AT93C_REG_100 KSEG1ADDR(0x1c810000)
5#define AT93C_RDATA_REG_100 AT93C_REG_100
6#define AT93C_RDATA_SHIFT_100 4
7#define AT93C_WDATA_SHIFT_100 4
8#define AT93C_CS_M_100 (1 << 5)
9#define AT93C_CLK_M_100 (1 << 3)
10
11/* lasat 200 */
12#define AT93C_REG_200 KSEG1ADDR(0x11000000)
13#define AT93C_RDATA_REG_200 (AT93C_REG_200+0x10000)
14#define AT93C_RDATA_SHIFT_200 8
15#define AT93C_WDATA_SHIFT_200 2
16#define AT93C_CS_M_200 (1 << 0)
17#define AT93C_CLK_M_200 (1 << 1)
diff --git a/include/asm-mips/lasat/head.h b/include/asm-mips/lasat/head.h
new file mode 100644
index 000000000000..f5589f31a197
--- /dev/null
+++ b/include/asm-mips/lasat/head.h
@@ -0,0 +1,22 @@
1/*
2 * Image header stuff
3 */
4#ifndef _HEAD_H
5#define _HEAD_H
6
7#define LASAT_K_MAGIC0_VAL 0xfedeabba
8#define LASAT_K_MAGIC1_VAL 0x00bedead
9
10#ifndef _LANGUAGE_ASSEMBLY
11#include <linux/types.h>
12struct bootloader_header {
13 u32 magic[2];
14 u32 version;
15 u32 image_start;
16 u32 image_size;
17 u32 kernel_start;
18 u32 kernel_entry;
19};
20#endif
21
22#endif /* _HEAD_H */
diff --git a/include/asm-mips/lasat/lasat.h b/include/asm-mips/lasat/lasat.h
new file mode 100644
index 000000000000..ea04d9262edc
--- /dev/null
+++ b/include/asm-mips/lasat/lasat.h
@@ -0,0 +1,256 @@
1/*
2 * lasat.h
3 *
4 * Thomas Horsten <thh@lasat.com>
5 * Copyright (C) 2000 LASAT Networks A/S.
6 *
7 * This program is free software; you can distribute it and/or modify it
8 * under the terms of the GNU General Public License (Version 2) as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
19 *
20 * Configuration for LASAT boards, loads the appropriate include files.
21 */
22#ifndef _LASAT_H
23#define _LASAT_H
24
25#ifndef _LANGUAGE_ASSEMBLY
26
27extern struct lasat_misc {
28 volatile u32 *reset_reg;
29 volatile u32 *flash_wp_reg;
30 u32 flash_wp_bit;
31} *lasat_misc;
32
33enum lasat_mtdparts {
34 LASAT_MTD_BOOTLOADER,
35 LASAT_MTD_SERVICE,
36 LASAT_MTD_NORMAL,
37 LASAT_MTD_CONFIG,
38 LASAT_MTD_FS,
39 LASAT_MTD_LAST
40};
41
42/*
43 * The format of the data record in the EEPROM.
44 * See Documentation/LASAT/eeprom.txt for a detailed description
45 * of the fields in this struct, and the LASAT Hardware Configuration
46 * field specification for a detailed description of the config
47 * field.
48 */
49#include <linux/types.h>
50
51#define LASAT_EEPROM_VERSION 7
52struct lasat_eeprom_struct {
53 unsigned int version;
54 unsigned int cfg[3];
55 unsigned char hwaddr[6];
56 unsigned char print_partno[12];
57 unsigned char term0;
58 unsigned char print_serial[14];
59 unsigned char term1;
60 unsigned char prod_partno[12];
61 unsigned char term2;
62 unsigned char prod_serial[14];
63 unsigned char term3;
64 unsigned char passwd_hash[16];
65 unsigned char pwdnull;
66 unsigned char vendid;
67 unsigned char ts_ref;
68 unsigned char ts_signoff;
69 unsigned char reserved[11];
70 unsigned char debugaccess;
71 unsigned short prid;
72 unsigned int serviceflag;
73 unsigned int ipaddr;
74 unsigned int netmask;
75 unsigned int crc32;
76};
77
78struct lasat_eeprom_struct_pre7 {
79 unsigned int version;
80 unsigned int flags[3];
81 unsigned char hwaddr0[6];
82 unsigned char hwaddr1[6];
83 unsigned char print_partno[9];
84 unsigned char term0;
85 unsigned char print_serial[14];
86 unsigned char term1;
87 unsigned char prod_partno[9];
88 unsigned char term2;
89 unsigned char prod_serial[14];
90 unsigned char term3;
91 unsigned char passwd_hash[24];
92 unsigned char pwdnull;
93 unsigned char vendor;
94 unsigned char ts_ref;
95 unsigned char ts_signoff;
96 unsigned char reserved[6];
97 unsigned int writecount;
98 unsigned int ipaddr;
99 unsigned int netmask;
100 unsigned int crc32;
101};
102
103/* Configuration descriptor encoding - see the doc for details */
104
105#define LASAT_W0_DSCTYPE(v) (((v)) & 0xf)
106#define LASAT_W0_BMID(v) (((v) >> 0x04) & 0xf)
107#define LASAT_W0_CPUTYPE(v) (((v) >> 0x08) & 0xf)
108#define LASAT_W0_BUSSPEED(v) (((v) >> 0x0c) & 0xf)
109#define LASAT_W0_CPUCLK(v) (((v) >> 0x10) & 0xf)
110#define LASAT_W0_SDRAMBANKSZ(v) (((v) >> 0x14) & 0xf)
111#define LASAT_W0_SDRAMBANKS(v) (((v) >> 0x18) & 0xf)
112#define LASAT_W0_L2CACHE(v) (((v) >> 0x1c) & 0xf)
113
114#define LASAT_W1_EDHAC(v) (((v)) & 0xf)
115#define LASAT_W1_HIFN(v) (((v) >> 0x04) & 0x1)
116#define LASAT_W1_ISDN(v) (((v) >> 0x05) & 0x1)
117#define LASAT_W1_IDE(v) (((v) >> 0x06) & 0x1)
118#define LASAT_W1_HDLC(v) (((v) >> 0x07) & 0x1)
119#define LASAT_W1_USVERSION(v) (((v) >> 0x08) & 0x1)
120#define LASAT_W1_4MACS(v) (((v) >> 0x09) & 0x1)
121#define LASAT_W1_EXTSERIAL(v) (((v) >> 0x0a) & 0x1)
122#define LASAT_W1_FLASHSIZE(v) (((v) >> 0x0c) & 0xf)
123#define LASAT_W1_PCISLOTS(v) (((v) >> 0x10) & 0xf)
124#define LASAT_W1_PCI1OPT(v) (((v) >> 0x14) & 0xf)
125#define LASAT_W1_PCI2OPT(v) (((v) >> 0x18) & 0xf)
126#define LASAT_W1_PCI3OPT(v) (((v) >> 0x1c) & 0xf)
127
128/* Routines specific to LASAT boards */
129
130#define LASAT_BMID_MASQUERADE2 0
131#define LASAT_BMID_MASQUERADEPRO 1
132#define LASAT_BMID_SAFEPIPE25 2
133#define LASAT_BMID_SAFEPIPE50 3
134#define LASAT_BMID_SAFEPIPE100 4
135#define LASAT_BMID_SAFEPIPE5000 5
136#define LASAT_BMID_SAFEPIPE7000 6
137#define LASAT_BMID_SAFEPIPE1000 7
138#if 0
139#define LASAT_BMID_SAFEPIPE30 7
140#define LASAT_BMID_SAFEPIPE5100 8
141#define LASAT_BMID_SAFEPIPE7100 9
142#endif
143#define LASAT_BMID_UNKNOWN 0xf
144#define LASAT_MAX_BMID_NAMES 9 /* no larger than 15! */
145
146#define LASAT_HAS_EDHAC (1 << 0)
147#define LASAT_EDHAC_FAST (1 << 1)
148#define LASAT_HAS_EADI (1 << 2)
149#define LASAT_HAS_HIFN (1 << 3)
150#define LASAT_HAS_ISDN (1 << 4)
151#define LASAT_HAS_LEASEDLINE_IF (1 << 5)
152#define LASAT_HAS_HDC (1 << 6)
153
154#define LASAT_PRID_MASQUERADE2 0
155#define LASAT_PRID_MASQUERADEPRO 1
156#define LASAT_PRID_SAFEPIPE25 2
157#define LASAT_PRID_SAFEPIPE50 3
158#define LASAT_PRID_SAFEPIPE100 4
159#define LASAT_PRID_SAFEPIPE5000 5
160#define LASAT_PRID_SAFEPIPE7000 6
161#define LASAT_PRID_SAFEPIPE30 7
162#define LASAT_PRID_SAFEPIPE5100 8
163#define LASAT_PRID_SAFEPIPE7100 9
164
165#define LASAT_PRID_SAFEPIPE1110 10
166#define LASAT_PRID_SAFEPIPE3020 11
167#define LASAT_PRID_SAFEPIPE3030 12
168#define LASAT_PRID_SAFEPIPE5020 13
169#define LASAT_PRID_SAFEPIPE5030 14
170#define LASAT_PRID_SAFEPIPE1120 15
171#define LASAT_PRID_SAFEPIPE1130 16
172#define LASAT_PRID_SAFEPIPE6010 17
173#define LASAT_PRID_SAFEPIPE6110 18
174#define LASAT_PRID_SAFEPIPE6210 19
175#define LASAT_PRID_SAFEPIPE1020 20
176#define LASAT_PRID_SAFEPIPE1040 21
177#define LASAT_PRID_SAFEPIPE1060 22
178
179struct lasat_info {
180 unsigned int li_cpu_hz;
181 unsigned int li_bus_hz;
182 unsigned int li_bmid;
183 unsigned int li_memsize;
184 unsigned int li_flash_size;
185 unsigned int li_prid;
186 unsigned char li_bmstr[16];
187 unsigned char li_namestr[32];
188 unsigned char li_typestr[16];
189 /* Info on the Flash layout */
190 unsigned int li_flash_base;
191 unsigned long li_flashpart_base[LASAT_MTD_LAST];
192 unsigned long li_flashpart_size[LASAT_MTD_LAST];
193 struct lasat_eeprom_struct li_eeprom_info;
194 unsigned int li_eeprom_upgrade_version;
195 unsigned int li_debugaccess;
196};
197
198extern struct lasat_info lasat_board_info;
199
200static inline unsigned long lasat_flash_partition_start(int partno)
201{
202 if (partno < 0 || partno >= LASAT_MTD_LAST)
203 return 0;
204
205 return lasat_board_info.li_flashpart_base[partno];
206}
207
208static inline unsigned long lasat_flash_partition_size(int partno)
209{
210 if (partno < 0 || partno >= LASAT_MTD_LAST)
211 return 0;
212
213 return lasat_board_info.li_flashpart_size[partno];
214}
215
216/* Called from setup() to initialize the global board_info struct */
217extern int lasat_init_board_info(void);
218
219/* Write the modified EEPROM info struct */
220extern void lasat_write_eeprom_info(void);
221
222#define N_MACHTYPES 2
223/* for calibration of delays */
224
225/* the lasat_ndelay function is necessary because it is used at an
226 * early stage of the boot process where ndelay is not calibrated.
227 * It is used for the bit-banging rtc and eeprom drivers */
228
229#include <linux/delay.h>
230
231/* calculating with the slowest board with 100 MHz clock */
232#define LASAT_100_DIVIDER 20
233/* All 200's run at 250 MHz clock */
234#define LASAT_200_DIVIDER 8
235
236extern unsigned int lasat_ndelay_divider;
237
238static inline void lasat_ndelay(unsigned int ns)
239{
240 __delay(ns / lasat_ndelay_divider);
241}
242
243#endif /* !defined (_LANGUAGE_ASSEMBLY) */
244
245#define LASAT_SERVICEMODE_MAGIC_1 0xdeadbeef
246#define LASAT_SERVICEMODE_MAGIC_2 0xfedeabba
247
248/* Lasat 100 boards */
249#define LASAT_GT_BASE (KSEG1ADDR(0x14000000))
250
251/* Lasat 200 boards */
252#define Vrc5074_PHYS_BASE 0x1fa00000
253#define Vrc5074_BASE (KSEG1ADDR(Vrc5074_PHYS_BASE))
254#define PCI_WINDOW1 0x1a000000
255
256#endif /* _LASAT_H */
diff --git a/include/asm-mips/lasat/lasatint.h b/include/asm-mips/lasat/lasatint.h
new file mode 100644
index 000000000000..065474feeccc
--- /dev/null
+++ b/include/asm-mips/lasat/lasatint.h
@@ -0,0 +1,12 @@
1#define LASATINT_END 16
2
3/* lasat 100 */
4#define LASAT_INT_STATUS_REG_100 (KSEG1ADDR(0x1c880000))
5#define LASAT_INT_MASK_REG_100 (KSEG1ADDR(0x1c890000))
6#define LASATINT_MASK_SHIFT_100 0
7
8/* lasat 200 */
9#define LASAT_INT_STATUS_REG_200 (KSEG1ADDR(0x1104003c))
10#define LASAT_INT_MASK_REG_200 (KSEG1ADDR(0x1104003c))
11#define LASATINT_MASK_SHIFT_200 16
12
diff --git a/include/asm-mips/lasat/picvue.h b/include/asm-mips/lasat/picvue.h
new file mode 100644
index 000000000000..42a492edc40e
--- /dev/null
+++ b/include/asm-mips/lasat/picvue.h
@@ -0,0 +1,15 @@
1/* Lasat 100 */
2#define PVC_REG_100 KSEG1ADDR(0x1c820000)
3#define PVC_DATA_SHIFT_100 0
4#define PVC_DATA_M_100 0xFF
5#define PVC_E_100 (1 << 8)
6#define PVC_RW_100 (1 << 9)
7#define PVC_RS_100 (1 << 10)
8
9/* Lasat 200 */
10#define PVC_REG_200 KSEG1ADDR(0x11000000)
11#define PVC_DATA_SHIFT_200 24
12#define PVC_DATA_M_200 (0xFF << PVC_DATA_SHIFT_200)
13#define PVC_E_200 (1 << 16)
14#define PVC_RW_200 (1 << 17)
15#define PVC_RS_200 (1 << 18)
diff --git a/include/asm-mips/lasat/serial.h b/include/asm-mips/lasat/serial.h
new file mode 100644
index 000000000000..bafe68b10614
--- /dev/null
+++ b/include/asm-mips/lasat/serial.h
@@ -0,0 +1,13 @@
1#include <asm/lasat/lasat.h>
2
3/* Lasat 100 boards serial configuration */
4#define LASAT_BASE_BAUD_100 (7372800 / 16)
5#define LASAT_UART_REGS_BASE_100 0x1c8b0000
6#define LASAT_UART_REGS_SHIFT_100 2
7#define LASATINT_UART_100 8
8
9/* * LASAT 200 boards serial configuration */
10#define LASAT_BASE_BAUD_200 (100000000 / 16 / 12)
11#define LASAT_UART_REGS_BASE_200 (Vrc5074_PHYS_BASE + 0x0300)
12#define LASAT_UART_REGS_SHIFT_200 3
13#define LASATINT_UART_200 13
diff --git a/include/asm-mips/mach-lasat/mach-gt64120.h b/include/asm-mips/mach-lasat/mach-gt64120.h
new file mode 100644
index 000000000000..1a9ad45cc135
--- /dev/null
+++ b/include/asm-mips/mach-lasat/mach-gt64120.h
@@ -0,0 +1,27 @@
1/*
2 * This is a direct copy of the ev96100.h file, with a global
3 * search and replace. The numbers are the same.
4 *
5 * The reason I'm duplicating this is so that the 64120/96100
6 * defines won't be confusing in the source code.
7 */
8#ifndef _ASM_GT64120_LASAT_GT64120_DEP_H
9#define _ASM_GT64120_LASAT_GT64120_DEP_H
10
11/*
12 * GT64120 config space base address on Lasat 100
13 */
14#define GT64120_BASE (KSEG1ADDR(0x14000000))
15
16/*
17 * PCI Bus allocation
18 *
19 * (Guessing ...)
20 */
21#define GT_PCI_MEM_BASE 0x12000000UL
22#define GT_PCI_MEM_SIZE 0x02000000UL
23#define GT_PCI_IO_BASE 0x10000000UL
24#define GT_PCI_IO_SIZE 0x02000000UL
25#define GT_ISA_IO_BASE PCI_IO_BASE
26
27#endif /* _ASM_GT64120_LASAT_GT64120_DEP_H */
diff --git a/include/asm-mips/nile4.h b/include/asm-mips/nile4.h
new file mode 100644
index 000000000000..c3ca959aa4d9
--- /dev/null
+++ b/include/asm-mips/nile4.h
@@ -0,0 +1,310 @@
1/*
2 * asm-mips/nile4.h -- NEC Vrc-5074 Nile 4 definitions
3 *
4 * Copyright (C) 2000 Geert Uytterhoeven <geert@sonycom.com>
5 * Sony Software Development Center Europe (SDCE), Brussels
6 *
7 * This file is based on the following documentation:
8 *
9 * NEC Vrc 5074 System Controller Data Sheet, June 1998
10 */
11
12#ifndef _ASM_NILE4_H
13#define _ASM_NILE4_H
14
15#define NILE4_BASE 0xbfa00000
16#define NILE4_SIZE 0x00200000 /* 2 MB */
17
18
19 /*
20 * Physical Device Address Registers (PDARs)
21 */
22
23#define NILE4_SDRAM0 0x0000 /* SDRAM Bank 0 [R/W] */
24#define NILE4_SDRAM1 0x0008 /* SDRAM Bank 1 [R/W] */
25#define NILE4_DCS2 0x0010 /* Device Chip-Select 2 [R/W] */
26#define NILE4_DCS3 0x0018 /* Device Chip-Select 3 [R/W] */
27#define NILE4_DCS4 0x0020 /* Device Chip-Select 4 [R/W] */
28#define NILE4_DCS5 0x0028 /* Device Chip-Select 5 [R/W] */
29#define NILE4_DCS6 0x0030 /* Device Chip-Select 6 [R/W] */
30#define NILE4_DCS7 0x0038 /* Device Chip-Select 7 [R/W] */
31#define NILE4_DCS8 0x0040 /* Device Chip-Select 8 [R/W] */
32#define NILE4_PCIW0 0x0060 /* PCI Address Window 0 [R/W] */
33#define NILE4_PCIW1 0x0068 /* PCI Address Window 1 [R/W] */
34#define NILE4_INTCS 0x0070 /* Controller Internal Registers and Devices */
35 /* [R/W] */
36#define NILE4_BOOTCS 0x0078 /* Boot ROM Chip-Select [R/W] */
37
38
39 /*
40 * CPU Interface Registers
41 */
42
43#define NILE4_CPUSTAT 0x0080 /* CPU Status [R/W] */
44#define NILE4_INTCTRL 0x0088 /* Interrupt Control [R/W] */
45#define NILE4_INTSTAT0 0x0090 /* Interrupt Status 0 [R] */
46#define NILE4_INTSTAT1 0x0098 /* Interrupt Status 1 and CPU Interrupt */
47 /* Enable [R/W] */
48#define NILE4_INTCLR 0x00A0 /* Interrupt Clear [R/W] */
49#define NILE4_INTPPES 0x00A8 /* PCI Interrupt Control [R/W] */
50
51
52 /*
53 * Memory-Interface Registers
54 */
55
56#define NILE4_MEMCTRL 0x00C0 /* Memory Control */
57#define NILE4_ACSTIME 0x00C8 /* Memory Access Timing [R/W] */
58#define NILE4_CHKERR 0x00D0 /* Memory Check Error Status [R] */
59
60
61 /*
62 * PCI-Bus Registers
63 */
64
65#define NILE4_PCICTRL 0x00E0 /* PCI Control [R/W] */
66#define NILE4_PCIARB 0x00E8 /* PCI Arbiter [R/W] */
67#define NILE4_PCIINIT0 0x00F0 /* PCI Master (Initiator) 0 [R/W] */
68#define NILE4_PCIINIT1 0x00F8 /* PCI Master (Initiator) 1 [R/W] */
69#define NILE4_PCIERR 0x00B8 /* PCI Error [R/W] */
70
71
72 /*
73 * Local-Bus Registers
74 */
75
76#define NILE4_LCNFG 0x0100 /* Local Bus Configuration [R/W] */
77#define NILE4_LCST2 0x0110 /* Local Bus Chip-Select Timing 2 [R/W] */
78#define NILE4_LCST3 0x0118 /* Local Bus Chip-Select Timing 3 [R/W] */
79#define NILE4_LCST4 0x0120 /* Local Bus Chip-Select Timing 4 [R/W] */
80#define NILE4_LCST5 0x0128 /* Local Bus Chip-Select Timing 5 [R/W] */
81#define NILE4_LCST6 0x0130 /* Local Bus Chip-Select Timing 6 [R/W] */
82#define NILE4_LCST7 0x0138 /* Local Bus Chip-Select Timing 7 [R/W] */
83#define NILE4_LCST8 0x0140 /* Local Bus Chip-Select Timing 8 [R/W] */
84#define NILE4_DCSFN 0x0150 /* Device Chip-Select Muxing and Output */
85 /* Enables [R/W] */
86#define NILE4_DCSIO 0x0158 /* Device Chip-Selects As I/O Bits [R/W] */
87#define NILE4_BCST 0x0178 /* Local Boot Chip-Select Timing [R/W] */
88
89
90 /*
91 * DMA Registers
92 */
93
94#define NILE4_DMACTRL0 0x0180 /* DMA Control 0 [R/W] */
95#define NILE4_DMASRCA0 0x0188 /* DMA Source Address 0 [R/W] */
96#define NILE4_DMADESA0 0x0190 /* DMA Destination Address 0 [R/W] */
97#define NILE4_DMACTRL1 0x0198 /* DMA Control 1 [R/W] */
98#define NILE4_DMASRCA1 0x01A0 /* DMA Source Address 1 [R/W] */
99#define NILE4_DMADESA1 0x01A8 /* DMA Destination Address 1 [R/W] */
100
101
102 /*
103 * Timer Registers
104 */
105
106#define NILE4_T0CTRL 0x01C0 /* SDRAM Refresh Control [R/W] */
107#define NILE4_T0CNTR 0x01C8 /* SDRAM Refresh Counter [R/W] */
108#define NILE4_T1CTRL 0x01D0 /* CPU-Bus Read Time-Out Control [R/W] */
109#define NILE4_T1CNTR 0x01D8 /* CPU-Bus Read Time-Out Counter [R/W] */
110#define NILE4_T2CTRL 0x01E0 /* General-Purpose Timer Control [R/W] */
111#define NILE4_T2CNTR 0x01E8 /* General-Purpose Timer Counter [R/W] */
112#define NILE4_T3CTRL 0x01F0 /* Watchdog Timer Control [R/W] */
113#define NILE4_T3CNTR 0x01F8 /* Watchdog Timer Counter [R/W] */
114
115
116 /*
117 * PCI Configuration Space Registers
118 */
119
120#define NILE4_PCI_BASE 0x0200
121
122#define NILE4_VID 0x0200 /* PCI Vendor ID [R] */
123#define NILE4_DID 0x0202 /* PCI Device ID [R] */
124#define NILE4_PCICMD 0x0204 /* PCI Command [R/W] */
125#define NILE4_PCISTS 0x0206 /* PCI Status [R/W] */
126#define NILE4_REVID 0x0208 /* PCI Revision ID [R] */
127#define NILE4_CLASS 0x0209 /* PCI Class Code [R] */
128#define NILE4_CLSIZ 0x020C /* PCI Cache Line Size [R/W] */
129#define NILE4_MLTIM 0x020D /* PCI Latency Timer [R/W] */
130#define NILE4_HTYPE 0x020E /* PCI Header Type [R] */
131#define NILE4_BIST 0x020F /* BIST [R] (unimplemented) */
132#define NILE4_BARC 0x0210 /* PCI Base Address Register Control [R/W] */
133#define NILE4_BAR0 0x0218 /* PCI Base Address Register 0 [R/W] */
134#define NILE4_BAR1 0x0220 /* PCI Base Address Register 1 [R/W] */
135#define NILE4_CIS 0x0228 /* PCI Cardbus CIS Pointer [R] */
136 /* (unimplemented) */
137#define NILE4_SSVID 0x022C /* PCI Sub-System Vendor ID [R/W] */
138#define NILE4_SSID 0x022E /* PCI Sub-System ID [R/W] */
139#define NILE4_ROM 0x0230 /* Expansion ROM Base Address [R] */
140 /* (unimplemented) */
141#define NILE4_INTLIN 0x023C /* PCI Interrupt Line [R/W] */
142#define NILE4_INTPIN 0x023D /* PCI Interrupt Pin [R] */
143#define NILE4_MINGNT 0x023E /* PCI Min_Gnt [R] (unimplemented) */
144#define NILE4_MAXLAT 0x023F /* PCI Max_Lat [R] (unimplemented) */
145#define NILE4_BAR2 0x0240 /* PCI Base Address Register 2 [R/W] */
146#define NILE4_BAR3 0x0248 /* PCI Base Address Register 3 [R/W] */
147#define NILE4_BAR4 0x0250 /* PCI Base Address Register 4 [R/W] */
148#define NILE4_BAR5 0x0258 /* PCI Base Address Register 5 [R/W] */
149#define NILE4_BAR6 0x0260 /* PCI Base Address Register 6 [R/W] */
150#define NILE4_BAR7 0x0268 /* PCI Base Address Register 7 [R/W] */
151#define NILE4_BAR8 0x0270 /* PCI Base Address Register 8 [R/W] */
152#define NILE4_BARB 0x0278 /* PCI Base Address Register BOOT [R/W] */
153
154
155 /*
156 * Serial-Port Registers
157 */
158
159#define NILE4_UART_BASE 0x0300
160
161#define NILE4_UARTRBR 0x0300 /* UART Receiver Data Buffer [R] */
162#define NILE4_UARTTHR 0x0300 /* UART Transmitter Data Holding [W] */
163#define NILE4_UARTIER 0x0308 /* UART Interrupt Enable [R/W] */
164#define NILE4_UARTDLL 0x0300 /* UART Divisor Latch LSB [R/W] */
165#define NILE4_UARTDLM 0x0308 /* UART Divisor Latch MSB [R/W] */
166#define NILE4_UARTIIR 0x0310 /* UART Interrupt ID [R] */
167#define NILE4_UARTFCR 0x0310 /* UART FIFO Control [W] */
168#define NILE4_UARTLCR 0x0318 /* UART Line Control [R/W] */
169#define NILE4_UARTMCR 0x0320 /* UART Modem Control [R/W] */
170#define NILE4_UARTLSR 0x0328 /* UART Line Status [R/W] */
171#define NILE4_UARTMSR 0x0330 /* UART Modem Status [R/W] */
172#define NILE4_UARTSCR 0x0338 /* UART Scratch [R/W] */
173
174#define NILE4_UART_BASE_BAUD 520833 /* 100 MHz / 12 / 16 */
175
176
177 /*
178 * Interrupt Lines
179 */
180
181#define NILE4_INT_CPCE 0 /* CPU-Interface Parity-Error Interrupt */
182#define NILE4_INT_CNTD 1 /* CPU No-Target Decode Interrupt */
183#define NILE4_INT_MCE 2 /* Memory-Check Error Interrupt */
184#define NILE4_INT_DMA 3 /* DMA Controller Interrupt */
185#define NILE4_INT_UART 4 /* UART Interrupt */
186#define NILE4_INT_WDOG 5 /* Watchdog Timer Interrupt */
187#define NILE4_INT_GPT 6 /* General-Purpose Timer Interrupt */
188#define NILE4_INT_LBRTD 7 /* Local-Bus Ready Timer Interrupt */
189#define NILE4_INT_INTA 8 /* PCI Interrupt Signal INTA# */
190#define NILE4_INT_INTB 9 /* PCI Interrupt Signal INTB# */
191#define NILE4_INT_INTC 10 /* PCI Interrupt Signal INTC# */
192#define NILE4_INT_INTD 11 /* PCI Interrupt Signal INTD# */
193#define NILE4_INT_INTE 12 /* PCI Interrupt Signal INTE# (ISA cascade) */
194#define NILE4_INT_RESV 13 /* Reserved */
195#define NILE4_INT_PCIS 14 /* PCI SERR# Interrupt */
196#define NILE4_INT_PCIE 15 /* PCI Internal Error Interrupt */
197
198
199 /*
200 * Nile 4 Register Access
201 */
202
203static inline void nile4_sync(void)
204{
205 volatile u32 *p = (volatile u32 *)0xbfc00000;
206 (void)(*p);
207}
208
209static inline void nile4_out32(u32 offset, u32 val)
210{
211 *(volatile u32 *)(NILE4_BASE+offset) = val;
212 nile4_sync();
213}
214
215static inline u32 nile4_in32(u32 offset)
216{
217 u32 val = *(volatile u32 *)(NILE4_BASE+offset);
218 nile4_sync();
219 return val;
220}
221
222static inline void nile4_out16(u32 offset, u16 val)
223{
224 *(volatile u16 *)(NILE4_BASE+offset) = val;
225 nile4_sync();
226}
227
228static inline u16 nile4_in16(u32 offset)
229{
230 u16 val = *(volatile u16 *)(NILE4_BASE+offset);
231 nile4_sync();
232 return val;
233}
234
235static inline void nile4_out8(u32 offset, u8 val)
236{
237 *(volatile u8 *)(NILE4_BASE+offset) = val;
238 nile4_sync();
239}
240
241static inline u8 nile4_in8(u32 offset)
242{
243 u8 val = *(volatile u8 *)(NILE4_BASE+offset);
244 nile4_sync();
245 return val;
246}
247
248
249 /*
250 * Physical Device Address Registers
251 */
252
253extern void nile4_set_pdar(u32 pdar, u32 phys, u32 size, int width,
254 int on_memory_bus, int visible);
255
256
257 /*
258 * PCI Master Registers
259 */
260
261#define NILE4_PCICMD_IACK 0 /* PCI Interrupt Acknowledge */
262#define NILE4_PCICMD_IO 1 /* PCI I/O Space */
263#define NILE4_PCICMD_MEM 3 /* PCI Memory Space */
264#define NILE4_PCICMD_CFG 5 /* PCI Configuration Space */
265
266
267 /*
268 * PCI Address Spaces
269 *
270 * Note that these are multiplexed using PCIINIT[01]!
271 */
272
273#define NILE4_PCI_IO_BASE 0xa6000000
274#define NILE4_PCI_MEM_BASE 0xa8000000
275#define NILE4_PCI_CFG_BASE NILE4_PCI_MEM_BASE
276#define NILE4_PCI_IACK_BASE NILE4_PCI_IO_BASE
277
278
279extern void nile4_set_pmr(u32 pmr, u32 type, u32 addr);
280
281
282 /*
283 * Interrupt Programming
284 */
285
286#define NUM_I8259_INTERRUPTS 16
287#define NUM_NILE4_INTERRUPTS 16
288
289#define IRQ_I8259_CASCADE NILE4_INT_INTE
290#define is_i8259_irq(irq) ((irq) < NUM_I8259_INTERRUPTS)
291#define nile4_to_irq(n) ((n)+NUM_I8259_INTERRUPTS)
292#define irq_to_nile4(n) ((n)-NUM_I8259_INTERRUPTS)
293
294extern void nile4_map_irq(int nile4_irq, int cpu_irq);
295extern void nile4_map_irq_all(int cpu_irq);
296extern void nile4_enable_irq(unsigned int nile4_irq);
297extern void nile4_disable_irq(unsigned int nile4_irq);
298extern void nile4_disable_irq_all(void);
299extern u16 nile4_get_irq_stat(int cpu_irq);
300extern void nile4_enable_irq_output(int cpu_irq);
301extern void nile4_disable_irq_output(int cpu_irq);
302extern void nile4_set_pci_irq_polarity(int pci_irq, int high);
303extern void nile4_set_pci_irq_level_or_edge(int pci_irq, int level);
304extern void nile4_clear_irq(int nile4_irq);
305extern void nile4_clear_irq_mask(u32 mask);
306extern u8 nile4_i8259_iack(void);
307extern void nile4_dump_irq_status(void); /* Debug */
308
309#endif
310
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