Merge branch 'next/devel-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc2

From Kukjin Kim:

This includes supporting legacy i2c controller and ARM down clock
support for exynos5 and small changes.

[olof: It contains a dependency on samsung/hdmi for HDMI DT bindings, for some reason.]

* 'next/devel-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
  ARM: EXYNOS: Clock settings for SATA and SATA PHY
  ARM: EXYNOS: Add ARM down clock support
  ARM: EXYNOS: Fix i2c suspend/resume for legacy controller
  ARM: EXYNOS: Add aliases for i2c controller
  ARM: EXYNOS: Setup legacy i2c controller interrupts
  ARM: EXYNOS: removing exynos-drm device registration from non-dt platforms
  ARM: EXYNOS: add clocks for exynos5 hdmi
  ARM: dts: add device tree support for exynos5 hdmiddc
  ARM: dts: add device tree support for exynos5 hdmiphy
  ARM: dts: add device tree support for exynos5 mixer
  ARM: dts: add device tree support for exynos5 hdmi
  ARM: EXYNOS: Add dp clock support for EXYNOS5
  ARM: SAMSUNG: call clk_get_rate for debugfs rate files
  ARM: SAMSUNG: add clock_tree debugfs file in clock

Signed-off-by: Olof Johansson <olof@lixom.net>

21 files changed, 329 insertions, 63 deletions

diff --git a/Documentation/devicetree/bindings/drm/exynos/hdmi.txt b/Documentation/devicetree/bindings/drm/exynos/hdmi.txt
new file mode 100644
index 000000000000..589edee37394
--- /dev/null
+++ b/Documentation/devicetree/bindings/drm/exynos/hdmi.txt
@@ -0,0 +1,22 @@
+Device-Tree bindings for drm hdmi driver
+
+Required properties:
+- compatible: value should be "samsung,exynos5-hdmi".
+- reg: physical base address of the hdmi and length of memory mapped
+        region.
+- interrupts: interrupt number to the cpu.
+- hpd-gpio: following information about the hotplug gpio pin.
+        a) phandle of the gpio controller node.
+        b) pin number within the gpio controller.
+        c) pin function mode.
+        d) optional flags and pull up/down.
+        e) drive strength.
+
+Example:
+
+        hdmi {
+                compatible = "samsung,exynos5-hdmi";
+                reg = <0x14530000 0x100000>;
+                interrupts = <0 95 0>;
+                hpd-gpio = <&gpx3 7 0xf 1 3>;
+        };
diff --git a/Documentation/devicetree/bindings/drm/exynos/hdmiddc.txt b/Documentation/devicetree/bindings/drm/exynos/hdmiddc.txt
new file mode 100644
index 000000000000..fa166d945809
--- /dev/null
+++ b/Documentation/devicetree/bindings/drm/exynos/hdmiddc.txt
@@ -0,0 +1,12 @@
+Device-Tree bindings for hdmiddc driver
+
+Required properties:
+- compatible: value should be "samsung,exynos5-hdmiddc".
+- reg: I2C address of the hdmiddc device.
+
+Example:
+
+        hdmiddc {
+                compatible = "samsung,exynos5-hdmiddc";
+                reg = <0x50>;
+        };
diff --git a/Documentation/devicetree/bindings/drm/exynos/hdmiphy.txt b/Documentation/devicetree/bindings/drm/exynos/hdmiphy.txt
new file mode 100644
index 000000000000..858f4f9b902f
--- /dev/null
+++ b/Documentation/devicetree/bindings/drm/exynos/hdmiphy.txt
@@ -0,0 +1,12 @@
+Device-Tree bindings for hdmiphy driver
+
+Required properties:
+- compatible: value should be "samsung,exynos5-hdmiphy".
+- reg: I2C address of the hdmiphy device.
+
+Example:
+
+        hdmiphy {
+                compatible = "samsung,exynos5-hdmiphy";
+                reg = <0x38>;
+        };
diff --git a/Documentation/devicetree/bindings/drm/exynos/mixer.txt b/Documentation/devicetree/bindings/drm/exynos/mixer.txt
new file mode 100644
index 000000000000..9b2ea0343566
--- /dev/null
+++ b/Documentation/devicetree/bindings/drm/exynos/mixer.txt
@@ -0,0 +1,15 @@
+Device-Tree bindings for mixer driver
+
+Required properties:
+- compatible: value should be "samsung,exynos5-mixer".
+- reg: physical base address of the mixer and length of memory mapped
+        region.
+- interrupts: interrupt number to the cpu.
+
+Example:
+
+        mixer {
+                compatible = "samsung,exynos5-mixer";
+                reg = <0x14450000 0x10000>;
+                interrupts = <0 94 0>;
+        };
diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index a352df403b7a..7212d538086d 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -56,7 +56,15 @@
         };
 
         i2c@12C80000 {
-                status = "disabled";
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <66000>;
+                gpios = <&gpa0 6 3 3 0>,
+                        <&gpa0 7 3 3 0>;
+
+                hdmiddc@50 {
+                        compatible = "samsung,exynos5-hdmiddc";
+                        reg = <0x50>;
+                };
         };
 
         i2c@12C90000 {
@@ -79,6 +87,16 @@
                 status = "disabled";
         };
 
+        i2c@12CE0000 {
+                samsung,i2c-sda-delay = <100>;
+                samsung,i2c-max-bus-freq = <66000>;
+
+                hdmiphy@38 {
+                        compatible = "samsung,exynos5-hdmiphy";
+                        reg = <0x38>;
+                };
+        };
+
         dwmmc_0: dwmmc0@12200000 {
                 num-slots = <1>;
                 supports-highspeed;
@@ -166,4 +184,8 @@
         spi_2: spi@12d40000 {
                 status = "disabled";
         };
+
+        hdmi {
+                hpd-gpio = <&gpx3 7 0xf 1 3>;
+        };
 };
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index dddfd6e444dc..04d93ecd1484 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -31,6 +31,15 @@
                 gsc1 = &gsc_1;
                 gsc2 = &gsc_2;
                 gsc3 = &gsc_3;
+                i2c0 = &i2c_0;
+                i2c1 = &i2c_1;
+                i2c2 = &i2c_2;
+                i2c3 = &i2c_3;
+                i2c4 = &i2c_4;
+                i2c5 = &i2c_5;
+                i2c6 = &i2c_6;
+                i2c7 = &i2c_7;
+                i2c8 = &i2c_8;
         };
 
         gic:interrupt-controller@10481000 {
@@ -92,7 +101,7 @@
                 interrupts = <0 54 0>;
         };
 
-        i2c@12C60000 {
+        i2c_0: i2c@12C60000 {
                 compatible = "samsung,s3c2440-i2c";
                 reg = <0x12C60000 0x100>;
                 interrupts = <0 56 0>;
@@ -100,7 +109,7 @@
                 #size-cells = <0>;
         };
 
-        i2c@12C70000 {
+        i2c_1: i2c@12C70000 {
                 compatible = "samsung,s3c2440-i2c";
                 reg = <0x12C70000 0x100>;
                 interrupts = <0 57 0>;
@@ -108,7 +117,7 @@
                 #size-cells = <0>;
         };
 
-        i2c@12C80000 {
+        i2c_2: i2c@12C80000 {
                 compatible = "samsung,s3c2440-i2c";
                 reg = <0x12C80000 0x100>;
                 interrupts = <0 58 0>;
@@ -116,7 +125,7 @@
                 #size-cells = <0>;
         };
 
-        i2c@12C90000 {
+        i2c_3: i2c@12C90000 {
                 compatible = "samsung,s3c2440-i2c";
                 reg = <0x12C90000 0x100>;
                 interrupts = <0 59 0>;
@@ -124,7 +133,7 @@
                 #size-cells = <0>;
         };
 
-        i2c@12CA0000 {
+        i2c_4: i2c@12CA0000 {
                 compatible = "samsung,s3c2440-i2c";
                 reg = <0x12CA0000 0x100>;
                 interrupts = <0 60 0>;
@@ -132,7 +141,7 @@
                 #size-cells = <0>;
         };
 
-        i2c@12CB0000 {
+        i2c_5: i2c@12CB0000 {
                 compatible = "samsung,s3c2440-i2c";
                 reg = <0x12CB0000 0x100>;
                 interrupts = <0 61 0>;
@@ -140,7 +149,7 @@
                 #size-cells = <0>;
         };
 
-        i2c@12CC0000 {
+        i2c_6: i2c@12CC0000 {
                 compatible = "samsung,s3c2440-i2c";
                 reg = <0x12CC0000 0x100>;
                 interrupts = <0 62 0>;
@@ -148,7 +157,7 @@
                 #size-cells = <0>;
         };
 
-        i2c@12CD0000 {
+        i2c_7: i2c@12CD0000 {
                 compatible = "samsung,s3c2440-i2c";
                 reg = <0x12CD0000 0x100>;
                 interrupts = <0 63 0>;
@@ -156,6 +165,14 @@
                 #size-cells = <0>;
         };
 
+        i2c_8: i2c@12CE0000 {
+                compatible = "samsung,s3c2440-hdmiphy-i2c";
+                reg = <0x12CE0000 0x1000>;
+                interrupts = <0 64 0>;
+                #address-cells = <1>;
+                #size-cells = <0>;
+        };
+
         spi_0: spi@12d20000 {
                 compatible = "samsung,exynos4210-spi";
                 reg = <0x12d20000 0x100>;
@@ -520,4 +537,16 @@
                 reg = <0x13e30000 0x1000>;
                 interrupts = <0 88 0>;
         };
+
+        hdmi {
+                compatible = "samsung,exynos5-hdmi";
+                reg = <0x14530000 0x100000>;
+                interrupts = <0 95 0>;
+        };
+
+        mixer {
+                compatible = "samsung,exynos5-mixer";
+                reg = <0x14450000 0x10000>;
+                interrupts = <0 94 0>;
+        };
 };
diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile
index 9b58024f7d43..1797dee88a0d 100644
--- a/arch/arm/mach-exynos/Makefile
+++ b/arch/arm/mach-exynos/Makefile
@@ -53,7 +53,6 @@ obj-$(CONFIG_EXYNOS4_DEV_AHCI)		+= dev-ahci.o
 obj-$(CONFIG_EXYNOS4_DEV_DWMCI)         += dev-dwmci.o
 obj-$(CONFIG_EXYNOS_DEV_DMA)            += dma.o
 obj-$(CONFIG_EXYNOS4_DEV_USB_OHCI)      += dev-ohci.o
-obj-$(CONFIG_EXYNOS_DEV_DRM)            += dev-drm.o
 obj-$(CONFIG_EXYNOS_DEV_SYSMMU)         += dev-sysmmu.o
 
 obj-$(CONFIG_ARCH_EXYNOS)               += setup-i2c0.o
diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index c44ca1ee1b8d..0d0c93f6595c 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -80,6 +80,8 @@ static struct sleep_save exynos5_clock_save[] = {
         SAVE_ITEM(EXYNOS5_VPLL_CON0),
         SAVE_ITEM(EXYNOS5_VPLL_CON1),
         SAVE_ITEM(EXYNOS5_VPLL_CON2),
+        SAVE_ITEM(EXYNOS5_PWR_CTRL1),
+        SAVE_ITEM(EXYNOS5_PWR_CTRL2),
 };
 #endif
 
@@ -196,6 +198,11 @@ static int exynos5_clk_ip_isp1_ctrl(struct clk *clk, int enable)
         return s5p_gatectrl(EXYNOS5_CLKGATE_IP_ISP1, clk, enable);
 }
 
+static int exynos5_clk_hdmiphy_ctrl(struct clk *clk, int enable)
+{
+        return s5p_gatectrl(S5P_HDMI_PHY_CONTROL, clk, enable);
+}
+
 /* Core list of CMU_CPU side */
 
 static struct clksrc_clk exynos5_clk_mout_apll = {
@@ -651,15 +658,20 @@ static struct clk exynos5_init_clocks_off[] = {
                 .ctrlbit        = (1 << 15),
         }, {
                 .name           = "sata",
-                .devname        = "ahci",
+                .devname        = "exynos5-sata",
+                .parent         = &exynos5_clk_aclk_200.clk,
                 .enable         = exynos5_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 6),
         }, {
-                .name           = "sata_phy",
+                .name           = "sata-phy",
+                .devname        = "exynos5-sata-phy",
+                .parent         = &exynos5_clk_aclk_200.clk,
                 .enable         = exynos5_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 24),
         }, {
-                .name           = "sata_phy_i2c",
+                .name           = "i2c",
+                .devname        = "exynos5-sata-phy-i2c",
+                .parent         = &exynos5_clk_aclk_200.clk,
                 .enable         = exynos5_clk_ip_fsys_ctrl,
                 .ctrlbit        = (1 << 25),
         }, {
@@ -669,15 +681,25 @@ static struct clk exynos5_init_clocks_off[] = {
                 .ctrlbit        = (1 << 0),
         }, {
                 .name           = "hdmi",
-                .devname        = "exynos4-hdmi",
+                .devname        = "exynos5-hdmi",
                 .enable         = exynos5_clk_ip_disp1_ctrl,
                 .ctrlbit        = (1 << 6),
         }, {
+                .name           = "hdmiphy",
+                .devname        = "exynos5-hdmi",
+                .enable         = exynos5_clk_hdmiphy_ctrl,
+                .ctrlbit        = (1 << 0),
+        }, {
                 .name           = "mixer",
-                .devname        = "s5p-mixer",
+                .devname        = "exynos5-mixer",
                 .enable         = exynos5_clk_ip_disp1_ctrl,
                 .ctrlbit        = (1 << 5),
         }, {
+                .name           = "dp",
+                .devname        = "exynos-dp",
+                .enable         = exynos5_clk_ip_disp1_ctrl,
+                .ctrlbit        = (1 << 4),
+        }, {
                 .name           = "jpeg",
                 .enable         = exynos5_clk_ip_gen_ctrl,
                 .ctrlbit        = (1 << 2),
@@ -1226,6 +1248,16 @@ static struct clksrc_clk exynos5_clksrcs[] = {
                 .reg_div = { .reg = EXYNOS5_CLKDIV_TOP0, .shift = 24, .size = 3 },
         }, {
                 .clk    = {
+                        .name           = "sclk_sata",
+                        .devname        = "exynos5-sata",
+                        .enable         = exynos5_clksrc_mask_fsys_ctrl,
+                        .ctrlbit        = (1 << 24),
+                },
+                .sources = &exynos5_clkset_aclk,
+                .reg_src = { .reg = EXYNOS5_CLKSRC_FSYS, .shift = 24, .size = 1 },
+                .reg_div = { .reg = EXYNOS5_CLKDIV_FSYS0, .shift = 20, .size = 4 },
+        }, {
+                .clk    = {
                         .name           = "sclk_gscl_wrap",
                         .devname        = "s5p-mipi-csis.0",
                         .enable         = exynos5_clksrc_mask_gscl_ctrl,
diff --git a/arch/arm/mach-exynos/cpuidle.c b/arch/arm/mach-exynos/cpuidle.c
index cff0595d0d35..4ddda9122ecc 100644
--- a/arch/arm/mach-exynos/cpuidle.c
+++ b/arch/arm/mach-exynos/cpuidle.c
@@ -21,6 +21,7 @@
 #include <asm/suspend.h>
 #include <asm/unified.h>
 #include <asm/cpuidle.h>
+#include <mach/regs-clock.h>
 #include <mach/regs-pmu.h>
 #include <mach/pmu.h>
 
@@ -156,12 +157,47 @@ static int exynos4_enter_lowpower(struct cpuidle_device *dev,
                 return exynos4_enter_core0_aftr(dev, drv, new_index);
 }
 
+static void __init exynos5_core_down_clk(void)
+{
+        unsigned int tmp;
+
+        /*
+         * Enable arm clock down (in idle) and set arm divider
+         * ratios in WFI/WFE state.
+         */
+        tmp = PWR_CTRL1_CORE2_DOWN_RATIO | \
+              PWR_CTRL1_CORE1_DOWN_RATIO | \
+              PWR_CTRL1_DIV2_DOWN_EN     | \
+              PWR_CTRL1_DIV1_DOWN_EN     | \
+              PWR_CTRL1_USE_CORE1_WFE    | \
+              PWR_CTRL1_USE_CORE0_WFE    | \
+              PWR_CTRL1_USE_CORE1_WFI    | \
+              PWR_CTRL1_USE_CORE0_WFI;
+        __raw_writel(tmp, EXYNOS5_PWR_CTRL1);
+
+        /*
+         * Enable arm clock up (on exiting idle). Set arm divider
+         * ratios when not in idle along with the standby duration
+         * ratios.
+         */
+        tmp = PWR_CTRL2_DIV2_UP_EN       | \
+              PWR_CTRL2_DIV1_UP_EN       | \
+              PWR_CTRL2_DUR_STANDBY2_VAL | \
+              PWR_CTRL2_DUR_STANDBY1_VAL | \
+              PWR_CTRL2_CORE2_UP_RATIO   | \
+              PWR_CTRL2_CORE1_UP_RATIO;
+        __raw_writel(tmp, EXYNOS5_PWR_CTRL2);
+}
+
 static int __init exynos4_init_cpuidle(void)
 {
         int i, max_cpuidle_state, cpu_id;
         struct cpuidle_device *device;
         struct cpuidle_driver *drv = &exynos4_idle_driver;
 
+        if (soc_is_exynos5250())
+                exynos5_core_down_clk();
+
         /* Setup cpuidle driver */
         drv->state_count = (sizeof(exynos4_cpuidle_set) /
                                        sizeof(struct cpuidle_state));
diff --git a/arch/arm/mach-exynos/dev-drm.c b/arch/arm/mach-exynos/dev-drm.c
deleted file mode 100644
index 17c9c6ecc2e0..000000000000
--- a/arch/arm/mach-exynos/dev-drm.c
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * linux/arch/arm/mach-exynos/dev-drm.c
- *
- * Copyright (c) 2012 Samsung Electronics Co., Ltd.
- *              http://www.samsung.com
- *
- * EXYNOS - core DRM device
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#include <linux/kernel.h>
-#include <linux/dma-mapping.h>
-#include <linux/platform_device.h>
-
-#include <plat/devs.h>
-
-static u64 exynos_drm_dma_mask = DMA_BIT_MASK(32);
-
-struct platform_device exynos_device_drm = {
-        .name   = "exynos-drm",
-        .dev    = {
-                .dma_mask               = &exynos_drm_dma_mask,
-                .coherent_dma_mask      = DMA_BIT_MASK(32),
-        }
-};
diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h
index 8c9b38c9c504..d36ad76ad6a4 100644
--- a/arch/arm/mach-exynos/include/mach/regs-clock.h
+++ b/arch/arm/mach-exynos/include/mach/regs-clock.h
@@ -267,6 +267,9 @@
 #define EXYNOS5_CLKDIV_STATCPU0                 EXYNOS_CLKREG(0x00600)
 #define EXYNOS5_CLKDIV_STATCPU1                 EXYNOS_CLKREG(0x00604)
 
+#define EXYNOS5_PWR_CTRL1                       EXYNOS_CLKREG(0x01020)
+#define EXYNOS5_PWR_CTRL2                       EXYNOS_CLKREG(0x01024)
+
 #define EXYNOS5_MPLL_CON0                       EXYNOS_CLKREG(0x04100)
 #define EXYNOS5_CLKSRC_CORE1                    EXYNOS_CLKREG(0x04204)
 
@@ -344,6 +347,22 @@
 
 #define EXYNOS5_EPLLCON0_LOCKED_SHIFT           (29)
 
+#define PWR_CTRL1_CORE2_DOWN_RATIO              (7 << 28)
+#define PWR_CTRL1_CORE1_DOWN_RATIO              (7 << 16)
+#define PWR_CTRL1_DIV2_DOWN_EN                  (1 << 9)
+#define PWR_CTRL1_DIV1_DOWN_EN                  (1 << 8)
+#define PWR_CTRL1_USE_CORE1_WFE                 (1 << 5)
+#define PWR_CTRL1_USE_CORE0_WFE                 (1 << 4)
+#define PWR_CTRL1_USE_CORE1_WFI                 (1 << 1)
+#define PWR_CTRL1_USE_CORE0_WFI                 (1 << 0)
+
+#define PWR_CTRL2_DIV2_UP_EN                    (1 << 25)
+#define PWR_CTRL2_DIV1_UP_EN                    (1 << 24)
+#define PWR_CTRL2_DUR_STANDBY2_VAL              (1 << 16)
+#define PWR_CTRL2_DUR_STANDBY1_VAL              (1 << 8)
+#define PWR_CTRL2_CORE2_UP_RATIO                (1 << 4)
+#define PWR_CTRL2_CORE1_UP_RATIO                (1 << 0)
+
 /* Compatibility defines and inclusion */
 
 #include <mach/regs-pmu.h>
diff --git a/arch/arm/mach-exynos/include/mach/regs-pmu.h b/arch/arm/mach-exynos/include/mach/regs-pmu.h
index d4e392b811a3..684625ad3f39 100644
--- a/arch/arm/mach-exynos/include/mach/regs-pmu.h
+++ b/arch/arm/mach-exynos/include/mach/regs-pmu.h
@@ -15,6 +15,7 @@
 #include <mach/map.h>
 
 #define S5P_PMUREG(x)                           (S5P_VA_PMU + (x))
+#define S5P_SYSREG(x)                           (S3C_VA_SYS + (x))
 
 #define S5P_CENTRAL_SEQ_CONFIGURATION           S5P_PMUREG(0x0200)
 
@@ -230,6 +231,7 @@
 
 /* For EXYNOS5 */
 
+#define EXYNOS5_SYS_I2C_CFG                                     S5P_SYSREG(0x0234)
 #define EXYNOS5_USB_CFG                                         S5P_PMUREG(0x0230)
 
 #define EXYNOS5_AUTO_WDTRESET_DISABLE                           S5P_PMUREG(0x0408)
diff --git a/arch/arm/mach-exynos/mach-exynos5-dt.c b/arch/arm/mach-exynos/mach-exynos5-dt.c
index db1cd8eacf28..f906f599a141 100644
--- a/arch/arm/mach-exynos/mach-exynos5-dt.c
+++ b/arch/arm/mach-exynos/mach-exynos5-dt.c
@@ -11,10 +11,12 @@
 
 #include <linux/of_platform.h>
 #include <linux/serial_core.h>
+#include <linux/io.h>
 
 #include <asm/mach/arch.h>
 #include <asm/hardware/gic.h>
 #include <mach/map.h>
+#include <mach/regs-pmu.h>
 
 #include <plat/cpu.h>
 #include <plat/regs-serial.h>
@@ -47,6 +49,10 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
                                 "s3c2440-i2c.0", NULL),
         OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(1),
                                 "s3c2440-i2c.1", NULL),
+        OF_DEV_AUXDATA("samsung,s3c2440-i2c", EXYNOS5_PA_IIC(2),
+                                "s3c2440-i2c.2", NULL),
+        OF_DEV_AUXDATA("samsung,s3c2440-hdmiphy-i2c", EXYNOS5_PA_IIC(8),
+                                "s3c2440-hdmiphy-i2c", NULL),
         OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI0,
                                 "dw_mmc.0", NULL),
         OF_DEV_AUXDATA("samsung,exynos5250-dw-mshc", EXYNOS5_PA_DWMCI1,
@@ -72,6 +78,10 @@ static const struct of_dev_auxdata exynos5250_auxdata_lookup[] __initconst = {
                                 "exynos-gsc.2", NULL),
         OF_DEV_AUXDATA("samsung,exynos5-gsc", EXYNOS5_PA_GSC3,
                                 "exynos-gsc.3", NULL),
+        OF_DEV_AUXDATA("samsung,exynos5-hdmi", 0x14530000,
+                                "exynos5-hdmi", NULL),
+        OF_DEV_AUXDATA("samsung,exynos5-mixer", 0x14450000,
+                                "exynos5-mixer", NULL),
         {},
 };
 
@@ -83,6 +93,28 @@ static void __init exynos5250_dt_map_io(void)
 
 static void __init exynos5250_dt_machine_init(void)
 {
+        struct device_node *i2c_np;
+        const char *i2c_compat = "samsung,s3c2440-i2c";
+        unsigned int tmp;
+
+        /*
+         * Exynos5's legacy i2c controller and new high speed i2c
+         * controller have muxed interrupt sources. By default the
+         * interrupts for 4-channel HS-I2C controller are enabled.
+         * If node for first four channels of legacy i2c controller
+         * are available then re-configure the interrupts via the
+         * system register.
+         */
+        for_each_compatible_node(i2c_np, NULL, i2c_compat) {
+                if (of_device_is_available(i2c_np)) {
+                        if (of_alias_get_id(i2c_np, "i2c") < 4) {
+                                tmp = readl(EXYNOS5_SYS_I2C_CFG);
+                                writel(tmp & ~(0x1 << of_alias_get_id(i2c_np, "i2c")),
+                                                EXYNOS5_SYS_I2C_CFG);
+                        }
+                }
+        }
+
         of_platform_populate(NULL, of_default_bus_match_table,
                                 exynos5250_auxdata_lookup, NULL);
 }
diff --git a/arch/arm/mach-exynos/mach-nuri.c b/arch/arm/mach-exynos/mach-nuri.c
index c05d7aa84031..94970602df61 100644
--- a/arch/arm/mach-exynos/mach-nuri.c
+++ b/arch/arm/mach-exynos/mach-nuri.c
@@ -1327,9 +1327,6 @@ static struct platform_device *nuri_devices[] __initdata = {
         &cam_vdda_fixed_rdev,
         &cam_8m_12v_fixed_rdev,
         &exynos4_bus_devfreq,
-#ifdef CONFIG_DRM_EXYNOS
-        &exynos_device_drm,
-#endif
 };
 
 static void __init nuri_map_io(void)
diff --git a/arch/arm/mach-exynos/mach-origen.c b/arch/arm/mach-exynos/mach-origen.c
index 9adf491674ea..d8dc6d7f0c00 100644
--- a/arch/arm/mach-exynos/mach-origen.c
+++ b/arch/arm/mach-exynos/mach-origen.c
@@ -709,9 +709,6 @@ static struct platform_device *origen_devices[] __initdata = {
         &s5p_device_mfc_l,
         &s5p_device_mfc_r,
         &s5p_device_mixer,
-#ifdef CONFIG_DRM_EXYNOS
-        &exynos_device_drm,
-#endif
         &exynos4_device_ohci,
         &origen_device_gpiokeys,
         &origen_lcd_hv070wsa,
diff --git a/arch/arm/mach-exynos/mach-smdk4x12.c b/arch/arm/mach-exynos/mach-smdk4x12.c
index 730f1ac65928..17b9ca48722e 100644
--- a/arch/arm/mach-exynos/mach-smdk4x12.c
+++ b/arch/arm/mach-exynos/mach-smdk4x12.c
@@ -317,9 +317,6 @@ static struct platform_device *smdk4x12_devices[] __initdata = {
         &s5p_device_mfc,
         &s5p_device_mfc_l,
         &s5p_device_mfc_r,
-#ifdef CONFIG_DRM_EXYNOS
-        &exynos_device_drm,
-#endif
         &samsung_device_keypad,
 };
 
diff --git a/arch/arm/mach-exynos/mach-smdkv310.c b/arch/arm/mach-exynos/mach-smdkv310.c
index ee4fb1a9cb72..4f0ac5397ba3 100644
--- a/arch/arm/mach-exynos/mach-smdkv310.c
+++ b/arch/arm/mach-exynos/mach-smdkv310.c
@@ -300,9 +300,6 @@ static struct platform_device *smdkv310_devices[] __initdata = {
         &s5p_device_fimc_md,
         &s5p_device_g2d,
         &s5p_device_jpeg,
-#ifdef CONFIG_DRM_EXYNOS
-        &exynos_device_drm,
-#endif
         &exynos4_device_ac97,
         &exynos4_device_i2s0,
         &exynos4_device_ohci,
diff --git a/arch/arm/mach-exynos/mach-universal_c210.c b/arch/arm/mach-exynos/mach-universal_c210.c
index ebc9dd339a38..cfdf876a8626 100644
--- a/arch/arm/mach-exynos/mach-universal_c210.c
+++ b/arch/arm/mach-exynos/mach-universal_c210.c
@@ -1081,9 +1081,6 @@ static struct platform_device *universal_devices[] __initdata = {
         &s5p_device_onenand,
         &s5p_device_fimd0,
         &s5p_device_jpeg,
-#ifdef CONFIG_DRM_EXYNOS
-        &exynos_device_drm,
-#endif
         &s3c_device_usb_hsotg,
         &s5p_device_mfc,
         &s5p_device_mfc_l,
diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c
index c06c992943a1..8306c5276d1c 100644
--- a/arch/arm/mach-exynos/pm.c
+++ b/arch/arm/mach-exynos/pm.c
@@ -62,6 +62,10 @@ static struct sleep_save exynos4_vpll_save[] = {
         SAVE_ITEM(EXYNOS4_VPLL_CON1),
 };
 
+static struct sleep_save exynos5_sys_save[] = {
+        SAVE_ITEM(EXYNOS5_SYS_I2C_CFG),
+};
+
 static struct sleep_save exynos_core_save[] = {
         /* SROM side */
         SAVE_ITEM(S5P_SROM_BW),
@@ -98,6 +102,7 @@ static void exynos_pm_prepare(void)
                 s3c_pm_do_save(exynos4_epll_save, ARRAY_SIZE(exynos4_epll_save));
                 s3c_pm_do_save(exynos4_vpll_save, ARRAY_SIZE(exynos4_vpll_save));
         } else {
+                s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save));
                 /* Disable USE_RETENTION of JPEG_MEM_OPTION */
                 tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION);
                 tmp &= ~EXYNOS5_OPTION_USE_RETENTION;
@@ -301,6 +306,10 @@ static void exynos_pm_resume(void)
         __raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION);
         __raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION);
 
+        if (soc_is_exynos5250())
+                s3c_pm_do_restore(exynos5_sys_save,
+                        ARRAY_SIZE(exynos5_sys_save));
+
         s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save));
 
         if (!soc_is_exynos5250()) {
diff --git a/arch/arm/plat-samsung/clock.c b/arch/arm/plat-samsung/clock.c
index 012bbd0b8d81..47c9fad43f00 100644
--- a/arch/arm/plat-samsung/clock.c
+++ b/arch/arm/plat-samsung/clock.c
@@ -389,6 +389,72 @@ int __init s3c24xx_register_baseclocks(unsigned long xtal)
 
 static struct dentry *clk_debugfs_root;
 
+static void clock_tree_show_one(struct seq_file *s, struct clk *c, int level)
+{
+        struct clk *child;
+        const char *state;
+        char buf[255] = { 0 };
+        int n = 0;
+
+        if (c->name)
+                n = snprintf(buf, sizeof(buf) - 1, "%s", c->name);
+
+        if (c->devname)
+                n += snprintf(buf + n, sizeof(buf) - 1 - n, ":%s", c->devname);
+
+        state = (c->usage > 0) ? "on" : "off";
+
+        seq_printf(s, "%*s%-*s %-6s %-3d %-10lu\n",
+                   level * 3 + 1, "",
+                   50 - level * 3, buf,
+                   state, c->usage, clk_get_rate(c));
+
+        list_for_each_entry(child, &clocks, list) {
+                if (child->parent != c)
+                        continue;
+
+                clock_tree_show_one(s, child, level + 1);
+        }
+}
+
+static int clock_tree_show(struct seq_file *s, void *data)
+{
+        struct clk *c;
+        unsigned long flags;
+
+        seq_printf(s, " clock state ref rate\n");
+        seq_printf(s, "----------------------------------------------------\n");
+
+        spin_lock_irqsave(&clocks_lock, flags);
+
+        list_for_each_entry(c, &clocks, list)
+                if (c->parent == NULL)
+                        clock_tree_show_one(s, c, 0);
+
+        spin_unlock_irqrestore(&clocks_lock, flags);
+        return 0;
+}
+
+static int clock_tree_open(struct inode *inode, struct file *file)
+{
+        return single_open(file, clock_tree_show, inode->i_private);
+}
+
+static const struct file_operations clock_tree_fops = {
+        .open           = clock_tree_open,
+        .read           = seq_read,
+        .llseek         = seq_lseek,
+        .release        = single_release,
+};
+
+static int clock_rate_show(void *data, u64 *val)
+{
+        struct clk *c = data;
+        *val = clk_get_rate(c);
+        return 0;
+}
+DEFINE_SIMPLE_ATTRIBUTE(clock_rate_fops, clock_rate_show, NULL, "%llu\n");
+
 static int clk_debugfs_register_one(struct clk *c)
 {
         int err;
@@ -411,7 +477,7 @@ static int clk_debugfs_register_one(struct clk *c)
                 goto err_out;
         }
 
-        d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
+        d = debugfs_create_file("rate", S_IRUGO, c->dent, c, &clock_rate_fops);
         if (!d) {
                 err = -ENOMEM;
                 goto err_out;
@@ -446,13 +512,18 @@ static int __init clk_debugfs_init(void)
 {
         struct clk *c;
         struct dentry *d;
-        int err;
+        int err = -ENOMEM;
 
         d = debugfs_create_dir("clock", NULL);
         if (!d)
                 return -ENOMEM;
         clk_debugfs_root = d;
 
+        d = debugfs_create_file("clock_tree", S_IRUGO, clk_debugfs_root, NULL,
+                                 &clock_tree_fops);
+        if (!d)
+                goto err_out;
+
         list_for_each_entry(c, &clocks, list) {
                 err = clk_debugfs_register(c);
                 if (err)
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 5da4b4f38f40..133e3e4170fb 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -133,8 +133,6 @@ extern struct platform_device exynos4_device_pcm1;
 extern struct platform_device exynos4_device_pcm2;
 extern struct platform_device exynos4_device_spdif;
 
-extern struct platform_device exynos_device_drm;
-
 extern struct platform_device samsung_asoc_dma;
 extern struct platform_device samsung_asoc_idma;
 extern struct platform_device samsung_device_keypad;