drm/nvc0-: remove nasty fifo swmthd hack for flip completion method

Not required anymore as flips are always done on the kernel's channel,
which means we can use a proper software object class instead.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

4 files changed, 9 insertions, 26 deletions

diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c
index e21453a94971..9ac94d4e5646 100644
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nvc0.c
@@ -494,13 +494,6 @@ nvc0_fifo_isr_subfifo_intr(struct nvc0_fifo_priv *priv, int unit)
         u32 mthd = (addr & 0x00003ffc);
         u32 show = stat;
 
-        if (stat & 0x00200000) {
-                if (mthd == 0x0054) {
-                        if (!nvc0_fifo_swmthd(priv, chid, 0x0500, 0x00000000))
-                                show &= ~0x00200000;
-                }
-        }
-
         if (stat & 0x00800000) {
                 if (!nvc0_fifo_swmthd(priv, chid, mthd, data))
                         show &= ~0x00800000;
diff --git a/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c b/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c
index fcd449e5aba7..04f412922d2d 100644
--- a/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/fifo/nve0.c
@@ -481,13 +481,6 @@ nve0_fifo_isr_subfifo_intr(struct nve0_fifo_priv *priv, int unit)
         u32 mthd = (addr & 0x00003ffc);
         u32 show = stat;
 
-        if (stat & 0x00200000) {
-                if (mthd == 0x0054) {
-                        if (!nve0_fifo_swmthd(priv, chid, 0x0500, 0x00000000))
-                                show &= ~0x00200000;
-                }
-        }
-
         if (stat & 0x00800000) {
                 if (!nve0_fifo_swmthd(priv, chid, mthd, data))
                         show &= ~0x00800000;
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c
index 4b124a67fc04..17422bc19529 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -554,19 +554,15 @@ nouveau_page_flip_emit(struct nouveau_channel *chan,
                 goto fail;
 
         /* Emit the pageflip */
-        ret = RING_SPACE(chan, 3);
+        ret = RING_SPACE(chan, 2);
         if (ret)
                 goto fail;
 
-        if (nv_device(drm->device)->card_type < NV_C0) {
+        if (nv_device(drm->device)->card_type < NV_C0)
                 BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
-                OUT_RING  (chan, 0x00000000);
-                OUT_RING  (chan, 0x00000000);
-        } else {
-                BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
-                OUT_RING  (chan, 0);
-                BEGIN_IMC0(chan, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);
-        }
+        else
+                BEGIN_NVC0(chan, FermiSw, NV_SW_PAGE_FLIP, 1);
+        OUT_RING  (chan, 0x00000000);
         FIRE_RING (chan);
 
         ret = nouveau_fence_new(chan, false, pfence);
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.h b/drivers/gpu/drm/nouveau/nouveau_dma.h
index 690d5930ce32..984004d66a6d 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dma.h
+++ b/drivers/gpu/drm/nouveau/nouveau_dma.h
@@ -51,9 +51,11 @@ enum {
         NvSubCtxSurf2D  = 0,
         NvSubSw         = 1,
         NvSubImageBlit  = 2,
-        NvSub2D         = 3,
         NvSubGdiRect    = 3,
-        NvSubCopy       = 4,
+
+        NvSub2D         = 3, /* DO NOT CHANGE - hardcoded for kepler gr fifo */
+        NvSubCopy       = 4, /* DO NOT CHANGE - hardcoded for kepler gr fifo */
+        FermiSw         = 5, /* DO NOT CHANGE (well.. 6/7 will work...) */
 };
 
 /* Object handles. */
@@ -194,7 +196,6 @@ WIND_RING(struct nouveau_channel *chan)
 #define NV84_SUBCHAN_UEVENT                                          0x00000020
 #define NV84_SUBCHAN_WRCACHE_FLUSH                                   0x00000024
 #define NV10_SUBCHAN_REF_CNT                                         0x00000050
-#define NVSW_SUBCHAN_PAGE_FLIP                                       0x00000054
 #define NV11_SUBCHAN_DMA_SEMAPHORE                                   0x00000060
 #define NV11_SUBCHAN_SEMAPHORE_OFFSET                                0x00000064
 #define NV11_SUBCHAN_SEMAPHORE_ACQUIRE                               0x00000068