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authorMagnus Damm <damm@opensource.se>2013-07-31 14:38:27 -0400
committerSimon Horman <horms+renesas@verge.net.au>2013-08-06 05:07:26 -0400
commit1d33a354bbb618ba578bb372ebc18fe58457f6f3 (patch)
treeec6562a3e2fd3e53de0dded982d4825bb53d86ef
parentcc61591e45c0457139ddd4cd7e57f75928acaaf2 (diff)
ARM: shmobile: Per-CPU SMP boot / sleep code for SCU SoCs
Hook in the per-CPU boot and sleep code in the shared mach-shmobile SCU code. CPUs may be kept in the asm routine until ->boot_secondary() when the per-CPU boot vector is installed. At the end of ->die() the asm sleep routine is invoked. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/mach-shmobile/platsmp-scu.c17
1 files changed, 11 insertions, 6 deletions
diff --git a/arch/arm/mach-shmobile/platsmp-scu.c b/arch/arm/mach-shmobile/platsmp-scu.c
index 7a0c066df686..c96f50160be6 100644
--- a/arch/arm/mach-shmobile/platsmp-scu.c
+++ b/arch/arm/mach-shmobile/platsmp-scu.c
@@ -18,8 +18,9 @@
18 18
19void __init shmobile_smp_scu_prepare_cpus(unsigned int max_cpus) 19void __init shmobile_smp_scu_prepare_cpus(unsigned int max_cpus)
20{ 20{
21 shmobile_boot_fn = virt_to_phys(shmobile_boot_scu); 21 /* install boot code shared by all CPUs */
22 shmobile_boot_arg = (unsigned long)shmobile_scu_base; 22 shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
23 shmobile_boot_arg = MPIDR_HWID_BITMASK;
23 24
24 /* enable SCU and cache coherency on booting CPU */ 25 /* enable SCU and cache coherency on booting CPU */
25 scu_enable(shmobile_scu_base); 26 scu_enable(shmobile_scu_base);
@@ -28,22 +29,26 @@ void __init shmobile_smp_scu_prepare_cpus(unsigned int max_cpus)
28 29
29int shmobile_smp_scu_boot_secondary(unsigned int cpu, struct task_struct *idle) 30int shmobile_smp_scu_boot_secondary(unsigned int cpu, struct task_struct *idle)
30{ 31{
31 /* do nothing for now */ 32 /* For this particular CPU register SCU boot vector */
33 shmobile_smp_hook(cpu, virt_to_phys(shmobile_boot_scu),
34 (unsigned long)shmobile_scu_base);
32 return 0; 35 return 0;
33} 36}
34 37
35#ifdef CONFIG_HOTPLUG_CPU 38#ifdef CONFIG_HOTPLUG_CPU
36void shmobile_smp_scu_cpu_die(unsigned int cpu) 39void shmobile_smp_scu_cpu_die(unsigned int cpu)
37{ 40{
41 /* For this particular CPU deregister boot vector */
42 shmobile_smp_hook(cpu, 0, 0);
43
38 dsb(); 44 dsb();
39 flush_cache_all(); 45 flush_cache_all();
40 46
41 /* disable cache coherency */ 47 /* disable cache coherency */
42 scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF); 48 scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF);
43 49
44 /* Endless loop until reset */ 50 /* jump to shared mach-shmobile sleep / reset code */
45 while (1) 51 shmobile_smp_sleep();
46 cpu_do_idle();
47} 52}
48 53
49static int shmobile_smp_scu_psr_core_disabled(int cpu) 54static int shmobile_smp_scu_psr_core_disabled(int cpu)