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authorBruce Allan <bruce.w.allan@intel.com>2011-07-22 02:21:56 -0400
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2011-08-13 05:11:48 -0400
commit1d2101a712b3b7281a19ff6d7bfc16c2ce9d3998 (patch)
tree4a33de343896b90fe4312aaa86552ee2db9f4dec
parent63d635b21c00069b5ade7640bcbe8ab912dc65d1 (diff)
e1000e: Spurious interrupts & dropped packets with 82577/8/9 in half-duplex
On 82577/8/9 in half-duplex when a received packet is passed from the PHY to the MAC, if too many preamble octects are stripped from the packet before arriving at the MAC, it can be misintrepeted as an in-band message rather than an actual frame. For example, if the frame contents resembled an interrupt request in-band message, it would trigger a false interrupt. In most cases, the packet is just dropped. By reducing the number of preamble octets stripped from the beginning of the frame when passing it from the PHY to the MAC, the MAC will interpret the frame properly. An additional uses of the magic PHY_REG(770, 16) have been updated with a define introduced with this patch. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
-rw-r--r--drivers/net/e1000e/ich8lan.c41
1 files changed, 33 insertions, 8 deletions
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c
index 4e36978b8fd8..7525e372720c 100644
--- a/drivers/net/e1000e/ich8lan.c
+++ b/drivers/net/e1000e/ich8lan.c
@@ -163,6 +163,11 @@
163#define HV_KMRN_MODE_CTRL PHY_REG(769, 16) 163#define HV_KMRN_MODE_CTRL PHY_REG(769, 16)
164#define HV_KMRN_MDIO_SLOW 0x0400 164#define HV_KMRN_MDIO_SLOW 0x0400
165 165
166/* KMRN FIFO Control and Status */
167#define HV_KMRN_FIFO_CTRLSTA PHY_REG(770, 16)
168#define HV_KMRN_FIFO_CTRLSTA_PREAMBLE_MASK 0x7000
169#define HV_KMRN_FIFO_CTRLSTA_PREAMBLE_SHIFT 12
170
166/* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */ 171/* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */
167/* Offset 04h HSFSTS */ 172/* Offset 04h HSFSTS */
168union ich8_hws_flash_status { 173union ich8_hws_flash_status {
@@ -657,6 +662,7 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
657 struct e1000_mac_info *mac = &hw->mac; 662 struct e1000_mac_info *mac = &hw->mac;
658 s32 ret_val; 663 s32 ret_val;
659 bool link; 664 bool link;
665 u16 phy_reg;
660 666
661 /* 667 /*
662 * We only want to go out to the PHY registers to see if Auto-Neg 668 * We only want to go out to the PHY registers to see if Auto-Neg
@@ -689,16 +695,35 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
689 695
690 mac->get_link_status = false; 696 mac->get_link_status = false;
691 697
692 if (hw->phy.type == e1000_phy_82578) { 698 switch (hw->mac.type) {
693 ret_val = e1000_link_stall_workaround_hv(hw); 699 case e1000_pch2lan:
694 if (ret_val)
695 goto out;
696 }
697
698 if (hw->mac.type == e1000_pch2lan) {
699 ret_val = e1000_k1_workaround_lv(hw); 700 ret_val = e1000_k1_workaround_lv(hw);
700 if (ret_val) 701 if (ret_val)
701 goto out; 702 goto out;
703 /* fall-thru */
704 case e1000_pchlan:
705 if (hw->phy.type == e1000_phy_82578) {
706 ret_val = e1000_link_stall_workaround_hv(hw);
707 if (ret_val)
708 goto out;
709 }
710
711 /*
712 * Workaround for PCHx parts in half-duplex:
713 * Set the number of preambles removed from the packet
714 * when it is passed from the PHY to the MAC to prevent
715 * the MAC from misinterpreting the packet type.
716 */
717 e1e_rphy(hw, HV_KMRN_FIFO_CTRLSTA, &phy_reg);
718 phy_reg &= ~HV_KMRN_FIFO_CTRLSTA_PREAMBLE_MASK;
719
720 if ((er32(STATUS) & E1000_STATUS_FD) != E1000_STATUS_FD)
721 phy_reg |= (1 << HV_KMRN_FIFO_CTRLSTA_PREAMBLE_SHIFT);
722
723 e1e_wphy(hw, HV_KMRN_FIFO_CTRLSTA, phy_reg);
724 break;
725 default:
726 break;
702 } 727 }
703 728
704 /* 729 /*
@@ -1355,7 +1380,7 @@ static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)
1355 return ret_val; 1380 return ret_val;
1356 1381
1357 /* Preamble tuning for SSC */ 1382 /* Preamble tuning for SSC */
1358 ret_val = e1e_wphy(hw, PHY_REG(770, 16), 0xA204); 1383 ret_val = e1e_wphy(hw, HV_KMRN_FIFO_CTRLSTA, 0xA204);
1359 if (ret_val) 1384 if (ret_val)
1360 return ret_val; 1385 return ret_val;
1361 } 1386 }