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authorMasato Noguchi <Masato.Noguchi@jp.sony.com>2007-07-20 15:39:37 -0400
committerArnd Bergmann <arnd@klappe.arndb.de>2007-07-20 15:41:55 -0400
commit1cfc0f86eb0348dd04ace8c2171642ebe9cd87bb (patch)
tree4d7d4de86d020eab3c00975117f8e2b4745f995b
parentcfd529b25d9b1d48423b85d76066348e2459e646 (diff)
[CELL] spufs: fix decr_status meanings
The decr_status in the LSCSA is confusedly used as two meanings: * SPU decrementer was running * SPU decrementer was wrapped as a result of adjust and the code to set decr_status is missing. This patch fixes these problems by using the decr_status argument as a set of flags. This requires a rebuild of the shipped spu_restore code. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Diffstat
-rw-r--r--arch/powerpc/platforms/cell/spufs/spu_restore.c2
-rw-r--r--arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped470
-rw-r--r--arch/powerpc/platforms/cell/spufs/switch.c12
-rw-r--r--include/asm-powerpc/spu_csa.h8
4 files changed, 269 insertions, 223 deletions
diff --git a/arch/powerpc/platforms/cell/spufs/spu_restore.c b/arch/powerpc/platforms/cell/spufs/spu_restore.c
index 4e19ed7a0756..7114e033460e 100644
--- a/arch/powerpc/platforms/cell/spufs/spu_restore.c
+++ b/arch/powerpc/platforms/cell/spufs/spu_restore.c
@@ -90,7 +90,7 @@ static inline void restore_decr(void)
90 * decrementer value from LSCSA. 90 * decrementer value from LSCSA.
91 */ 91 */
92 offset = LSCSA_QW_OFFSET(decr_status); 92 offset = LSCSA_QW_OFFSET(decr_status);
93 decr_running = regs_spill[offset].slot[0]; 93 decr_running = regs_spill[offset].slot[0] & SPU_DECR_STATUS_RUNNING;
94 if (decr_running) { 94 if (decr_running) {
95 offset = LSCSA_QW_OFFSET(decr); 95 offset = LSCSA_QW_OFFSET(decr);
96 decr = regs_spill[offset].slot[0]; 96 decr = regs_spill[offset].slot[0];
diff --git a/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped b/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped
index 15183d209b58..799815e22377 100644
--- a/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped
+++ b/arch/powerpc/platforms/cell/spufs/spu_restore_dump.h_shipped
@@ -10,7 +10,7 @@ static unsigned int spu_restore_code[] __attribute__((__aligned__(128))) = {
100x24fd8081, 100x24fd8081,
110x1cd80081, 110x1cd80081,
120x33001180, 120x33001180,
130x42030003, 130x42034003,
140x33800284, 140x33800284,
150x1c010204, 150x1c010204,
160x40200000, 160x40200000,
@@ -24,22 +24,22 @@ static unsigned int spu_restore_code[] __attribute__((__aligned__(128))) = {
240x23fffd84, 240x23fffd84,
250x1c100183, 250x1c100183,
260x217ffa85, 260x217ffa85,
270x3080a000, 270x3080b000,
280x3080a201, 280x3080b201,
290x3080a402, 290x3080b402,
300x3080a603, 300x3080b603,
310x3080a804, 310x3080b804,
320x3080aa05, 320x3080ba05,
330x3080ac06, 330x3080bc06,
340x3080ae07, 340x3080be07,
350x3080b008, 350x3080c008,
360x3080b209, 360x3080c209,
370x3080b40a, 370x3080c40a,
380x3080b60b, 380x3080c60b,
390x3080b80c, 390x3080c80c,
400x3080ba0d, 400x3080ca0d,
410x3080bc0e, 410x3080cc0e,
420x3080be0f, 420x3080ce0f,
430x00003ffc, 430x00003ffc,
440x00000000, 440x00000000,
450x00000000, 450x00000000,
@@ -48,19 +48,18 @@ static unsigned int spu_restore_code[] __attribute__((__aligned__(128))) = {
480x3ec00083, 480x3ec00083,
490xb0a14103, 490xb0a14103,
500x01a00204, 500x01a00204,
510x3ec10082, 510x3ec10083,
520x4202800e, 520x4202c002,
530x04000703, 530xb0a14203,
540xb0a14202, 540x21a00802,
550x21a00803, 550x3fbf028a,
560x3fbf028d, 560x3f20050a,
570x3f20068d, 570x3fbe0502,
580x3fbe0682,
590x3fe30102, 580x3fe30102,
600x21a00882, 590x21a00882,
610x3f82028f, 600x3f82028b,
620x3fe3078f, 610x3fe3058b,
630x3fbf0784, 620x3fbf0584,
640x3f200204, 630x3f200204,
650x3fbe0204, 640x3fbe0204,
660x3fe30204, 650x3fe30204,
@@ -75,52 +74,46 @@ static unsigned int spu_restore_code[] __attribute__((__aligned__(128))) = {
750x21a00083, 740x21a00083,
760x40800082, 750x40800082,
770x21a00b02, 760x21a00b02,
780x10002818, 770x10002612,
790x42a00002, 780x42a00003,
800x32800007, 790x42074006,
810x4207000c, 800x1800c204,
820x18008208, 810x40a00008,
830x40a0000b, 820x40800789,
840x4080020a, 830x1c010305,
850x40800709, 840x34000302,
860x00200000,
870x42070002,
880x3ac30384,
890x1cffc489, 850x1cffc489,
900x00200000, 860x3ec00303,
910x18008383, 870x3ec00287,
920x38830382, 880xb0408403,
930x4cffc486, 890x24000302,
940x3ac28185, 900x34000282,
950xb0408584, 910x1c020306,
960x28830382, 920xb0408207,
970x1c020387, 930x18020204,
980x38828182, 940x24000282,
990xb0408405, 950x217ffa09,
1000x1802c408, 960x04000403,
1010x28828182,
1020x217ff886,
1030x04000583,
1040x21a00803, 970x21a00803,
1050x3fbe0682, 980x3fbe0502,
1060x3fe30102, 990x3fe30102,
1070x04000106, 1000x04000105,
1080x21a00886, 1010x21a00885,
1090x04000603, 1020x42074002,
1100x21a00903, 1030x21a00902,
1110x40803c02, 1040x40803c03,
1120x21a00982, 1050x21a00983,
1130x40800003, 1060x04000484,
1140x04000184,
1150x21a00a04, 1070x21a00a04,
1160x40802202, 1080x40802202,
1170x21a00a82, 1090x21a00a82,
1180x42028005, 1100x30809c03,
1190x34208702, 1110x34000182,
1200x21002282, 1120x14004102,
1130x21002782,
1210x21a00804, 1140x21a00804,
1220x21a00886, 1150x21a00885,
1230x3fbf0782, 1160x3fbf0582,
1240x3f200102, 1170x3f200102,
1250x3fbe0102, 1180x3fbe0102,
1260x3fe30102, 1190x3fe30102,
@@ -133,194 +126,233 @@ static unsigned int spu_restore_code[] __attribute__((__aligned__(128))) = {
1330x40800083, 1260x40800083,
1340x21a00b83, 1270x21a