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authorLinus Torvalds <torvalds@linux-foundation.org>2011-10-23 03:44:40 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2011-10-23 03:44:40 -0400
commit1bf1aacedcda23c75e70fa3394e1caa6d4b5ee49 (patch)
tree3628287c740b7150f2808b89b4305a811778acab
parent5117cc25fd43add94c04c9d2ace713c69a21bdb1 (diff)
parentfb630b9fc902e24209166b1659a8b375bf38099c (diff)
Merge branch 'samsung-fixes-4' of git://github.com/kgene/linux-samsung
* 'samsung-fixes-4' of git://github.com/kgene/linux-samsung: ARM: S3C24XX: Fix s3c24xx build errors if !CONFIG_PM ARM: S5P: fix offset calculation on gpio-interrupt
-rw-r--r--arch/arm/mach-s3c2410/s3c2410.c2
-rw-r--r--arch/arm/mach-s3c2412/s3c2412.c2
-rw-r--r--arch/arm/mach-s3c2416/s3c2416.c2
-rw-r--r--arch/arm/mach-s3c2440/s3c2440.c2
-rw-r--r--arch/arm/mach-s3c2440/s3c2442.c2
-rw-r--r--arch/arm/plat-s5p/irq-gpioint.c6
6 files changed, 13 insertions, 3 deletions
diff --git a/arch/arm/mach-s3c2410/s3c2410.c b/arch/arm/mach-s3c2410/s3c2410.c
index f1d3bd8f6f17..343a540d86a9 100644
--- a/arch/arm/mach-s3c2410/s3c2410.c
+++ b/arch/arm/mach-s3c2410/s3c2410.c
@@ -170,7 +170,9 @@ int __init s3c2410_init(void)
170{ 170{
171 printk("S3C2410: Initialising architecture\n"); 171 printk("S3C2410: Initialising architecture\n");
172 172
173#ifdef CONFIG_PM
173 register_syscore_ops(&s3c2410_pm_syscore_ops); 174 register_syscore_ops(&s3c2410_pm_syscore_ops);
175#endif
174 register_syscore_ops(&s3c24xx_irq_syscore_ops); 176 register_syscore_ops(&s3c24xx_irq_syscore_ops);
175 177
176 return sysdev_register(&s3c2410_sysdev); 178 return sysdev_register(&s3c2410_sysdev);
diff --git a/arch/arm/mach-s3c2412/s3c2412.c b/arch/arm/mach-s3c2412/s3c2412.c
index ef0958d3e5c6..57a1e01e4e50 100644
--- a/arch/arm/mach-s3c2412/s3c2412.c
+++ b/arch/arm/mach-s3c2412/s3c2412.c
@@ -245,7 +245,9 @@ int __init s3c2412_init(void)
245{ 245{
246 printk("S3C2412: Initialising architecture\n"); 246 printk("S3C2412: Initialising architecture\n");
247 247
248#ifdef CONFIG_PM
248 register_syscore_ops(&s3c2412_pm_syscore_ops); 249 register_syscore_ops(&s3c2412_pm_syscore_ops);
250#endif
249 register_syscore_ops(&s3c24xx_irq_syscore_ops); 251 register_syscore_ops(&s3c24xx_irq_syscore_ops);
250 252
251 return sysdev_register(&s3c2412_sysdev); 253 return sysdev_register(&s3c2412_sysdev);
diff --git a/arch/arm/mach-s3c2416/s3c2416.c b/arch/arm/mach-s3c2416/s3c2416.c
index 494ce913dc95..20b3fdfb3051 100644
--- a/arch/arm/mach-s3c2416/s3c2416.c
+++ b/arch/arm/mach-s3c2416/s3c2416.c
@@ -97,7 +97,9 @@ int __init s3c2416_init(void)
97 97
98 s3c_fb_setname("s3c2443-fb"); 98 s3c_fb_setname("s3c2443-fb");
99 99
100#ifdef CONFIG_PM
100 register_syscore_ops(&s3c2416_pm_syscore_ops); 101 register_syscore_ops(&s3c2416_pm_syscore_ops);
102#endif
101 register_syscore_ops(&s3c24xx_irq_syscore_ops); 103 register_syscore_ops(&s3c24xx_irq_syscore_ops);
102 104
103 return sysdev_register(&s3c2416_sysdev); 105 return sysdev_register(&s3c2416_sysdev);
diff --git a/arch/arm/mach-s3c2440/s3c2440.c b/arch/arm/mach-s3c2440/s3c2440.c
index ce99ff72838d..2270d3360216 100644
--- a/arch/arm/mach-s3c2440/s3c2440.c
+++ b/arch/arm/mach-s3c2440/s3c2440.c
@@ -55,7 +55,9 @@ int __init s3c2440_init(void)
55 55
56 /* register suspend/resume handlers */ 56 /* register suspend/resume handlers */
57 57
58#ifdef CONFIG_PM
58 register_syscore_ops(&s3c2410_pm_syscore_ops); 59 register_syscore_ops(&s3c2410_pm_syscore_ops);
60#endif
59 register_syscore_ops(&s3c244x_pm_syscore_ops); 61 register_syscore_ops(&s3c244x_pm_syscore_ops);
60 register_syscore_ops(&s3c24xx_irq_syscore_ops); 62 register_syscore_ops(&s3c24xx_irq_syscore_ops);
61 63
diff --git a/arch/arm/mach-s3c2440/s3c2442.c b/arch/arm/mach-s3c2440/s3c2442.c
index 9ad99f8016a1..6f2b65e6e068 100644
--- a/arch/arm/mach-s3c2440/s3c2442.c
+++ b/arch/arm/mach-s3c2440/s3c2442.c
@@ -169,7 +169,9 @@ int __init s3c2442_init(void)
169{ 169{
170 printk("S3C2442: Initialising architecture\n"); 170 printk("S3C2442: Initialising architecture\n");
171 171
172#ifdef CONFIG_PM
172 register_syscore_ops(&s3c2410_pm_syscore_ops); 173 register_syscore_ops(&s3c2410_pm_syscore_ops);
174#endif
173 register_syscore_ops(&s3c244x_pm_syscore_ops); 175 register_syscore_ops(&s3c244x_pm_syscore_ops);
174 register_syscore_ops(&s3c24xx_irq_syscore_ops); 176 register_syscore_ops(&s3c24xx_irq_syscore_ops);
175 177
diff --git a/arch/arm/plat-s5p/irq-gpioint.c b/arch/arm/plat-s5p/irq-gpioint.c
index f88216d23991..c65eb791d1bb 100644
--- a/arch/arm/plat-s5p/irq-gpioint.c
+++ b/arch/arm/plat-s5p/irq-gpioint.c
@@ -163,9 +163,9 @@ static __init int s5p_gpioint_add(struct s3c_gpio_chip *chip)
163 ct->chip.irq_mask = irq_gc_mask_set_bit; 163 ct->chip.irq_mask = irq_gc_mask_set_bit;
164 ct->chip.irq_unmask = irq_gc_mask_clr_bit; 164 ct->chip.irq_unmask = irq_gc_mask_clr_bit;
165 ct->chip.irq_set_type = s5p_gpioint_set_type, 165 ct->chip.irq_set_type = s5p_gpioint_set_type,
166 ct->regs.ack = PEND_OFFSET + REG_OFFSET(chip->group); 166 ct->regs.ack = PEND_OFFSET + REG_OFFSET(group - bank->start);
167 ct->regs.mask = MASK_OFFSET + REG_OFFSET(chip->group); 167 ct->regs.mask = MASK_OFFSET + REG_OFFSET(group - bank->start);
168 ct->regs.type = CON_OFFSET + REG_OFFSET(chip->group); 168 ct->regs.type = CON_OFFSET + REG_OFFSET(group - bank->start);
169 irq_setup_generic_chip(gc, IRQ_MSK(chip->chip.ngpio), 169 irq_setup_generic_chip(gc, IRQ_MSK(chip->chip.ngpio),
170 IRQ_GC_INIT_MASK_CACHE, 170 IRQ_GC_INIT_MASK_CACHE,
171 IRQ_NOREQUEST | IRQ_NOPROBE, 0); 171 IRQ_NOREQUEST | IRQ_NOPROBE, 0);