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authorMaxime Ripard <maxime.ripard@free-electrons.com>2013-01-14 13:53:54 -0500
committerMaxime Ripard <maxime.ripard@free-electrons.com>2013-01-16 13:13:18 -0500
commit1bea07f16da0d77689cda7abe73939dd1dfdea22 (patch)
tree73f358778abe372ca0ea57540c82040a3829b279
parent43880f709dc59840849e31b01735ac587195ef8a (diff)
ARM: sunxi: Use the Synosys APB UART instead of ns8250
The UART controller used in the A10/A13 is the Synopsys DesignWare 8250. The wrong use of a regular 8250 driver may lead to a oops during kernel boot with "irq 17: nobody cared", because the apb UART as an extra interrupt that gets raised when writing to the LCR when busy. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-rw-r--r--arch/arm/boot/dts/sunxi.dtsi6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/sunxi.dtsi b/arch/arm/boot/dts/sunxi.dtsi
index 8bbc2bfef221..8b36abea9f2e 100644
--- a/arch/arm/boot/dts/sunxi.dtsi
+++ b/arch/arm/boot/dts/sunxi.dtsi
@@ -60,19 +60,21 @@
60 }; 60 };
61 61
62 uart0: uart@01c28000 { 62 uart0: uart@01c28000 {
63 compatible = "ns8250"; 63 compatible = "snps,dw-apb-uart";
64 reg = <0x01c28000 0x400>; 64 reg = <0x01c28000 0x400>;
65 interrupts = <1>; 65 interrupts = <1>;
66 reg-shift = <2>; 66 reg-shift = <2>;
67 reg-io-width = <4>;
67 clock-frequency = <24000000>; 68 clock-frequency = <24000000>;
68 status = "disabled"; 69 status = "disabled";
69 }; 70 };
70 71
71 uart1: uart@01c28400 { 72 uart1: uart@01c28400 {
72 compatible = "ns8250"; 73 compatible = "snps,dw-apb-uart";
73 reg = <0x01c28400 0x400>; 74 reg = <0x01c28400 0x400>;
74 interrupts = <2>; 75 interrupts = <2>;
75 reg-shift = <2>; 76 reg-shift = <2>;
77 reg-io-width = <4>;
76 clock-frequency = <24000000>; 78 clock-frequency = <24000000>;
77 status = "disabled"; 79 status = "disabled";
78 }; 80 };