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authorharninder rai <harninder.rai@freescale.com>2014-05-15 03:45:33 -0400
committerScott Wood <scottwood@freescale.com>2014-05-22 19:08:32 -0400
commit1be62c6cced607ee870e45512d021f0d6bd1a6c7 (patch)
tree6d45c7e6f224caf5f1c2f7c4e77678478ed1ba4f
parentfd7e5b7a8758093781a44df9577fe24e9e11723e (diff)
powerpc/mpc85xx: Add BSC9132 QDS Support
- BSC9132 is an integrated device that targets Femto base station market. It combines Power Architecture e500v2 and DSP StarCore SC3850 technologies with MAPLE-B2F baseband acceleration processing elements - BSC9132QDS Overview 2Gbyte DDR3 (on board DDR) 32Mbyte 16bit NOR flash 128Mbyte 2K page size NAND Flash 256 Kbit M24256 I2C EEPROM 128 Mbit SPI Flash memory SD slot eTSEC1: Connected to SGMII PHY eTSEC2: Connected to SGMII PHY DUART interface: supports one UARTs up to 115200 bps for console display Signed-off-by: Harninder Rai <harninder.rai@freescale.com> Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/powerpc/fsl/board.txt17
-rw-r--r--arch/powerpc/boot/dts/bsc9132qds.dts35
-rw-r--r--arch/powerpc/boot/dts/bsc9132qds.dtsi101
-rw-r--r--arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi185
-rw-r--r--arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi66
-rw-r--r--arch/powerpc/platforms/85xx/Kconfig9
-rw-r--r--arch/powerpc/platforms/85xx/Makefile1
-rw-r--r--arch/powerpc/platforms/85xx/bsc913x_qds.c74
8 files changed, 488 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/powerpc/fsl/board.txt b/Documentation/devicetree/bindings/powerpc/fsl/board.txt
index 380914e965e0..700dec4774fa 100644
--- a/Documentation/devicetree/bindings/powerpc/fsl/board.txt
+++ b/Documentation/devicetree/bindings/powerpc/fsl/board.txt
@@ -67,3 +67,20 @@ Example:
67 gpio-controller; 67 gpio-controller;
68 }; 68 };
69 }; 69 };
70
71* Freescale on-board FPGA connected on I2C bus
72
73Some Freescale boards like BSC9132QDS have on board FPGA connected on
74the i2c bus.
75
76Required properties:
77- compatible: Should be a board-specific string followed by a string
78 indicating the type of FPGA. Example:
79 "fsl,<board>-fpga", "fsl,fpga-qixis-i2c"
80- reg: Should contain the address of the FPGA
81
82Example:
83 fpga: fpga@66 {
84 compatible = "fsl,bsc9132qds-fpga", "fsl,fpga-qixis-i2c";
85 reg = <0x66>;
86 };
diff --git a/arch/powerpc/boot/dts/bsc9132qds.dts b/arch/powerpc/boot/dts/bsc9132qds.dts
new file mode 100644
index 000000000000..6cab1062bc74
--- /dev/null
+++ b/arch/powerpc/boot/dts/bsc9132qds.dts
@@ -0,0 +1,35 @@
1/*
2 * BSC9132 QDS Device Tree Source
3 *
4 * Copyright 2014 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/include/ "fsl/bsc9132si-pre.dtsi"
13
14/ {
15 model = "fsl,bsc9132qds";
16 compatible = "fsl,bsc9132qds";
17
18 memory {
19 device_type = "memory";
20 };
21
22 ifc: ifc@ff71e000 {
23 /* NOR, NAND Flash on board */
24 ranges = <0x0 0x0 0x0 0x88000000 0x08000000
25 0x1 0x0 0x0 0xff800000 0x00010000>;
26 reg = <0x0 0xff71e000 0x0 0x2000>;
27 };
28
29 soc: soc@ff700000 {
30 ranges = <0x0 0x0 0xff700000 0x100000>;
31 };
32};
33
34/include/ "bsc9132qds.dtsi"
35/include/ "fsl/bsc9132si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/bsc9132qds.dtsi b/arch/powerpc/boot/dts/bsc9132qds.dtsi
new file mode 100644
index 000000000000..af8e88830221
--- /dev/null
+++ b/arch/powerpc/boot/dts/bsc9132qds.dtsi
@@ -0,0 +1,101 @@
1/*
2 * BSC9132 QDS Device Tree Source stub (no addresses or top-level ranges)
3 *
4 * Copyright 2014 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&ifc {
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x8000000>;
41 bank-width = <2>;
42 device-width = <1>;
43 };
44
45 nand@1,0 {
46 #address-cells = <1>;
47 #size-cells = <1>;
48 compatible = "fsl,ifc-nand";
49 reg = <0x1 0x0 0x4000>;
50 };
51};
52
53&soc {
54 spi@7000 {
55 flash@0 {
56 #address-cells = <1>;
57 #size-cells = <1>;
58 compatible = "spansion,s25sl12801";
59 reg = <0>;
60 spi-max-frequency = <30000000>;
61 };
62 };
63
64 i2c@3000 {
65 fpga: fpga@66 {
66 compatible = "fsl,bsc9132qds-fpga", "fsl,fpga-qixis-i2c";
67 reg = <0x66>;
68 };
69 };
70
71 usb@22000 {
72 phy_type = "ulpi";
73 };
74
75 mdio@24000 {
76 phy0: ethernet-phy@0 {
77 reg = <0x0>;
78 };
79
80 phy1: ethernet-phy@1 {
81 reg = <0x1>;
82 };
83
84 tbi0: tbi-phy@11 {
85 reg = <0x1f>;
86 device_type = "tbi-phy";
87 };
88 };
89
90 enet0: ethernet@b0000 {
91 phy-handle = <&phy0>;
92 tbi-handle = <&tbi0>;
93 phy-connection-type = "sgmii";
94 };
95
96 enet1: ethernet@b1000 {
97 phy-handle = <&phy1>;
98 tbi-handle = <&tbi0>;
99 phy-connection-type = "sgmii";
100 };
101};
diff --git a/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi b/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
new file mode 100644
index 000000000000..c72307198140
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/bsc9132si-post.dtsi
@@ -0,0 +1,185 @@
1/*
2 * BSC9132 Silicon/SoC Device Tree Source (post include)
3 *
4 * Copyright 2014 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35&ifc {
36 #address-cells = <2>;
37 #size-cells = <1>;
38 compatible = "fsl,ifc", "simple-bus";
39 /* FIXME: Test whether interrupts are split */
40 interrupts = <16 2 0 0 20 2 0 0>;
41};
42
43&soc {
44 #address-cells = <1>;
45 #size-cells = <1>;
46 device_type = "soc";
47 compatible = "fsl,bsc9132-immr", "simple-bus";
48 bus-frequency = <0>; // Filled out by uboot.
49
50 ecm-law@0 {
51 compatible = "fsl,ecm-law";
52 reg = <0x0 0x1000>;
53 fsl,num-laws = <12>;
54 };
55
56 ecm@1000 {
57 compatible = "fsl,bsc9132-ecm", "fsl,ecm";
58 reg = <0x1000 0x1000>;
59 interrupts = <16 2 0 0>;
60 };
61
62 memory-controller@2000 {
63 compatible = "fsl,bsc9132-memory-controller";
64 reg = <0x2000 0x1000>;
65 interrupts = <16 2 1 8>;
66 };
67
68/include/ "pq3-i2c-0.dtsi"
69 i2c@3000 {
70 interrupts = <17 2 0 0>;
71 };
72
73/include/ "pq3-i2c-1.dtsi"
74 i2c@3100 {
75 interrupts = <17 2 0 0>;
76 };
77
78/include/ "pq3-duart-0.dtsi"
79 serial0: serial@4500 {
80 interrupts = <18 2 0 0>;
81 };
82
83 serial1: serial@4600 {
84 interrupts = <18 2 0 0 >;
85 };
86/include/ "pq3-espi-0.dtsi"
87 spi0: spi@7000 {
88 fsl,espi-num-chipselects = <1>;
89 interrupts = <22 0x2 0 0>;
90 };
91
92/include/ "pq3-gpio-0.dtsi"
93 gpio-controller@f000 {
94 interrupts = <19 0x2 0 0>;
95 };
96
97 L2: l2-cache-controller@20000 {
98 compatible = "fsl,bsc9132-l2-cache-controller";
99 reg = <0x20000 0x1000>;
100 cache-line-size = <32>; // 32 bytes
101 cache-size = <0x40000>; // L2,256K
102 interrupts = <16 2 1 0>;
103 };
104
105/include/ "pq3-dma-0.dtsi"
106
107dma@21300 {
108
109 dma-channel@0 {
110 interrupts = <62 2 0 0>;
111 };
112
113 dma-channel@80 {
114 interrupts = <63 2 0 0>;
115 };
116
117 dma-channel@100 {
118 interrupts = <64 2 0 0>;
119 };
120
121 dma-channel@180 {
122 interrupts = <65 2 0 0>;
123 };
124};
125
126/include/ "pq3-usb2-dr-0.dtsi"
127usb@22000 {
128 compatible = "fsl-usb2-dr","fsl-usb2-dr-v2.2";
129 interrupts = <40 0x2 0 0>;
130};
131
132/include/ "pq3-esdhc-0.dtsi"
133 sdhc@2e000 {
134 fsl,sdhci-auto-cmd12;
135 interrupts = <41 0x2 0 0>;
136 };
137
138/include/ "pq3-sec4.4-0.dtsi"
139crypto@30000 {
140 interrupts = <57 2 0 0>;
141
142 sec_jr0: jr@1000 {
143 interrupts = <58 2 0 0>;
144 };
145
146 sec_jr1: jr@2000 {
147 interrupts = <59 2 0 0>;
148 };
149
150 sec_jr2: jr@3000 {
151 interrupts = <60 2 0 0>;
152 };
153
154 sec_jr3: jr@4000 {
155 interrupts = <61 2 0 0>;
156 };
157};
158
159/include/ "pq3-mpic.dtsi"
160/include/ "pq3-mpic-timer-B.dtsi"
161
162/include/ "pq3-etsec2-0.dtsi"
163enet0: ethernet@b0000 {
164 queue-group@b0000 {
165 fsl,rx-bit-map = <0xff>;
166 fsl,tx-bit-map = <0xff>;
167 interrupts = <26 2 0 0 27 2 0 0 28 2 0 0>;
168 };
169};
170
171/include/ "pq3-etsec2-1.dtsi"
172enet1: ethernet@b1000 {
173 queue-group@b1000 {
174 fsl,rx-bit-map = <0xff>;
175 fsl,tx-bit-map = <0xff>;
176 interrupts = <33 2 0 0 34 2 0 0 35 2 0 0>;
177 };
178};
179
180global-utilities@e0000 {
181 compatible = "fsl,bsc9132-guts";
182 reg = <0xe0000 0x1000>;
183 fsl,has-rstcr;
184 };
185};
diff --git a/arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi b/arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi
new file mode 100644
index 000000000000..301a9dba5790
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/bsc9132si-pre.dtsi
@@ -0,0 +1,66 @@
1/*
2 * BSC9132 Silicon/SoC Device Tree Source (pre include)
3 *
4 * Copyright 2014 Freescale Semiconductor Inc.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are met:
8 * * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * * Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * * Neither the name of Freescale Semiconductor nor the
14 * names of its contributors may be used to endorse or promote products
15 * derived from this software without specific prior written permission.
16 *
17 *
18 * ALTERNATIVELY, this software may be distributed under the terms of the
19 * GNU General Public License ("GPL") as published by the Free Software
20 * Foundation, either version 2 of that License or (at your option) any
21 * later version.
22 *
23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35/dts-v1/;
36
37/include/ "e500v2_power_isa.dtsi"
38
39/ {
40 #address-cells = <2>;
41 #size-cells = <2>;
42 interrupt-parent = <&mpic>;
43
44 aliases {
45 serial0 = &serial0;
46 ethernet0 = &enet0;
47 ethernet1 = &enet1;
48 };
49
50 cpus {
51 #address-cells = <1>;
52 #size-cells = <0>;
53
54 cpu0: PowerPC,e500v2@0 {
55 device_type = "cpu";
56 reg = <0x0>;
57 next-level-cache = <&L2>;
58 };
59
60 cpu1: PowerPC,e500v2@1 {
61 device_type = "cpu";
62 reg = <0x1>;
63 next-level-cache = <&L2>;
64 };
65 };
66};
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index a3cd2afee511..f442120e0033 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -38,6 +38,15 @@ config C293_PCIE
38 help 38 help
39 This option enables support for the C293PCIE board 39 This option enables support for the C293PCIE board
40 40
41config BSC9132_QDS
42 bool "Freescale BSC9132QDS"
43 select DEFAULT_UIMAGE
44 help
45 This option enables support for the Freescale BSC9132 QDS board.
46 BSC9132 is a heterogeneous SoC containing dual e500v2 powerpc cores
47 and dual StarCore SC3850 DSP cores.
48 Manufacturer : Freescale Semiconductor, Inc
49
41config MPC8540_ADS 50config MPC8540_ADS
42 bool "Freescale MPC8540 ADS" 51 bool "Freescale MPC8540 ADS"
43 select DEFAULT_UIMAGE 52 select DEFAULT_UIMAGE
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 822103e8d34f..730326046625 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -6,6 +6,7 @@ obj-$(CONFIG_SMP) += smp.o
6obj-y += common.o 6obj-y += common.o
7 7
8obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o 8obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
9obj-$(CONFIG_BSC9132_QDS) += bsc913x_qds.o
9obj-$(CONFIG_C293_PCIE) += c293pcie.o 10obj-$(CONFIG_C293_PCIE) += c293pcie.o
10obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o 11obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
11obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o 12obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
diff --git a/arch/powerpc/platforms/85xx/bsc913x_qds.c b/arch/powerpc/platforms/85xx/bsc913x_qds.c
new file mode 100644
index 000000000000..f0927e58af25
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/bsc913x_qds.c
@@ -0,0 +1,74 @@
1/*
2 * BSC913xQDS Board Setup
3 *
4 * Author:
5 * Harninder Rai <harninder.rai@freescale.com>
6 * Priyanka Jain <Priyanka.Jain@freescale.com>
7 *
8 * Copyright 2014 Freescale Semiconductor Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16#include <linux/of_platform.h>
17#include <linux/pci.h>
18#include <asm/mpic.h>
19#include <sysdev/fsl_soc.h>
20#include <asm/udbg.h>
21
22#include "mpc85xx.h"
23#include "smp.h"
24
25void __init bsc913x_qds_pic_init(void)
26{
27 struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
28 MPIC_SINGLE_DEST_CPU,
29 0, 256, " OpenPIC ");
30
31 if (!mpic)
32 pr_err("bsc913x: Failed to allocate MPIC structure\n");
33 else
34 mpic_init(mpic);
35}
36
37/*
38 * Setup the architecture
39 */
40static void __init bsc913x_qds_setup_arch(void)
41{
42 if (ppc_md.progress)
43 ppc_md.progress("bsc913x_qds_setup_arch()", 0);
44
45#if defined(CONFIG_SMP)
46 mpc85xx_smp_init();
47#endif
48
49 pr_info("bsc913x board from Freescale Semiconductor\n");
50}
51
52machine_device_initcall(bsc9132_qds, mpc85xx_common_publish_devices);
53
54/*
55 * Called very early, device-tree isn't unflattened
56 */
57
58static int __init bsc9132_qds_probe(void)
59{
60 unsigned long root = of_get_flat_dt_root();
61
62 return of_flat_dt_is_compatible(root, "fsl,bsc9132qds");
63}
64
65define_machine(bsc9132_qds) {
66 .name = "BSC9132 QDS",
67 .probe = bsc9132_qds_probe,
68 .setup_arch = bsc913x_qds_setup_arch,
69 .init_IRQ = bsc913x_qds_pic_init,
70 .get_irq = mpic_get_irq,
71 .restart = fsl_rstcr_restart,
72 .calibrate_decr = generic_calibrate_decr,
73 .progress = udbg_progress,
74};
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-23 21:50:10 -0400