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authorBard Liao <bardliao@realtek.com>2015-03-27 08:19:08 -0400
committerMark Brown <broonie@kernel.org>2015-03-27 12:48:57 -0400
commit1b5d0160e8f17db0714016a2550d3b1d65c70c3e (patch)
tree4230872fc5cde98bdbbdbf487e35b78a24a3ae62
parentafefc12801e501fea90f1d9a678e0985f47dc1bf (diff)
ASoC: rt5645: Use update_bits for bit control
In codec bias level off, we need to disable gate mode with MCLK for power saving. It is set by one bit. We don't need to write while register for that. Signed-off-by: Bard Liao <bardliao@realtek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--sound/soc/codecs/rt5645.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/sound/soc/codecs/rt5645.c b/sound/soc/codecs/rt5645.c
index f9edf09253d9..b6d5b9570efb 100644
--- a/sound/soc/codecs/rt5645.c
+++ b/sound/soc/codecs/rt5645.c
@@ -2396,7 +2396,8 @@ static int rt5645_set_bias_level(struct snd_soc_codec *codec,
2396 2396
2397 case SND_SOC_BIAS_OFF: 2397 case SND_SOC_BIAS_OFF:
2398 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100); 2398 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100);
2399 snd_soc_write(codec, RT5645_GEN_CTRL1, 0x0128); 2399 snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2400 RT5645_DIG_GATE_CTRL, 0);
2400 snd_soc_update_bits(codec, RT5645_PWR_ANLG1, 2401 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2401 RT5645_PWR_VREF1 | RT5645_PWR_MB | 2402 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2402 RT5645_PWR_BG | RT5645_PWR_VREF2 | 2403 RT5645_PWR_BG | RT5645_PWR_VREF2 |