clk: exynos5433: Fix CLK_PCLK_MONOTONIC_CNT clk register assignment

CLK_PCLK_MONOTONIC_CNT clock had a wrong register assigned to it.
The correct register is ENABLE_PCLK_MIF_SECURE_MONOTONIC_CNT.

Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/drivers/clk/samsung/clk-exynos5433.c b/drivers/clk/samsung/clk-exynos5433.c
index 543f9c7707a7..b1a546e402aa 100644
--- a/drivers/clk/samsung/clk-exynos5433.c
+++ b/drivers/clk/samsung/clk-exynos5433.c
@@ -1490,7 +1490,7 @@ static struct samsung_gate_clock mif_gate_clks[] __initdata = {
 
         /* ENABLE_PCLK_MIF_SECURE_MONOTONIC_CNT */
         GATE(CLK_PCLK_MONOTONIC_CNT, "pclk_monotonic_cnt", "div_aclk_mif_133",
-                        ENABLE_PCLK_MIF_SECURE_RTC, 0, 0, 0),
+                        ENABLE_PCLK_MIF_SECURE_MONOTONIC_CNT, 0, 0, 0),
 
         /* ENABLE_PCLK_MIF_SECURE_RTC */
         GATE(CLK_PCLK_RTC, "pclk_rtc", "div_aclk_mif_133",