diff options
author | Charulatha V <charu@ti.com> | 2011-02-02 07:22:14 -0500 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2011-02-17 12:53:31 -0500 |
commit | 1a5d81905aec1536783fb6ab875f31910f449941 (patch) | |
tree | 73b594a73cb333496e48210d4a5c29e501bd46f0 | |
parent | 0f616a4e17ea244f882056656964b792edde8364 (diff) |
OMAP: devices: Modify McSPI device to adapt to hwmod framework
Cleans up all base address definitions for omap_mcspi
and adapts the device registration and driver to hwmod framework.
Changes involves:
1) Removing all base address macro defines.
2) Using omap-device layer to register device and utilizing data from
hwmod data file for base address, dma channel number, Irq_number,
device attribute(number of chipselect).
3) Appending base address with pdata reg_offset for omap4 boards.
For omap4 all regs used in driver deviate with reg_offset_macros
defined with an value of 0x100. So pass this offset through pdata
and append the same to base address retrieved from hwmod data file
and we are not mapping *_HL_* regs which are not used in driver.
Signed-off-by: Charulatha V <charu@ti.com>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Reviewed-by: Partha Basak <p-basak2@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | arch/arm/mach-omap2/devices.c | 187 | ||||
-rw-r--r-- | arch/arm/plat-omap/include/plat/mcspi.h | 3 | ||||
-rw-r--r-- | drivers/spi/omap2_mcspi.c | 112 |
3 files changed, 72 insertions, 230 deletions
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index e0f0ef952bc9..71f099b85e7c 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/io.h> | 15 | #include <linux/io.h> |
16 | #include <linux/clk.h> | 16 | #include <linux/clk.h> |
17 | #include <linux/err.h> | 17 | #include <linux/err.h> |
18 | #include <linux/slab.h> | ||
18 | 19 | ||
19 | #include <mach/hardware.h> | 20 | #include <mach/hardware.h> |
20 | #include <mach/irqs.h> | 21 | #include <mach/irqs.h> |
@@ -279,163 +280,55 @@ static inline void omap_init_audio(void) {} | |||
279 | 280 | ||
280 | #include <plat/mcspi.h> | 281 | #include <plat/mcspi.h> |
281 | 282 | ||
282 | #define OMAP2_MCSPI1_BASE 0x48098000 | 283 | struct omap_device_pm_latency omap_mcspi_latency[] = { |
283 | #define OMAP2_MCSPI2_BASE 0x4809a000 | 284 | [0] = { |
284 | #define OMAP2_MCSPI3_BASE 0x480b8000 | 285 | .deactivate_func = omap_device_idle_hwmods, |
285 | #define OMAP2_MCSPI4_BASE 0x480ba000 | 286 | .activate_func = omap_device_enable_hwmods, |
286 | 287 | .flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST, | |
287 | #define OMAP4_MCSPI1_BASE 0x48098100 | ||
288 | #define OMAP4_MCSPI2_BASE 0x4809a100 | ||
289 | #define OMAP4_MCSPI3_BASE 0x480b8100 | ||
290 | #define OMAP4_MCSPI4_BASE 0x480ba100 | ||
291 | |||
292 | static struct omap2_mcspi_platform_config omap2_mcspi1_config = { | ||
293 | .num_cs = 4, | ||
294 | }; | ||
295 | |||
296 | static struct resource omap2_mcspi1_resources[] = { | ||
297 | { | ||
298 | .start = OMAP2_MCSPI1_BASE, | ||
299 | .end = OMAP2_MCSPI1_BASE + 0xff, | ||
300 | .flags = IORESOURCE_MEM, | ||
301 | }, | ||
302 | }; | ||
303 | |||
304 | static struct platform_device omap2_mcspi1 = { | ||
305 | .name = "omap2_mcspi", | ||
306 | .id = 1, | ||
307 | .num_resources = ARRAY_SIZE(omap2_mcspi1_resources), | ||
308 | .resource = omap2_mcspi1_resources, | ||
309 | .dev = { | ||
310 | .platform_data = &omap2_mcspi1_config, | ||
311 | }, | ||
312 | }; | ||
313 | |||
314 | static struct omap2_mcspi_platform_config omap2_mcspi2_config = { | ||
315 | .num_cs = 2, | ||
316 | }; | ||
317 | |||
318 | static struct resource omap2_mcspi2_resources[] = { | ||
319 | { | ||
320 | .start = OMAP2_MCSPI2_BASE, | ||
321 | .end = OMAP2_MCSPI2_BASE + 0xff, | ||
322 | .flags = IORESOURCE_MEM, | ||
323 | }, | ||
324 | }; | ||
325 | |||
326 | static struct platform_device omap2_mcspi2 = { | ||
327 | .name = "omap2_mcspi", | ||
328 | .id = 2, | ||
329 | .num_resources = ARRAY_SIZE(omap2_mcspi2_resources), | ||
330 | .resource = omap2_mcspi2_resources, | ||
331 | .dev = { | ||
332 | .platform_data = &omap2_mcspi2_config, | ||
333 | }, | ||
334 | }; | ||
335 | |||
336 | #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \ | ||
337 | defined(CONFIG_ARCH_OMAP4) | ||
338 | static struct omap2_mcspi_platform_config omap2_mcspi3_config = { | ||
339 | .num_cs = 2, | ||
340 | }; | ||
341 | |||
342 | static struct resource omap2_mcspi3_resources[] = { | ||
343 | { | ||
344 | .start = OMAP2_MCSPI3_BASE, | ||
345 | .end = OMAP2_MCSPI3_BASE + 0xff, | ||
346 | .flags = IORESOURCE_MEM, | ||
347 | }, | ||
348 | }; | ||
349 | |||
350 | static struct platform_device omap2_mcspi3 = { | ||
351 | .name = "omap2_mcspi", | ||
352 | .id = 3, | ||
353 | .num_resources = ARRAY_SIZE(omap2_mcspi3_resources), | ||
354 | .resource = omap2_mcspi3_resources, | ||
355 | .dev = { | ||
356 | .platform_data = &omap2_mcspi3_config, | ||
357 | }, | ||
358 | }; | ||
359 | #endif | ||
360 | |||
361 | #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) | ||
362 | static struct omap2_mcspi_platform_config omap2_mcspi4_config = { | ||
363 | .num_cs = 1, | ||
364 | }; | ||
365 | |||
366 | static struct resource omap2_mcspi4_resources[] = { | ||
367 | { | ||
368 | .start = OMAP2_MCSPI4_BASE, | ||
369 | .end = OMAP2_MCSPI4_BASE + 0xff, | ||
370 | .flags = IORESOURCE_MEM, | ||
371 | }, | ||
372 | }; | ||
373 | |||
374 | static struct platform_device omap2_mcspi4 = { | ||
375 | .name = "omap2_mcspi", | ||
376 | .id = 4, | ||
377 | .num_resources = ARRAY_SIZE(omap2_mcspi4_resources), | ||
378 | .resource = omap2_mcspi4_resources, | ||
379 | .dev = { | ||
380 | .platform_data = &omap2_mcspi4_config, | ||
381 | }, | 288 | }, |
382 | }; | 289 | }; |
383 | #endif | ||
384 | 290 | ||
385 | #ifdef CONFIG_ARCH_OMAP4 | 291 | static int omap_mcspi_init(struct omap_hwmod *oh, void *unused) |
386 | static inline void omap4_mcspi_fixup(void) | ||
387 | { | 292 | { |
388 | omap2_mcspi1_resources[0].start = OMAP4_MCSPI1_BASE; | 293 | struct omap_device *od; |
389 | omap2_mcspi1_resources[0].end = OMAP4_MCSPI1_BASE + 0xff; | 294 | char *name = "omap2_mcspi"; |
390 | omap2_mcspi2_resources[0].start = OMAP4_MCSPI2_BASE; | 295 | struct omap2_mcspi_platform_config *pdata; |
391 | omap2_mcspi2_resources[0].end = OMAP4_MCSPI2_BASE + 0xff; | 296 | static int spi_num; |
392 | omap2_mcspi3_resources[0].start = OMAP4_MCSPI3_BASE; | 297 | struct omap2_mcspi_dev_attr *mcspi_attrib = oh->dev_attr; |
393 | omap2_mcspi3_resources[0].end = OMAP4_MCSPI3_BASE + 0xff; | 298 | |
394 | omap2_mcspi4_resources[0].start = OMAP4_MCSPI4_BASE; | 299 | pdata = kzalloc(sizeof(*pdata), GFP_KERNEL); |
395 | omap2_mcspi4_resources[0].end = OMAP4_MCSPI4_BASE + 0xff; | 300 | if (!pdata) { |
396 | } | 301 | pr_err("Memory allocation for McSPI device failed\n"); |
397 | #else | 302 | return -ENOMEM; |
398 | static inline void omap4_mcspi_fixup(void) | 303 | } |
399 | { | ||
400 | } | ||
401 | #endif | ||
402 | 304 | ||
403 | #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \ | 305 | pdata->num_cs = mcspi_attrib->num_chipselect; |
404 | defined(CONFIG_ARCH_OMAP4) | 306 | switch (oh->class->rev) { |
405 | static inline void omap2_mcspi3_init(void) | 307 | case OMAP2_MCSPI_REV: |
406 | { | 308 | case OMAP3_MCSPI_REV: |
407 | platform_device_register(&omap2_mcspi3); | 309 | pdata->regs_offset = 0; |
408 | } | 310 | break; |
409 | #else | 311 | case OMAP4_MCSPI_REV: |
410 | static inline void omap2_mcspi3_init(void) | 312 | pdata->regs_offset = OMAP4_MCSPI_REG_OFFSET; |
411 | { | 313 | break; |
412 | } | 314 | default: |
413 | #endif | 315 | pr_err("Invalid McSPI Revision value\n"); |
316 | return -EINVAL; | ||
317 | } | ||
414 | 318 | ||
415 | #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) | 319 | spi_num++; |
416 | static inline void omap2_mcspi4_init(void) | 320 | od = omap_device_build(name, spi_num, oh, pdata, |
417 | { | 321 | sizeof(*pdata), omap_mcspi_latency, |
418 | platform_device_register(&omap2_mcspi4); | 322 | ARRAY_SIZE(omap_mcspi_latency), 0); |
419 | } | 323 | WARN(IS_ERR(od), "Cant build omap_device for %s:%s\n", |
420 | #else | 324 | name, oh->name); |
421 | static inline void omap2_mcspi4_init(void) | 325 | kfree(pdata); |
422 | { | 326 | return 0; |
423 | } | 327 | } |
424 | #endif | ||
425 | 328 | ||
426 | static void omap_init_mcspi(void) | 329 | static void omap_init_mcspi(void) |
427 | { | 330 | { |
428 | if (cpu_is_omap44xx()) | 331 | omap_hwmod_for_each_by_class("mcspi", omap_mcspi_init, NULL); |
429 | omap4_mcspi_fixup(); | ||
430 | |||
431 | platform_device_register(&omap2_mcspi1); | ||
432 | platform_device_register(&omap2_mcspi2); | ||
433 | |||
434 | if (cpu_is_omap2430() || cpu_is_omap343x() || cpu_is_omap44xx()) | ||
435 | omap2_mcspi3_init(); | ||
436 | |||
437 | if (cpu_is_omap343x() || cpu_is_omap44xx()) | ||
438 | omap2_mcspi4_init(); | ||
439 | } | 332 | } |
440 | 333 | ||
441 | #else | 334 | #else |
diff --git a/arch/arm/plat-omap/include/plat/mcspi.h b/arch/arm/plat-omap/include/plat/mcspi.h index 560e266da8a1..3d51b18131cc 100644 --- a/arch/arm/plat-omap/include/plat/mcspi.h +++ b/arch/arm/plat-omap/include/plat/mcspi.h | |||
@@ -5,8 +5,11 @@ | |||
5 | #define OMAP3_MCSPI_REV 1 | 5 | #define OMAP3_MCSPI_REV 1 |
6 | #define OMAP4_MCSPI_REV 2 | 6 | #define OMAP4_MCSPI_REV 2 |
7 | 7 | ||
8 | #define OMAP4_MCSPI_REG_OFFSET 0x100 | ||
9 | |||
8 | struct omap2_mcspi_platform_config { | 10 | struct omap2_mcspi_platform_config { |
9 | unsigned short num_cs; | 11 | unsigned short num_cs; |
12 | unsigned int regs_offset; | ||
10 | }; | 13 | }; |
11 | 14 | ||
12 | struct omap2_mcspi_dev_attr { | 15 | struct omap2_mcspi_dev_attr { |
diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c index f076cc5c6fb0..f7851325c61e 100644 --- a/drivers/spi/omap2_mcspi.c +++ b/drivers/spi/omap2_mcspi.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * | 3 | * |
4 | * Copyright (C) 2005, 2006 Nokia Corporation | 4 | * Copyright (C) 2005, 2006 Nokia Corporation |
5 | * Author: Samuel Ortiz <samuel.ortiz@nokia.com> and | 5 | * Author: Samuel Ortiz <samuel.ortiz@nokia.com> and |
6 | * Juha Yrjölä <juha.yrjola@nokia.com> | 6 | * Juha Yrj�l� <juha.yrjola@nokia.com> |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
@@ -1087,91 +1087,14 @@ static int __init omap2_mcspi_reset(struct omap2_mcspi *mcspi) | |||
1087 | return 0; | 1087 | return 0; |
1088 | } | 1088 | } |
1089 | 1089 | ||
1090 | static u8 __initdata spi1_rxdma_id [] = { | ||
1091 | OMAP24XX_DMA_SPI1_RX0, | ||
1092 | OMAP24XX_DMA_SPI1_RX1, | ||
1093 | OMAP24XX_DMA_SPI1_RX2, | ||
1094 | OMAP24XX_DMA_SPI1_RX3, | ||
1095 | }; | ||
1096 | |||
1097 | static u8 __initdata spi1_txdma_id [] = { | ||
1098 | OMAP24XX_DMA_SPI1_TX0, | ||
1099 | OMAP24XX_DMA_SPI1_TX1, | ||
1100 | OMAP24XX_DMA_SPI1_TX2, | ||
1101 | OMAP24XX_DMA_SPI1_TX3, | ||
1102 | }; | ||
1103 | |||
1104 | static u8 __initdata spi2_rxdma_id[] = { | ||
1105 | OMAP24XX_DMA_SPI2_RX0, | ||
1106 | OMAP24XX_DMA_SPI2_RX1, | ||
1107 | }; | ||
1108 | |||
1109 | static u8 __initdata spi2_txdma_id[] = { | ||
1110 | OMAP24XX_DMA_SPI2_TX0, | ||
1111 | OMAP24XX_DMA_SPI2_TX1, | ||
1112 | }; | ||
1113 | |||
1114 | #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) \ | ||
1115 | || defined(CONFIG_ARCH_OMAP4) | ||
1116 | static u8 __initdata spi3_rxdma_id[] = { | ||
1117 | OMAP24XX_DMA_SPI3_RX0, | ||
1118 | OMAP24XX_DMA_SPI3_RX1, | ||
1119 | }; | ||
1120 | |||
1121 | static u8 __initdata spi3_txdma_id[] = { | ||
1122 | OMAP24XX_DMA_SPI3_TX0, | ||
1123 | OMAP24XX_DMA_SPI3_TX1, | ||
1124 | }; | ||
1125 | #endif | ||
1126 | |||
1127 | #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) | ||
1128 | static u8 __initdata spi4_rxdma_id[] = { | ||
1129 | OMAP34XX_DMA_SPI4_RX0, | ||
1130 | }; | ||
1131 | |||
1132 | static u8 __initdata spi4_txdma_id[] = { | ||
1133 | OMAP34XX_DMA_SPI4_TX0, | ||
1134 | }; | ||
1135 | #endif | ||
1136 | 1090 | ||
1137 | static int __init omap2_mcspi_probe(struct platform_device *pdev) | 1091 | static int __init omap2_mcspi_probe(struct platform_device *pdev) |
1138 | { | 1092 | { |
1139 | struct spi_master *master; | 1093 | struct spi_master *master; |
1094 | struct omap2_mcspi_platform_config *pdata = pdev->dev.platform_data; | ||
1140 | struct omap2_mcspi *mcspi; | 1095 | struct omap2_mcspi *mcspi; |
1141 | struct resource *r; | 1096 | struct resource *r; |
1142 | int status = 0, i; | 1097 | int status = 0, i; |
1143 | const u8 *rxdma_id, *txdma_id; | ||
1144 | unsigned num_chipselect; | ||
1145 | |||
1146 | switch (pdev->id) { | ||
1147 | case 1: | ||
1148 | rxdma_id = spi1_rxdma_id; | ||
1149 | txdma_id = spi1_txdma_id; | ||
1150 | num_chipselect = 4; | ||
1151 | break; | ||
1152 | case 2: | ||
1153 | rxdma_id = spi2_rxdma_id; | ||
1154 | txdma_id = spi2_txdma_id; | ||
1155 | num_chipselect = 2; | ||
1156 | break; | ||
1157 | #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) \ | ||
1158 | || defined(CONFIG_ARCH_OMAP4) | ||
1159 | case 3: | ||
1160 | rxdma_id = spi3_rxdma_id; | ||
1161 | txdma_id = spi3_txdma_id; | ||
1162 | num_chipselect = 2; | ||
1163 | break; | ||
1164 | #endif | ||
1165 | #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) | ||
1166 | case 4: | ||
1167 | rxdma_id = spi4_rxdma_id; | ||
1168 | txdma_id = spi4_txdma_id; | ||
1169 | num_chipselect = 1; | ||
1170 | break; | ||
1171 | #endif | ||
1172 | default: | ||
1173 | return -EINVAL; | ||
1174 | } | ||
1175 | 1098 | ||
1176 | master = spi_alloc_master(&pdev->dev, sizeof *mcspi); | 1099 | master = spi_alloc_master(&pdev->dev, sizeof *mcspi); |
1177 | if (master == NULL) { | 1100 | if (master == NULL) { |
@@ -1188,7 +1111,7 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev) | |||
1188 | master->setup = omap2_mcspi_setup; | 1111 | master->setup = omap2_mcspi_setup; |
1189 | master->transfer = omap2_mcspi_transfer; | 1112 | master->transfer = omap2_mcspi_transfer; |
1190 | master->cleanup = omap2_mcspi_cleanup; | 1113 | master->cleanup = omap2_mcspi_cleanup; |
1191 | master->num_chipselect = num_chipselect; | 1114 | master->num_chipselect = pdata->num_cs; |
1192 | 1115 | ||
1193 | dev_set_drvdata(&pdev->dev, master); | 1116 | dev_set_drvdata(&pdev->dev, master); |
1194 | 1117 | ||
@@ -1206,6 +1129,8 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev) | |||
1206 | goto err1; | 1129 | goto err1; |
1207 | } | 1130 | } |
1208 | 1131 | ||
1132 | r->start += pdata->regs_offset; | ||
1133 | r->end += pdata->regs_offset; | ||
1209 | mcspi->phys = r->start; | 1134 | mcspi->phys = r->start; |
1210 | mcspi->base = ioremap(r->start, r->end - r->start + 1); | 1135 | mcspi->base = ioremap(r->start, r->end - r->start + 1); |
1211 | if (!mcspi->base) { | 1136 | if (!mcspi->base) { |
@@ -1240,11 +1165,32 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev) | |||
1240 | if (mcspi->dma_channels == NULL) | 1165 | if (mcspi->dma_channels == NULL) |
1241 | goto err3; | 1166 | goto err3; |
1242 | 1167 | ||
1243 | for (i = 0; i < num_chipselect; i++) { | 1168 | for (i = 0; i < master->num_chipselect; i++) { |
1169 | char dma_ch_name[14]; | ||
1170 | struct resource *dma_res; | ||
1171 | |||
1172 | sprintf(dma_ch_name, "rx%d", i); | ||
1173 | dma_res = platform_get_resource_byname(pdev, IORESOURCE_DMA, | ||
1174 | dma_ch_name); | ||
1175 | if (!dma_res) { | ||
1176 | dev_dbg(&pdev->dev, "cannot get DMA RX channel\n"); | ||
1177 | status = -ENODEV; | ||
1178 | break; | ||
1179 | } | ||
1180 | |||
1244 | mcspi->dma_channels[i].dma_rx_channel = -1; | 1181 | mcspi->dma_channels[i].dma_rx_channel = -1; |
1245 | mcspi->dma_channels[i].dma_rx_sync_dev = rxdma_id[i]; | 1182 | mcspi->dma_channels[i].dma_rx_sync_dev = dma_res->start; |
1183 | sprintf(dma_ch_name, "tx%d", i); | ||
1184 | dma_res = platform_get_resource_byname(pdev, IORESOURCE_DMA, | ||
1185 | dma_ch_name); | ||
1186 | if (!dma_res) { | ||
1187 | dev_dbg(&pdev->dev, "cannot get DMA TX channel\n"); | ||
1188 | status = -ENODEV; | ||
1189 | break; | ||
1190 | } | ||
1191 | |||
1246 | mcspi->dma_channels[i].dma_tx_channel = -1; | 1192 | mcspi->dma_channels[i].dma_tx_channel = -1; |
1247 | mcspi->dma_channels[i].dma_tx_sync_dev = txdma_id[i]; | 1193 | mcspi->dma_channels[i].dma_tx_sync_dev = dma_res->start; |
1248 | } | 1194 | } |
1249 | 1195 | ||
1250 | if (omap2_mcspi_reset(mcspi) < 0) | 1196 | if (omap2_mcspi_reset(mcspi) < 0) |