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authorBen Skeggs <bskeggs@redhat.com>2012-08-19 01:58:38 -0400
committerBen Skeggs <bskeggs@redhat.com>2012-10-02 23:13:06 -0400
commit1971f04e16172db79b8b0eed75fb2cb82adfbb83 (patch)
tree7e3f7782366249cc25ee3ddf1479cfdfbd0873ba
parent9456f7d1beb8f7cfd99300e6028b3b2667c2ebd5 (diff)
drm/nouveau/dmaobj: reject unsupported parent types instead of half-succeeding
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c13
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c13
2 files changed, 16 insertions, 10 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c
index 848aa3bdacd1..5ad76f74416f 100644
--- a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c
+++ b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c
@@ -23,6 +23,7 @@
23 */ 23 */
24 24
25#include <core/gpuobj.h> 25#include <core/gpuobj.h>
26#include <core/class.h>
26 27
27#include <subdev/fb.h> 28#include <subdev/fb.h>
28#include <subdev/vm/nv04.h> 29#include <subdev/vm/nv04.h>
@@ -118,16 +119,18 @@ nv04_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
118 return ret; 119 return ret;
119 120
120 switch (nv_mclass(parent)) { 121 switch (nv_mclass(parent)) {
121 case 0x006b: 122 case NV_DEVICE_CLASS:
122 case 0x006e: 123 break;
123 case 0x176e: 124 case NV03_CHANNEL_DMA_CLASS:
124 case 0x406e: 125 case NV10_CHANNEL_DMA_CLASS:
126 case NV17_CHANNEL_DMA_CLASS:
127 case NV40_CHANNEL_DMA_CLASS:
125 ret = dmaeng->bind(dmaeng, *pobject, &dmaobj->base, &gpuobj); 128 ret = dmaeng->bind(dmaeng, *pobject, &dmaobj->base, &gpuobj);
126 nouveau_object_ref(NULL, pobject); 129 nouveau_object_ref(NULL, pobject);
127 *pobject = nv_object(gpuobj); 130 *pobject = nv_object(gpuobj);
128 break; 131 break;
129 default: 132 default:
130 break; 133 return -EINVAL;
131 } 134 }
132 135
133 return ret; 136 return ret;
diff --git a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c
index be5c0df644db..045d2565e289 100644
--- a/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c
@@ -23,6 +23,7 @@
23 */ 23 */
24 24
25#include <core/gpuobj.h> 25#include <core/gpuobj.h>
26#include <core/class.h>
26 27
27#include <subdev/fb.h> 28#include <subdev/fb.h>
28#include <engine/dmaobj.h> 29#include <engine/dmaobj.h>
@@ -109,16 +110,18 @@ nv50_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
109 return ret; 110 return ret;
110 111
111 switch (nv_mclass(parent)) { 112 switch (nv_mclass(parent)) {
112 case 0x506e: 113 case NV_DEVICE_CLASS:
113 case 0x506f: 114 break;
114 case 0x826e: 115 case NV50_CHANNEL_DMA_CLASS:
115 case 0x826f: 116 case NV84_CHANNEL_DMA_CLASS:
117 case NV50_CHANNEL_IND_CLASS:
118 case NV84_CHANNEL_IND_CLASS:
116 ret = dmaeng->bind(dmaeng, *pobject, &dmaobj->base, &gpuobj); 119 ret = dmaeng->bind(dmaeng, *pobject, &dmaobj->base, &gpuobj);
117 nouveau_object_ref(NULL, pobject); 120 nouveau_object_ref(NULL, pobject);
118 *pobject = nv_object(gpuobj); 121 *pobject = nv_object(gpuobj);
119 break; 122 break;
120 default: 123 default:
121 break; 124 return -EINVAL;
122 } 125 }
123 126
124 return ret; 127 return ret;