diff options
author | Dave Airlie <airlied@redhat.com> | 2014-09-15 05:55:55 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2014-09-15 05:55:55 -0400 |
commit | 19524f7c59c19854caf5b82d89bc558e38da5790 (patch) | |
tree | 92abeba64bc3aa9f4bde7e6d98d8215602069b18 | |
parent | 98faa78ce7f1f986e11e7805d31b409782a6d2d4 (diff) | |
parent | d0fa1af40e784aaf7ebb7ba8a17b229bb3fa4c21 (diff) |
Merge tag 'topic/core-stuff-2014-09-15' of git://anongit.freedesktop.org/drm-intel into drm-next
Here's the updated topic/core-stuff pull request with the two patches
already merged into drm-fixes dropped.
* tag 'topic/core-stuff-2014-09-15' of git://anongit.freedesktop.org/drm-intel:
drm: Drop modeset locking from crtc init function
drm/i915/hdmi: Enable pipe pixel replication for SD interlaced modes
drm/edid: Reduce horizontal timings for pixel replicated modes
drm: Include task->name and master status in debugfs clients info
drm/gem: Fix kerneldoc typo
drm: use c99 initializers in structures
drm: fix drm_modeset_lock.h kernel-doc notation
-rw-r--r-- | drivers/gpu/drm/drm_crtc.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/drm_edid.c | 117 | ||||
-rw-r--r-- | drivers/gpu/drm/drm_gem.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/drm_info.c | 27 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_hdmi.c | 15 | ||||
-rw-r--r-- | drivers/gpu/drm/sti/sti_vtac.c | 12 | ||||
-rw-r--r-- | include/drm/drm_modeset_lock.h | 4 |
7 files changed, 107 insertions, 75 deletions
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c index 3a1801b8fc2f..0acb2de8e66e 100644 --- a/drivers/gpu/drm/drm_crtc.c +++ b/drivers/gpu/drm/drm_crtc.c | |||
@@ -680,11 +680,7 @@ int drm_crtc_init_with_planes(struct drm_device *dev, struct drm_crtc *crtc, | |||
680 | crtc->funcs = funcs; | 680 | crtc->funcs = funcs; |
681 | crtc->invert_dimensions = false; | 681 | crtc->invert_dimensions = false; |
682 | 682 | ||
683 | drm_modeset_lock_all(dev); | ||
684 | drm_modeset_lock_init(&crtc->mutex); | 683 | drm_modeset_lock_init(&crtc->mutex); |
685 | /* dropped by _unlock_all(): */ | ||
686 | drm_modeset_lock(&crtc->mutex, config->acquire_ctx); | ||
687 | |||
688 | ret = drm_mode_object_get(dev, &crtc->base, DRM_MODE_OBJECT_CRTC); | 684 | ret = drm_mode_object_get(dev, &crtc->base, DRM_MODE_OBJECT_CRTC); |
689 | if (ret) | 685 | if (ret) |
690 | goto out; | 686 | goto out; |
@@ -702,7 +698,6 @@ int drm_crtc_init_with_planes(struct drm_device *dev, struct drm_crtc *crtc, | |||
702 | cursor->possible_crtcs = 1 << drm_crtc_index(crtc); | 698 | cursor->possible_crtcs = 1 << drm_crtc_index(crtc); |
703 | 699 | ||
704 | out: | 700 | out: |
705 | drm_modeset_unlock_all(dev); | ||
706 | 701 | ||
707 | return ret; | 702 | return ret; |
708 | } | 703 | } |
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index f905c63c0f68..1bdbfd0e0033 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c | |||
@@ -632,27 +632,27 @@ static const struct drm_display_mode edid_cea_modes[] = { | |||
632 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | | 632 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
633 | DRM_MODE_FLAG_INTERLACE), | 633 | DRM_MODE_FLAG_INTERLACE), |
634 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, | 634 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
635 | /* 6 - 1440x480i@60Hz */ | 635 | /* 6 - 720(1440)x480i@60Hz */ |
636 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, | 636 | { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739, |
637 | 1602, 1716, 0, 480, 488, 494, 525, 0, | 637 | 801, 858, 0, 480, 488, 494, 525, 0, |
638 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | | 638 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
639 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), | 639 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
640 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, | 640 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
641 | /* 7 - 1440x480i@60Hz */ | 641 | /* 7 - 720(1440)x480i@60Hz */ |
642 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, | 642 | { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739, |
643 | 1602, 1716, 0, 480, 488, 494, 525, 0, | 643 | 801, 858, 0, 480, 488, 494, 525, 0, |
644 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | | 644 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
645 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), | 645 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
646 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, | 646 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
647 | /* 8 - 1440x240@60Hz */ | 647 | /* 8 - 720(1440)x240@60Hz */ |
648 | { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, | 648 | { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739, |
649 | 1602, 1716, 0, 240, 244, 247, 262, 0, | 649 | 801, 858, 0, 240, 244, 247, 262, 0, |
650 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | | 650 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
651 | DRM_MODE_FLAG_DBLCLK), | 651 | DRM_MODE_FLAG_DBLCLK), |
652 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, | 652 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
653 | /* 9 - 1440x240@60Hz */ | 653 | /* 9 - 720(1440)x240@60Hz */ |
654 | { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, | 654 | { DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739, |
655 | 1602, 1716, 0, 240, 244, 247, 262, 0, | 655 | 801, 858, 0, 240, 244, 247, 262, 0, |
656 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | | 656 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
657 | DRM_MODE_FLAG_DBLCLK), | 657 | DRM_MODE_FLAG_DBLCLK), |
658 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, | 658 | .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
@@ -714,27 +714,27 @@ static const struct drm_display_mode edid_cea_modes[] = { | |||
714 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | | 714 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | |
715 | DRM_MODE_FLAG_INTERLACE), | 715 | DRM_MODE_FLAG_INTERLACE), |
716 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, | 716 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
717 | /* 21 - 1440x576i@50Hz */ | 717 | /* 21 - 720(1440)x576i@50Hz */ |
718 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, | 718 | { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732, |
719 | 1590, 1728, 0, 576, 580, 586, 625, 0, | 719 | 795, 864, 0, 576, 580, 586, 625, 0, |
720 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | | 720 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
721 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), | 721 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
722 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, | 722 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
723 | /* 22 - 1440x576i@50Hz */ | 723 | /* 22 - 720(1440)x576i@50Hz */ |
724 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, | 724 | { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732, |
725 | 1590, 1728, 0, 576, 580, 586, 625, 0, | 725 | 795, 864, 0, 576, 580, 586, 625, 0, |
726 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | | 726 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
727 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), | 727 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
728 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, | 728 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
729 | /* 23 - 1440x288@50Hz */ | 729 | /* 23 - 720(1440)x288@50Hz */ |
730 | { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, | 730 | { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732, |
731 | 1590, 1728, 0, 288, 290, 293, 312, 0, | 731 | 795, 864, 0, 288, 290, 293, 312, 0, |
732 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | | 732 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
733 | DRM_MODE_FLAG_DBLCLK), | 733 | DRM_MODE_FLAG_DBLCLK), |
734 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, | 734 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
735 | /* 24 - 1440x288@50Hz */ | 735 | /* 24 - 720(1440)x288@50Hz */ |
736 | { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, | 736 | { DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732, |
737 | 1590, 1728, 0, 288, 290, 293, 312, 0, | 737 | 795, 864, 0, 288, 290, 293, 312, 0, |
738 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | | 738 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
739 | DRM_MODE_FLAG_DBLCLK), | 739 | DRM_MODE_FLAG_DBLCLK), |
740 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, | 740 | .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
@@ -837,15 +837,15 @@ static const struct drm_display_mode edid_cea_modes[] = { | |||
837 | 796, 864, 0, 576, 581, 586, 625, 0, | 837 | 796, 864, 0, 576, 581, 586, 625, 0, |
838 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), | 838 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
839 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, | 839 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
840 | /* 44 - 1440x576i@100Hz */ | 840 | /* 44 - 720(1440)x576i@100Hz */ |
841 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, | 841 | { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, |
842 | 1590, 1728, 0, 576, 580, 586, 625, 0, | 842 | 795, 864, 0, 576, 580, 586, 625, 0, |
843 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | | 843 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
844 | DRM_MODE_FLAG_DBLCLK), | 844 | DRM_MODE_FLAG_DBLCLK), |
845 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, | 845 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
846 | /* 45 - 1440x576i@100Hz */ | 846 | /* 45 - 720(1440)x576i@100Hz */ |
847 | { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, | 847 | { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, |
848 | 1590, 1728, 0, 576, 580, 586, 625, 0, | 848 | 795, 864, 0, 576, 580, 586, 625, 0, |
849 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | | 849 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
850 | DRM_MODE_FLAG_DBLCLK), | 850 | DRM_MODE_FLAG_DBLCLK), |
851 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, | 851 | .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
@@ -870,15 +870,15 @@ static const struct drm_display_mode edid_cea_modes[] = { | |||
870 | 798, 858, 0, 480, 489, 495, 525, 0, | 870 | 798, 858, 0, 480, 489, 495, 525, 0, |
871 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), | 871 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
872 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, | 872 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
873 | /* 50 - 1440x480i@120Hz */ | 873 | /* 50 - 720(1440)x480i@120Hz */ |
874 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, | 874 | { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739, |
875 | 1602, 1716, 0, 480, 488, 494, 525, 0, | 875 | 801, 858, 0, 480, 488, 494, 525, 0, |
876 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | | 876 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
877 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), | 877 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
878 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, | 878 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
879 | /* 51 - 1440x480i@120Hz */ | 879 | /* 51 - 720(1440)x480i@120Hz */ |
880 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, | 880 | { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739, |
881 | 1602, 1716, 0, 480, 488, 494, 525, 0, | 881 | 801, 858, 0, 480, 488, 494, 525, 0, |
882 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | | 882 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
883 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), | 883 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
884 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, | 884 | .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
@@ -892,15 +892,15 @@ static const struct drm_display_mode edid_cea_modes[] = { | |||
892 | 796, 864, 0, 576, 581, 586, 625, 0, | 892 | 796, 864, 0, 576, 581, 586, 625, 0, |
893 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), | 893 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
894 | .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, | 894 | .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
895 | /* 54 - 1440x576i@200Hz */ | 895 | /* 54 - 720(1440)x576i@200Hz */ |
896 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, | 896 | { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, |
897 | 1590, 1728, 0, 576, 580, 586, 625, 0, | 897 | 795, 864, 0, 576, 580, 586, 625, 0, |
898 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | | 898 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
899 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), | 899 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
900 | .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, | 900 | .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
901 | /* 55 - 1440x576i@200Hz */ | 901 | /* 55 - 720(1440)x576i@200Hz */ |
902 | { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, | 902 | { DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, |
903 | 1590, 1728, 0, 576, 580, 586, 625, 0, | 903 | 795, 864, 0, 576, 580, 586, 625, 0, |
904 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | | 904 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
905 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), | 905 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
906 | .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, | 906 | .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
@@ -914,15 +914,15 @@ static const struct drm_display_mode edid_cea_modes[] = { | |||
914 | 798, 858, 0, 480, 489, 495, 525, 0, | 914 | 798, 858, 0, 480, 489, 495, 525, 0, |
915 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), | 915 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC), |
916 | .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, | 916 | .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
917 | /* 58 - 1440x480i@240 */ | 917 | /* 58 - 720(1440)x480i@240 */ |
918 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, | 918 | { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739, |
919 | 1602, 1716, 0, 480, 488, 494, 525, 0, | 919 | 801, 858, 0, 480, 488, 494, 525, 0, |
920 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | | 920 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
921 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), | 921 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
922 | .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, | 922 | .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, }, |
923 | /* 59 - 1440x480i@240 */ | 923 | /* 59 - 720(1440)x480i@240 */ |
924 | { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, | 924 | { DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739, |
925 | 1602, 1716, 0, 480, 488, 494, 525, 0, | 925 | 801, 858, 0, 480, 488, 494, 525, 0, |
926 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | | 926 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | |
927 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), | 927 | DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK), |
928 | .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, | 928 | .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, }, |
@@ -2103,7 +2103,8 @@ static int | |||
2103 | add_inferred_modes(struct drm_connector *connector, struct edid *edid) | 2103 | add_inferred_modes(struct drm_connector *connector, struct edid *edid) |
2104 | { | 2104 | { |
2105 | struct detailed_mode_closure closure = { | 2105 | struct detailed_mode_closure closure = { |
2106 | connector, edid, 0, 0, 0 | 2106 | .connector = connector, |
2107 | .edid = edid, | ||
2107 | }; | 2108 | }; |
2108 | 2109 | ||
2109 | if (version_greater(edid, 1, 0)) | 2110 | if (version_greater(edid, 1, 0)) |
@@ -2169,7 +2170,8 @@ add_established_modes(struct drm_connector *connector, struct edid *edid) | |||
2169 | ((edid->established_timings.mfg_rsvd & 0x80) << 9); | 2170 | ((edid->established_timings.mfg_rsvd & 0x80) << 9); |
2170 | int i, modes = 0; | 2171 | int i, modes = 0; |
2171 | struct detailed_mode_closure closure = { | 2172 | struct detailed_mode_closure closure = { |
2172 | connector, edid, 0, 0, 0 | 2173 | .connector = connector, |
2174 | .edid = edid, | ||
2173 | }; | 2175 | }; |
2174 | 2176 | ||
2175 | for (i = 0; i <= EDID_EST_TIMINGS; i++) { | 2177 | for (i = 0; i <= EDID_EST_TIMINGS; i++) { |
@@ -2227,7 +2229,8 @@ add_standard_modes(struct drm_connector *connector, struct edid *edid) | |||
2227 | { | 2229 | { |
2228 | int i, modes = 0; | 2230 | int i, modes = 0; |
2229 | struct detailed_mode_closure closure = { | 2231 | struct detailed_mode_closure closure = { |
2230 | connector, edid, 0, 0, 0 | 2232 | .connector = connector, |
2233 | .edid = edid, | ||
2231 | }; | 2234 | }; |
2232 | 2235 | ||
2233 | for (i = 0; i < EDID_STD_TIMINGS; i++) { | 2236 | for (i = 0; i < EDID_STD_TIMINGS; i++) { |
@@ -2313,7 +2316,8 @@ static int | |||
2313 | add_cvt_modes(struct drm_connector *connector, struct edid *edid) | 2316 | add_cvt_modes(struct drm_connector *connector, struct edid *edid) |
2314 | { | 2317 | { |
2315 | struct detailed_mode_closure closure = { | 2318 | struct detailed_mode_closure closure = { |
2316 | connector, edid, 0, 0, 0 | 2319 | .connector = connector, |
2320 | .edid = edid, | ||
2317 | }; | 2321 | }; |
2318 | 2322 | ||
2319 | if (version_greater(edid, 1, 2)) | 2323 | if (version_greater(edid, 1, 2)) |
@@ -2357,11 +2361,10 @@ add_detailed_modes(struct drm_connector *connector, struct edid *edid, | |||
2357 | u32 quirks) | 2361 | u32 quirks) |
2358 | { | 2362 | { |
2359 | struct detailed_mode_closure closure = { | 2363 | struct detailed_mode_closure closure = { |
2360 | connector, | 2364 | .connector = connector, |
2361 | edid, | 2365 | .edid = edid, |
2362 | 1, | 2366 | .preferred = 1, |
2363 | quirks, | 2367 | .quirks = quirks, |
2364 | 0 | ||
2365 | }; | 2368 | }; |
2366 | 2369 | ||
2367 | if (closure.preferred && !version_greater(edid, 1, 3)) | 2370 | if (closure.preferred && !version_greater(edid, 1, 3)) |
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c index 55fd65002926..eb5dd67153e4 100644 --- a/drivers/gpu/drm/drm_gem.c +++ b/drivers/gpu/drm/drm_gem.c | |||
@@ -147,7 +147,7 @@ int drm_gem_object_init(struct drm_device *dev, | |||
147 | EXPORT_SYMBOL(drm_gem_object_init); | 147 | EXPORT_SYMBOL(drm_gem_object_init); |
148 | 148 | ||
149 | /** | 149 | /** |
150 | * drm_gem_object_init - initialize an allocated private GEM object | 150 | * drm_gem_private_object_init - initialize an allocated private GEM object |
151 | * @dev: drm_device the object should be initialized for | 151 | * @dev: drm_device the object should be initialized for |
152 | * @obj: drm_gem_object to initialize | 152 | * @obj: drm_gem_object to initialize |
153 | * @size: object size | 153 | * @size: object size |
diff --git a/drivers/gpu/drm/drm_info.c b/drivers/gpu/drm/drm_info.c index 7a8e5a9d8f54..0780541f7935 100644 --- a/drivers/gpu/drm/drm_info.c +++ b/drivers/gpu/drm/drm_info.c | |||
@@ -184,15 +184,32 @@ int drm_clients_info(struct seq_file *m, void *data) | |||
184 | struct drm_device *dev = node->minor->dev; | 184 | struct drm_device *dev = node->minor->dev; |
185 | struct drm_file *priv; | 185 | struct drm_file *priv; |
186 | 186 | ||
187 | seq_printf(m, | ||
188 | "%20s %5s %3s master a %5s %10s\n", | ||
189 | "command", | ||
190 | "pid", | ||
191 | "dev", | ||
192 | "uid", | ||
193 | "magic"); | ||
194 | |||
195 | /* dev->filelist is sorted youngest first, but we want to present | ||
196 | * oldest first (i.e. kernel, servers, clients), so walk backwardss. | ||
197 | */ | ||
187 | mutex_lock(&dev->struct_mutex); | 198 | mutex_lock(&dev->struct_mutex); |
188 | seq_printf(m, "a dev pid uid magic\n\n"); | 199 | list_for_each_entry_reverse(priv, &dev->filelist, lhead) { |
189 | list_for_each_entry(priv, &dev->filelist, lhead) { | 200 | struct task_struct *task; |
190 | seq_printf(m, "%c %3d %5d %5d %10u\n", | 201 | |
191 | priv->authenticated ? 'y' : 'n', | 202 | rcu_read_lock(); /* locks pid_task()->comm */ |
192 | priv->minor->index, | 203 | task = pid_task(priv->pid, PIDTYPE_PID); |
204 | seq_printf(m, "%20s %5d %3d %c %c %5d %10u\n", | ||
205 | task ? task->comm : "<unknown>", | ||
193 | pid_vnr(priv->pid), | 206 | pid_vnr(priv->pid), |
207 | priv->minor->index, | ||
208 | priv->is_master ? 'y' : 'n', | ||
209 | priv->authenticated ? 'y' : 'n', | ||
194 | from_kuid_munged(seq_user_ns(m), priv->uid), | 210 | from_kuid_munged(seq_user_ns(m), priv->uid), |
195 | priv->magic); | 211 | priv->magic); |
212 | rcu_read_unlock(); | ||
196 | } | 213 | } |
197 | mutex_unlock(&dev->struct_mutex); | 214 | mutex_unlock(&dev->struct_mutex); |
198 | return 0; | 215 | return 0; |
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 9169786dbbc3..96957683032e 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c | |||
@@ -864,10 +864,15 @@ static enum drm_mode_status | |||
864 | intel_hdmi_mode_valid(struct drm_connector *connector, | 864 | intel_hdmi_mode_valid(struct drm_connector *connector, |
865 | struct drm_display_mode *mode) | 865 | struct drm_display_mode *mode) |
866 | { | 866 | { |
867 | if (mode->clock > hdmi_portclock_limit(intel_attached_hdmi(connector), | 867 | int clock = mode->clock; |
868 | true)) | 868 | |
869 | if (mode->flags & DRM_MODE_FLAG_DBLCLK) | ||
870 | clock *= 2; | ||
871 | |||
872 | if (clock > hdmi_portclock_limit(intel_attached_hdmi(connector), | ||
873 | true)) | ||
869 | return MODE_CLOCK_HIGH; | 874 | return MODE_CLOCK_HIGH; |
870 | if (mode->clock < 20000) | 875 | if (clock < 20000) |
871 | return MODE_CLOCK_LOW; | 876 | return MODE_CLOCK_LOW; |
872 | 877 | ||
873 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | 878 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
@@ -921,6 +926,10 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder, | |||
921 | intel_hdmi->color_range = 0; | 926 | intel_hdmi->color_range = 0; |
922 | } | 927 | } |
923 | 928 | ||
929 | if (adjusted_mode->flags & DRM_MODE_FLAG_DBLCLK) { | ||
930 | pipe_config->pixel_multiplier = 2; | ||
931 | } | ||
932 | |||
924 | if (intel_hdmi->color_range) | 933 | if (intel_hdmi->color_range) |
925 | pipe_config->limited_color_range = true; | 934 | pipe_config->limited_color_range = true; |
926 | 935 | ||
diff --git a/drivers/gpu/drm/sti/sti_vtac.c b/drivers/gpu/drm/sti/sti_vtac.c index 82a51d488434..97bcdac23ae1 100644 --- a/drivers/gpu/drm/sti/sti_vtac.c +++ b/drivers/gpu/drm/sti/sti_vtac.c | |||
@@ -56,8 +56,16 @@ struct sti_vtac_mode { | |||
56 | u32 phyts_per_pixel; | 56 | u32 phyts_per_pixel; |
57 | }; | 57 | }; |
58 | 58 | ||
59 | static const struct sti_vtac_mode vtac_mode_main = {0x2, 0x2, VTAC_5_PPP}; | 59 | static const struct sti_vtac_mode vtac_mode_main = { |
60 | static const struct sti_vtac_mode vtac_mode_aux = {0x1, 0x0, VTAC_17_PPP}; | 60 | .vid_in_width = 0x2, |
61 | .phyts_width = 0x2, | ||
62 | .phyts_per_pixel = VTAC_5_PPP, | ||
63 | }; | ||
64 | static const struct sti_vtac_mode vtac_mode_aux = { | ||
65 | .vid_in_width = 0x1, | ||
66 | .phyts_width = 0x0, | ||
67 | .phyts_per_pixel = VTAC_17_PPP, | ||
68 | }; | ||
61 | 69 | ||
62 | /** | 70 | /** |
63 | * VTAC structure | 71 | * VTAC structure |
diff --git a/include/drm/drm_modeset_lock.h b/include/drm/drm_modeset_lock.h index a3f736d24382..75a5c45e21c7 100644 --- a/include/drm/drm_modeset_lock.h +++ b/include/drm/drm_modeset_lock.h | |||
@@ -29,7 +29,7 @@ | |||
29 | struct drm_modeset_lock; | 29 | struct drm_modeset_lock; |
30 | 30 | ||
31 | /** | 31 | /** |
32 | * drm_modeset_acquire_ctx - locking context (see ww_acquire_ctx) | 32 | * struct drm_modeset_acquire_ctx - locking context (see ww_acquire_ctx) |
33 | * @ww_ctx: base acquire ctx | 33 | * @ww_ctx: base acquire ctx |
34 | * @contended: used internally for -EDEADLK handling | 34 | * @contended: used internally for -EDEADLK handling |
35 | * @locked: list of held locks | 35 | * @locked: list of held locks |
@@ -61,7 +61,7 @@ struct drm_modeset_acquire_ctx { | |||
61 | }; | 61 | }; |
62 | 62 | ||
63 | /** | 63 | /** |
64 | * drm_modeset_lock - used for locking modeset resources. | 64 | * struct drm_modeset_lock - used for locking modeset resources. |
65 | * @mutex: resource locking | 65 | * @mutex: resource locking |
66 | * @head: used to hold it's place on state->locked list when | 66 | * @head: used to hold it's place on state->locked list when |
67 | * part of an atomic update | 67 | * part of an atomic update |