diff options
author | Dinh Nguyen <dinguyen@altera.com> | 2013-09-25 16:38:20 -0400 |
---|---|---|
committer | Dinh Nguyen <dinguyen@altera.com> | 2013-10-09 17:58:31 -0400 |
commit | 163a036468c2eb8f30658dff6c0de6c959f79b0d (patch) | |
tree | cd66f1beb44868b9f29fc9355ac2cd67c38f754d | |
parent | 01ed80b07dadc8747468bd738c8cbfcaf0169866 (diff) |
dts: socfpga: Add support for Altera's SOCFPGA Arria V board
Add support for a new SOCFPGA board that has an Arria V FPGA along with
dual ARM Cortex-A9 cores.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: devicetree@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
-rw-r--r-- | arch/arm/boot/dts/Makefile | 3 | ||||
-rw-r--r-- | arch/arm/boot/dts/socfpga_arria5.dtsi | 58 | ||||
-rw-r--r-- | arch/arm/boot/dts/socfpga_arria5_socdk.dts | 40 |
3 files changed, 100 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 9414342169b1..59c1616fe061 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile | |||
@@ -211,7 +211,8 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \ | |||
211 | r8a73a4-ape6evm-reference.dtb \ | 211 | r8a73a4-ape6evm-reference.dtb \ |
212 | sh7372-mackerel.dtb | 212 | sh7372-mackerel.dtb |
213 | dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d-reference.dtb | 213 | dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d-reference.dtb |
214 | dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5_socdk.dtb \ | 214 | dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_arria5_socdk.dtb \ |
215 | socfpga_cyclone5_socdk.dtb \ | ||
215 | socfpga_cyclone5_sockit.dtb \ | 216 | socfpga_cyclone5_sockit.dtb \ |
216 | socfpga_vt.dtb | 217 | socfpga_vt.dtb |
217 | dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \ | 218 | dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \ |
diff --git a/arch/arm/boot/dts/socfpga_arria5.dtsi b/arch/arm/boot/dts/socfpga_arria5.dtsi new file mode 100644 index 000000000000..a85b4043f888 --- /dev/null +++ b/arch/arm/boot/dts/socfpga_arria5.dtsi | |||
@@ -0,0 +1,58 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2013 Altera Corporation <www.altera.com> | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License along with | ||
14 | * this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | |||
17 | /dts-v1/; | ||
18 | /include/ "socfpga.dtsi" | ||
19 | |||
20 | / { | ||
21 | soc { | ||
22 | clkmgr@ffd04000 { | ||
23 | clocks { | ||
24 | osc1 { | ||
25 | clock-frequency = <25000000>; | ||
26 | }; | ||
27 | }; | ||
28 | }; | ||
29 | |||
30 | serial0@ffc02000 { | ||
31 | clock-frequency = <100000000>; | ||
32 | }; | ||
33 | |||
34 | serial1@ffc03000 { | ||
35 | clock-frequency = <100000000>; | ||
36 | }; | ||
37 | |||
38 | sysmgr@ffd08000 { | ||
39 | cpu1-start-addr = <0xffd080c4>; | ||
40 | }; | ||
41 | |||
42 | timer0@ffc08000 { | ||
43 | clock-frequency = <100000000>; | ||
44 | }; | ||
45 | |||
46 | timer1@ffc09000 { | ||
47 | clock-frequency = <100000000>; | ||
48 | }; | ||
49 | |||
50 | timer2@ffd00000 { | ||
51 | clock-frequency = <25000000>; | ||
52 | }; | ||
53 | |||
54 | timer3@ffd01000 { | ||
55 | clock-frequency = <25000000>; | ||
56 | }; | ||
57 | }; | ||
58 | }; | ||
diff --git a/arch/arm/boot/dts/socfpga_arria5_socdk.dts b/arch/arm/boot/dts/socfpga_arria5_socdk.dts new file mode 100644 index 000000000000..5beffb2265f4 --- /dev/null +++ b/arch/arm/boot/dts/socfpga_arria5_socdk.dts | |||
@@ -0,0 +1,40 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2013 Altera Corporation <www.altera.com> | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
16 | */ | ||
17 | |||
18 | /include/ "socfpga_arria5.dtsi" | ||
19 | |||
20 | / { | ||
21 | model = "Altera SOCFPGA Arria V SoC Development Kit"; | ||
22 | compatible = "altr,socfpga-arria5", "altr,socfpga"; | ||
23 | |||
24 | chosen { | ||
25 | bootargs = "console=ttyS0,115200"; | ||
26 | }; | ||
27 | |||
28 | memory { | ||
29 | name = "memory"; | ||
30 | device_type = "memory"; | ||
31 | reg = <0x0 0x40000000>; /* 1GB */ | ||
32 | }; | ||
33 | |||
34 | aliases { | ||
35 | /* this allow the ethaddr uboot environmnet variable contents | ||
36 | * to be added to the gmac1 device tree blob. | ||
37 | */ | ||
38 | ethernet0 = &gmac1; | ||
39 | }; | ||
40 | }; | ||