diff options
author | Zhao Chenhui <chenhui.zhao@freescale.com> | 2012-07-20 08:42:33 -0400 |
---|---|---|
committer | Kumar Gala <galak@kernel.crashing.org> | 2012-09-12 15:57:08 -0400 |
commit | 15f34eb12340b2c2e0cd90c5987ad6b5f73b79b7 (patch) | |
tree | dea59467dad275977de81a147a98b83bf6e8b04a | |
parent | 03bcb7e35f7e5f759fe03f10a12cd4060dabe60d (diff) |
powerpc/85xx: Replace epapr spin table macros/defines with a struct
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r-- | arch/powerpc/platforms/85xx/smp.c | 46 |
1 files changed, 23 insertions, 23 deletions
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c index ff4249044a3c..4827709996ce 100644 --- a/arch/powerpc/platforms/85xx/smp.c +++ b/arch/powerpc/platforms/85xx/smp.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * Author: Andy Fleming <afleming@freescale.com> | 2 | * Author: Andy Fleming <afleming@freescale.com> |
3 | * Kumar Gala <galak@kernel.crashing.org> | 3 | * Kumar Gala <galak@kernel.crashing.org> |
4 | * | 4 | * |
5 | * Copyright 2006-2008, 2011 Freescale Semiconductor Inc. | 5 | * Copyright 2006-2008, 2011-2012 Freescale Semiconductor Inc. |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify it | 7 | * This program is free software; you can redistribute it and/or modify it |
8 | * under the terms of the GNU General Public License as published by the | 8 | * under the terms of the GNU General Public License as published by the |
@@ -17,6 +17,7 @@ | |||
17 | #include <linux/of.h> | 17 | #include <linux/of.h> |
18 | #include <linux/kexec.h> | 18 | #include <linux/kexec.h> |
19 | #include <linux/highmem.h> | 19 | #include <linux/highmem.h> |
20 | #include <linux/cpu.h> | ||
20 | 21 | ||
21 | #include <asm/machdep.h> | 22 | #include <asm/machdep.h> |
22 | #include <asm/pgtable.h> | 23 | #include <asm/pgtable.h> |
@@ -31,23 +32,21 @@ | |||
31 | 32 | ||
32 | extern void __early_start(void); | 33 | extern void __early_start(void); |
33 | 34 | ||
34 | #define BOOT_ENTRY_ADDR_UPPER 0 | 35 | struct epapr_spin_table { |
35 | #define BOOT_ENTRY_ADDR_LOWER 1 | 36 | u32 addr_h; |
36 | #define BOOT_ENTRY_R3_UPPER 2 | 37 | u32 addr_l; |
37 | #define BOOT_ENTRY_R3_LOWER 3 | 38 | u32 r3_h; |
38 | #define BOOT_ENTRY_RESV 4 | 39 | u32 r3_l; |
39 | #define BOOT_ENTRY_PIR 5 | 40 | u32 reserved; |
40 | #define BOOT_ENTRY_R6_UPPER 6 | 41 | u32 pir; |
41 | #define BOOT_ENTRY_R6_LOWER 7 | 42 | }; |
42 | #define NUM_BOOT_ENTRY 8 | ||
43 | #define SIZE_BOOT_ENTRY (NUM_BOOT_ENTRY * sizeof(u32)) | ||
44 | 43 | ||
45 | static int __init | 44 | static int __init |
46 | smp_85xx_kick_cpu(int nr) | 45 | smp_85xx_kick_cpu(int nr) |
47 | { | 46 | { |
48 | unsigned long flags; | 47 | unsigned long flags; |
49 | const u64 *cpu_rel_addr; | 48 | const u64 *cpu_rel_addr; |
50 | __iomem u32 *bptr_vaddr; | 49 | __iomem struct epapr_spin_table *spin_table; |
51 | struct device_node *np; | 50 | struct device_node *np; |
52 | int n = 0, hw_cpu = get_hard_smp_processor_id(nr); | 51 | int n = 0, hw_cpu = get_hard_smp_processor_id(nr); |
53 | int ioremappable; | 52 | int ioremappable; |
@@ -75,19 +74,20 @@ smp_85xx_kick_cpu(int nr) | |||
75 | 74 | ||
76 | /* Map the spin table */ | 75 | /* Map the spin table */ |
77 | if (ioremappable) | 76 | if (ioremappable) |
78 | bptr_vaddr = ioremap(*cpu_rel_addr, SIZE_BOOT_ENTRY); | 77 | spin_table = ioremap(*cpu_rel_addr, |
78 | sizeof(struct epapr_spin_table)); | ||
79 | else | 79 | else |
80 | bptr_vaddr = phys_to_virt(*cpu_rel_addr); | 80 | spin_table = phys_to_virt(*cpu_rel_addr); |
81 | 81 | ||
82 | local_irq_save(flags); | 82 | local_irq_save(flags); |
83 | 83 | ||
84 | out_be32(bptr_vaddr + BOOT_ENTRY_PIR, hw_cpu); | 84 | out_be32(&spin_table->pir, hw_cpu); |
85 | #ifdef CONFIG_PPC32 | 85 | #ifdef CONFIG_PPC32 |
86 | out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start)); | 86 | out_be32(&spin_table->addr_l, __pa(__early_start)); |
87 | 87 | ||
88 | if (!ioremappable) | 88 | if (!ioremappable) |
89 | flush_dcache_range((ulong)bptr_vaddr, | 89 | flush_dcache_range((ulong)spin_table, |
90 | (ulong)(bptr_vaddr + SIZE_BOOT_ENTRY)); | 90 | (ulong)spin_table + sizeof(struct epapr_spin_table)); |
91 | 91 | ||
92 | /* Wait a bit for the CPU to ack. */ | 92 | /* Wait a bit for the CPU to ack. */ |
93 | while ((__secondary_hold_acknowledge != hw_cpu) && (++n < 1000)) | 93 | while ((__secondary_hold_acknowledge != hw_cpu) && (++n < 1000)) |
@@ -95,18 +95,18 @@ smp_85xx_kick_cpu(int nr) | |||
95 | #else | 95 | #else |
96 | smp_generic_kick_cpu(nr); | 96 | smp_generic_kick_cpu(nr); |
97 | 97 | ||
98 | out_be64((u64 *)(bptr_vaddr + BOOT_ENTRY_ADDR_UPPER), | 98 | out_be64((u64 *)(&spin_table->addr_h), |
99 | __pa((u64)*((unsigned long long *) generic_secondary_smp_init))); | 99 | __pa((u64)*((unsigned long long *)generic_secondary_smp_init))); |
100 | 100 | ||
101 | if (!ioremappable) | 101 | if (!ioremappable) |
102 | flush_dcache_range((ulong)bptr_vaddr, | 102 | flush_dcache_range((ulong)spin_table, |
103 | (ulong)(bptr_vaddr + SIZE_BOOT_ENTRY)); | 103 | (ulong)spin_table + sizeof(struct epapr_spin_table)); |
104 | #endif | 104 | #endif |
105 | 105 | ||
106 | local_irq_restore(flags); | 106 | local_irq_restore(flags); |
107 | 107 | ||
108 | if (ioremappable) | 108 | if (ioremappable) |
109 | iounmap(bptr_vaddr); | 109 | iounmap(spin_table); |
110 | 110 | ||
111 | pr_debug("waited %d msecs for CPU #%d.\n", n, nr); | 111 | pr_debug("waited %d msecs for CPU #%d.\n", n, nr); |
112 | 112 | ||