aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorPaulo Zanoni <paulo.r.zanoni@intel.com>2013-03-22 13:14:13 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-04-18 03:43:22 -0400
commit15d199ea1f3e2b960b0efccca2cdd0ba40a31f3c (patch)
treebcabf231803e7d01071d01a312d54e9628dc40a4
parentf30da187cdcd0939288038e11fb3bfbd1b655564 (diff)
drm/i915: add intel_using_power_well
It returns true if we've requested to turn the power well on and it's really on. It also returns true for all the previous gens. For now there's just one caller, but I'm going to add more. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/intel_display.c4
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h1
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c16
3 files changed, 19 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 457a0a03c063..236d268d809c 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1227,8 +1227,8 @@ void assert_pipe(struct drm_i915_private *dev_priv,
1227 if (pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE) 1227 if (pipe == PIPE_A && dev_priv->quirks & QUIRK_PIPEA_FORCE)
1228 state = true; 1228 state = true;
1229 1229
1230 if (IS_HASWELL(dev_priv->dev) && cpu_transcoder != TRANSCODER_EDP && 1230 if (!intel_using_power_well(dev_priv->dev) &&
1231 !(I915_READ(HSW_PWR_WELL_DRIVER) & HSW_PWR_WELL_ENABLE)) { 1231 cpu_transcoder != TRANSCODER_EDP) {
1232 cur_state = false; 1232 cur_state = false;
1233 } else { 1233 } else {
1234 reg = PIPECONF(cpu_transcoder); 1234 reg = PIPECONF(cpu_transcoder);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index d7bd031dd642..a124e05fb581 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -693,6 +693,7 @@ extern void intel_update_fbc(struct drm_device *dev);
693extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv); 693extern void intel_gpu_ips_init(struct drm_i915_private *dev_priv);
694extern void intel_gpu_ips_teardown(void); 694extern void intel_gpu_ips_teardown(void);
695 695
696extern bool intel_using_power_well(struct drm_device *dev);
696extern void intel_init_power_well(struct drm_device *dev); 697extern void intel_init_power_well(struct drm_device *dev);
697extern void intel_set_power_well(struct drm_device *dev, bool enable); 698extern void intel_set_power_well(struct drm_device *dev, bool enable);
698extern void intel_enable_gt_powersave(struct drm_device *dev); 699extern void intel_enable_gt_powersave(struct drm_device *dev);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index baea4fce5a34..4dc06a1bd43d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4085,6 +4085,22 @@ void intel_init_clock_gating(struct drm_device *dev)
4085 dev_priv->display.init_clock_gating(dev); 4085 dev_priv->display.init_clock_gating(dev);
4086} 4086}
4087 4087
4088/**
4089 * We should only use the power well if we explicitly asked the hardware to
4090 * enable it, so check if it's enabled and also check if we've requested it to
4091 * be enabled.
4092 */
4093bool intel_using_power_well(struct drm_device *dev)
4094{
4095 struct drm_i915_private *dev_priv = dev->dev_private;
4096
4097 if (IS_HASWELL(dev))
4098 return I915_READ(HSW_PWR_WELL_DRIVER) ==
4099 (HSW_PWR_WELL_ENABLE | HSW_PWR_WELL_STATE);
4100 else
4101 return true;
4102}
4103
4088void intel_set_power_well(struct drm_device *dev, bool enable) 4104void intel_set_power_well(struct drm_device *dev, bool enable)
4089{ 4105{
4090 struct drm_i915_private *dev_priv = dev->dev_private; 4106 struct drm_i915_private *dev_priv = dev->dev_private;