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authorSandeep Paulraj <s-paulraj@ti.com>2009-06-20 13:15:39 -0400
committerKevin Hilman <khilman@deeprootsystems.com>2009-08-26 03:56:58 -0400
commit15061b5d02ad461620ab7b09d48374fad0e57649 (patch)
tree732a91dc27dc2eb2f420cae036c32318806da336
parent8ed0a9d4e7cfff439f95d08c882841f25a12bf54 (diff)
davinci: dm365: add EDMA support
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
-rw-r--r--arch/arm/mach-davinci/dm365.c87
1 files changed, 87 insertions, 0 deletions
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 9d615db4463c..c52aad300844 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -660,6 +660,91 @@ static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = {
660 [IRQ_DM365_EMUINT] = 7, 660 [IRQ_DM365_EMUINT] = 7,
661}; 661};
662 662
663/* Four Transfer Controllers on DM365 */
664static const s8
665dm365_queue_tc_mapping[][2] = {
666 /* {event queue no, TC no} */
667 {0, 0},
668 {1, 1},
669 {2, 2},
670 {3, 3},
671 {-1, -1},
672};
673
674static const s8
675dm365_queue_priority_mapping[][2] = {
676 /* {event queue no, Priority} */
677 {0, 7},
678 {1, 7},
679 {2, 7},
680 {3, 0},
681 {-1, -1},
682};
683
684static struct edma_soc_info dm365_edma_info[] = {
685 {
686 .n_channel = 64,
687 .n_region = 4,
688 .n_slot = 256,
689 .n_tc = 4,
690 .n_cc = 1,
691 .queue_tc_mapping = dm365_queue_tc_mapping,
692 .queue_priority_mapping = dm365_queue_priority_mapping,
693 },
694};
695
696static struct resource edma_resources[] = {
697 {
698 .name = "edma_cc0",
699 .start = 0x01c00000,
700 .end = 0x01c00000 + SZ_64K - 1,
701 .flags = IORESOURCE_MEM,
702 },
703 {
704 .name = "edma_tc0",
705 .start = 0x01c10000,
706 .end = 0x01c10000 + SZ_1K - 1,
707 .flags = IORESOURCE_MEM,
708 },
709 {
710 .name = "edma_tc1",
711 .start = 0x01c10400,
712 .end = 0x01c10400 + SZ_1K - 1,
713 .flags = IORESOURCE_MEM,
714 },
715 {
716 .name = "edma_tc2",
717 .start = 0x01c10800,
718 .end = 0x01c10800 + SZ_1K - 1,
719 .flags = IORESOURCE_MEM,
720 },
721 {
722 .name = "edma_tc3",
723 .start = 0x01c10c00,
724 .end = 0x01c10c00 + SZ_1K - 1,
725 .flags = IORESOURCE_MEM,
726 },
727 {
728 .name = "edma0",
729 .start = IRQ_CCINT0,
730 .flags = IORESOURCE_IRQ,
731 },
732 {
733 .name = "edma0_err",
734 .start = IRQ_CCERRINT,
735 .flags = IORESOURCE_IRQ,
736 },
737 /* not using TC*_ERR */
738};
739
740static struct platform_device dm365_edma_device = {
741 .name = "edma",
742 .id = 0,
743 .dev.platform_data = dm365_edma_info,
744 .num_resources = ARRAY_SIZE(edma_resources),
745 .resource = edma_resources,
746};
747
663static struct map_desc dm365_io_desc[] = { 748static struct map_desc dm365_io_desc[] = {
664 { 749 {
665 .virtual = IO_VIRT, 750 .virtual = IO_VIRT,
@@ -763,6 +848,8 @@ static int __init dm365_init_devices(void)
763 if (!cpu_is_davinci_dm365()) 848 if (!cpu_is_davinci_dm365())
764 return 0; 849 return 0;
765 850
851 davinci_cfg_reg(DM365_INT_EDMA_CC);
852 platform_device_register(&dm365_edma_device);
766 platform_device_register(&dm365_emac_device); 853 platform_device_register(&dm365_emac_device);
767 854
768 return 0; 855 return 0;