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authorMark A. Greer <mgreer@animalcreek.com>2012-12-21 11:28:10 -0500
committerPaul Walmsley <paul@pwsan.com>2013-03-30 17:51:48 -0400
commit14ae5564eb9c252319a4dba5aef0a66ad5eaff56 (patch)
tree5cd08477a8d84ae4866e3ebf965f504b3730dbae
parent660ffd6ba2405ed7ff614ab73f282e056c47d8f6 (diff)
ARM: OMAP3xxx: hwmod: Convert AES crypto device data to hwmod
Convert the device data for the OMAP3 AES crypto IP from explicit platform_data to hwmod. CC: Paul Walmsley <paul@pwsan.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> [paul@pwsan.com: fixed lines causing sparse warnings] Signed-off-by: Paul Walmsley <paul@pwsan.com>
-rw-r--r--arch/arm/mach-omap2/cclock3xxx_data.c1
-rw-r--r--arch/arm/mach-omap2/devices.c42
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_3xxx_data.c73
3 files changed, 72 insertions, 44 deletions
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
index 55b50895503e..45cd26430d1f 100644
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ b/arch/arm/mach-omap2/cclock3xxx_data.c
@@ -3471,6 +3471,7 @@ static struct omap_clk omap3xxx_clks[] = {
3471 CLK("usbhs_tll", "usb_tll_hs_usb_ch1_clk", &dummy_ck), 3471 CLK("usbhs_tll", "usb_tll_hs_usb_ch1_clk", &dummy_ck),
3472 CLK(NULL, "init_60m_fclk", &dummy_ck), 3472 CLK(NULL, "init_60m_fclk", &dummy_ck),
3473 CLK(NULL, "gpt1_fck", &gpt1_fck), 3473 CLK(NULL, "gpt1_fck", &gpt1_fck),
3474 CLK(NULL, "aes2_ick", &aes2_ick),
3474 CLK(NULL, "wkup_32k_fck", &wkup_32k_fck), 3475 CLK(NULL, "wkup_32k_fck", &wkup_32k_fck),
3475 CLK(NULL, "gpio1_dbck", &gpio1_dbck), 3476 CLK(NULL, "gpio1_dbck", &gpio1_dbck),
3476 CLK(NULL, "sha12_ick", &sha12_ick), 3477 CLK(NULL, "sha12_ick", &sha12_ick),
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c
index c4c7d1d70158..19bc1c1795f7 100644
--- a/arch/arm/mach-omap2/devices.c
+++ b/arch/arm/mach-omap2/devices.c
@@ -517,38 +517,9 @@ static void __init omap_init_sham(void)
517 WARN(IS_ERR(pdev), "Can't build omap_device for omap-sham\n"); 517 WARN(IS_ERR(pdev), "Can't build omap_device for omap-sham\n");
518} 518}
519 519
520#if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE) 520static void __init omap_init_aes(void)
521
522#ifdef CONFIG_ARCH_OMAP3
523static struct resource omap3_aes_resources[] = {
524 {
525 .start = OMAP34XX_SEC_AES_BASE,
526 .end = OMAP34XX_SEC_AES_BASE + 0x4C,
527 .flags = IORESOURCE_MEM,
528 },
529 {
530 .start = OMAP34XX_DMA_AES2_TX,
531 .flags = IORESOURCE_DMA,
532 },
533 {
534 .start = OMAP34XX_DMA_AES2_RX,
535 .flags = IORESOURCE_DMA,
536 }
537};
538static int omap3_aes_resources_sz = ARRAY_SIZE(omap3_aes_resources);
539#else
540#define omap3_aes_resources NULL
541#define omap3_aes_resources_sz 0
542#endif
543
544static struct platform_device aes_device = {
545 .name = "omap-aes",
546 .id = -1,
547};
548
549static void omap_init_aes(void)
550{ 521{
551 if (cpu_is_omap24xx()) { 522 if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
552 struct omap_hwmod *oh; 523 struct omap_hwmod *oh;
553 struct platform_device *pdev; 524 struct platform_device *pdev;
554 525
@@ -558,20 +529,11 @@ static void omap_init_aes(void)
558 529
559 pdev = omap_device_build("omap-aes", -1, oh, NULL, 0); 530 pdev = omap_device_build("omap-aes", -1, oh, NULL, 0);
560 WARN(IS_ERR(pdev), "Can't build omap_device for omap-aes\n"); 531 WARN(IS_ERR(pdev), "Can't build omap_device for omap-aes\n");
561 } else if (cpu_is_omap34xx()) {
562 aes_device.resource = omap3_aes_resources;
563 aes_device.num_resources = omap3_aes_resources_sz;
564 platform_device_register(&aes_device);
565 } else { 532 } else {
566 pr_err("%s: platform not supported\n", __func__); 533 pr_err("%s: platform not supported\n", __func__);
567 return;
568 } 534 }
569} 535}
570 536
571#else
572static inline void omap_init_aes(void) { }
573#endif
574
575/*-------------------------------------------------------------------------*/ 537/*-------------------------------------------------------------------------*/
576 538
577#if defined(CONFIG_VIDEO_OMAP2_VOUT) || \ 539#if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
index f01fe0795e69..85c917cb193d 100644
--- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
@@ -3610,6 +3610,67 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__sham = {
3610 .user = OCP_USER_MPU | OCP_USER_SDMA, 3610 .user = OCP_USER_MPU | OCP_USER_SDMA,
3611}; 3611};
3612 3612
3613/* l4_core -> AES */
3614static struct omap_hwmod_sysc_fields omap3xxx_aes_sysc_fields = {
3615 .sidle_shift = 6,
3616 .srst_shift = 1,
3617 .autoidle_shift = 0,
3618};
3619
3620static struct omap_hwmod_class_sysconfig omap3_aes_sysc = {
3621 .rev_offs = 0x44,
3622 .sysc_offs = 0x48,
3623 .syss_offs = 0x4c,
3624 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
3625 SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
3626 .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
3627 .sysc_fields = &omap3xxx_aes_sysc_fields,
3628};
3629
3630static struct omap_hwmod_class omap3xxx_aes_class = {
3631 .name = "aes",
3632 .sysc = &omap3_aes_sysc,
3633};
3634
3635static struct omap_hwmod_dma_info omap3_aes_sdma_reqs[] = {
3636 { .name = "tx", .dma_req = OMAP34XX_DMA_AES2_TX, },
3637 { .name = "rx", .dma_req = OMAP34XX_DMA_AES2_RX, },
3638 { .dma_req = -1 }
3639};
3640
3641static struct omap_hwmod omap3xxx_aes_hwmod = {
3642 .name = "aes",
3643 .sdma_reqs = omap3_aes_sdma_reqs,
3644 .main_clk = "aes2_ick",
3645 .prcm = {
3646 .omap2 = {
3647 .module_offs = CORE_MOD,
3648 .prcm_reg_id = 1,
3649 .module_bit = OMAP3430_EN_AES2_SHIFT,
3650 .idlest_reg_id = 1,
3651 .idlest_idle_bit = OMAP3430_ST_AES2_SHIFT,
3652 },
3653 },
3654 .class = &omap3xxx_aes_class,
3655};
3656
3657static struct omap_hwmod_addr_space omap3xxx_aes_addrs[] = {
3658 {
3659 .pa_start = 0x480c5000,
3660 .pa_end = 0x480c5000 + 0x50 - 1,
3661 .flags = ADDR_TYPE_RT
3662 },
3663 { }
3664};
3665
3666static struct omap_hwmod_ocp_if omap3xxx_l4_core__aes = {
3667 .master = &omap3xxx_l4_core_hwmod,
3668 .slave = &omap3xxx_aes_hwmod,
3669 .clk = "aes2_ick",
3670 .addr = omap3xxx_aes_addrs,
3671 .user = OCP_USER_MPU | OCP_USER_SDMA,
3672};
3673
3613static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = { 3674static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = {
3614 &omap3xxx_l3_main__l4_core, 3675 &omap3xxx_l3_main__l4_core,
3615 &omap3xxx_l3_main__l4_per, 3676 &omap3xxx_l3_main__l4_per,
@@ -3664,25 +3725,29 @@ static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = {
3664static struct omap_hwmod_ocp_if *omap34xx_gp_hwmod_ocp_ifs[] __initdata = { 3725static struct omap_hwmod_ocp_if *omap34xx_gp_hwmod_ocp_ifs[] __initdata = {
3665 &omap3xxx_l4_sec__timer12, 3726 &omap3xxx_l4_sec__timer12,
3666 &omap3xxx_l4_core__sham, 3727 &omap3xxx_l4_core__sham,
3728 &omap3xxx_l4_core__aes,
3667 NULL 3729 NULL
3668}; 3730};
3669 3731
3670static struct omap_hwmod_ocp_if *omap36xx_gp_hwmod_ocp_ifs[] __initdata = { 3732static struct omap_hwmod_ocp_if *omap36xx_gp_hwmod_ocp_ifs[] __initdata = {
3671 &omap3xxx_l4_sec__timer12, 3733 &omap3xxx_l4_sec__timer12,
3672 &omap3xxx_l4_core__sham, 3734 &omap3xxx_l4_core__sham,
3735 &omap3xxx_l4_core__aes,
3673 NULL 3736 NULL
3674}; 3737};
3675 3738
3676static struct omap_hwmod_ocp_if *am35xx_gp_hwmod_ocp_ifs[] __initdata = { 3739static struct omap_hwmod_ocp_if *am35xx_gp_hwmod_ocp_ifs[] __initdata = {
3677 &omap3xxx_l4_sec__timer12, 3740 &omap3xxx_l4_sec__timer12,
3678 /* 3741 /*
3679 * Apparently the SHA/MD5 accelerator IP block is only present 3742 * Apparently the SHA/MD5 and AES accelerator IP blocks are
3680 * on some AM35xx chips, and no one knows which ones. See 3743 * only present on some AM35xx chips, and no one knows which
3744 * ones. See
3681 * http://www.spinics.net/lists/arm-kernel/msg215466.html So 3745 * http://www.spinics.net/lists/arm-kernel/msg215466.html So
3682 * if you need this IP block on an AM35xx, try uncommenting 3746 * if you need these IP blocks on an AM35xx, try uncommenting
3683 * the next line. 3747 * the following lines.
3684 */ 3748 */
3685 /* &omap3xxx_l4_core__sham, */ 3749 /* &omap3xxx_l4_core__sham, */
3750 /* &omap3xxx_l4_core__aes, */
3686 NULL 3751 NULL
3687}; 3752};
3688 3753