thermal: samsung: Add TMU support for Exynos5420 SoCs

Exynos5420 has 5 TMU channels, the TRIMINFO register is
misplaced for TMU channels 2, 3 and 4
TRIMINFO at 0x1006c000 contains data for TMU channel 3
TRIMINFO at 0x100a0000 contains data for TMU channel 4
TRIMINFO at 0x10068000 contains data for TMU channel 2

This patch
1 Adds the neccessary register changes and arch information
   to support Exynos5420 SoCs.
2. Handles the gate clock for misplaced TRIMINFO register
3. Updates the Documentation at
   Documentation/devicetree/bindings/thermal/exynos-thermal.txt

Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Amit Daniel Kachhap <amit.daniel@samsung.com>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>

5 files changed, 200 insertions, 5 deletions

diff --git a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
index a1aa6023d248..79c4055a190d 100644
--- a/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
+++ b/Documentation/devicetree/bindings/thermal/exynos-thermal.txt
@@ -6,6 +6,9 @@
                "samsung,exynos4412-tmu"
                "samsung,exynos4210-tmu"
                "samsung,exynos5250-tmu"
+               "samsung,exynos5420-tmu" for TMU channel 0, 1 on Exynos5420
+               "samsung,exynos5420-tmu-ext-triminfo" for TMU channels 2, 3 and 4
+                        Exynos5420 (Must pass triminfo base and triminfo clock)
                "samsung,exynos5440-tmu"
 - interrupt-parent : The phandle for the interrupt controller
 - reg : Address range of the thermal registers. For soc's which has multiple
@@ -13,9 +16,24 @@
         interrupt related then 2 set of register has to supplied. First set
         belongs to register set of TMU instance and second set belongs to
         registers shared with the TMU instance.
+
+  NOTE: On Exynos5420, the TRIMINFO register is misplaced for TMU
+        channels 2, 3 and 4
+        Use "samsung,exynos5420-tmu-ext-triminfo" in cases, there is a misplaced
+        register, also provide clock to access that base.
+
+        TRIMINFO at 0x1006c000 contains data for TMU channel 3
+        TRIMINFO at 0x100a0000 contains data for TMU channel 4
+        TRIMINFO at 0x10068000 contains data for TMU channel 2
+
 - interrupts : Should contain interrupt for thermal system
-- clocks : The main clock for TMU device
+- clocks : The main clocks for TMU device
+        -- 1. operational clock for TMU channel
+        -- 2. optional clock to access the shared registers of TMU channel
 - clock-names : Thermal system clock name
+        -- "tmu_apbif" operational clock for current TMU channel
+        -- "tmu_triminfo_apbif" clock to access the shared triminfo register
+                for current TMU channel
 - vtmu-supply: This entry is optional and provides the regulator node supplying
                 voltage to TMU. If needed this entry can be placed inside
                 board/platform specific dts file.
@@ -43,6 +61,31 @@ Example 2):
                 clock-names = "tmu_apbif";
         };
 
+Example 3): (In case of Exynos5420 "with misplaced TRIMINFO register")
+        tmu_cpu2: tmu@10068000 {
+                compatible = "samsung,exynos5420-tmu-ext-triminfo";
+                reg = <0x10068000 0x100>, <0x1006c000 0x4>;
+                interrupts = <0 184 0>;
+                clocks = <&clock 318>, <&clock 318>;
+                clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+        };
+
+        tmu_cpu3: tmu@1006c000 {
+                compatible = "samsung,exynos5420-tmu-ext-triminfo";
+                reg = <0x1006c000 0x100>, <0x100a0000 0x4>;
+                interrupts = <0 185 0>;
+                clocks = <&clock 318>, <&clock 319>;
+                clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+        };
+
+        tmu_gpu: tmu@100a0000 {
+                compatible = "samsung,exynos5420-tmu-ext-triminfo";
+                reg = <0x100a0000 0x100>, <0x10068000 0x4>;
+                interrupts = <0 215 0>;
+                clocks = <&clock 319>, <&clock 318>;
+                clock-names = "tmu_apbif", "tmu_triminfo_apbif";
+        };
+
 Note: For multi-instance tmu each instance should have an alias correctly
 numbered in "aliases" node.
 
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index d9e7663fea8c..bc50912a222d 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -47,6 +47,7 @@
  * @irq_work: pointer to the irq work structure.
  * @lock: lock to implement synchronization.
  * @clk: pointer to the clock structure.
+ * @clk_sec: pointer to the clock structure for accessing the base_second.
  * @temp_error1: fused value of the first point trim.
  * @temp_error2: fused value of the second point trim.
  * @regulator: pointer to the TMU regulator structure.
@@ -61,7 +62,7 @@ struct exynos_tmu_data {
         enum soc_type soc;
         struct work_struct irq_work;
         struct mutex lock;
-        struct clk *clk;
+        struct clk *clk, *clk_sec;
         u8 temp_error1, temp_error2;
         struct regulator *regulator;
         struct thermal_sensor_conf *reg_conf;
@@ -152,6 +153,8 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
 
         mutex_lock(&data->lock);
         clk_enable(data->clk);
+        if (!IS_ERR(data->clk_sec))
+                clk_enable(data->clk_sec);
 
         if (TMU_SUPPORTS(pdata, READY_STATUS)) {
                 status = readb(data->base + reg->tmu_status);
@@ -186,7 +189,12 @@ static int exynos_tmu_initialize(struct platform_device *pdev)
                         EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
                 }
         } else {
-                trim_info = readl(data->base + reg->triminfo_data);
+                /* On exynos5420 the triminfo register is in the shared space */
+                if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO)
+                        trim_info = readl(data->base_second +
+                                                        reg->triminfo_data);
+                else
+                        trim_info = readl(data->base + reg->triminfo_data);
         }
         data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
         data->temp_error2 = ((trim_info >> reg->triminfo_85_shift) &
@@ -302,6 +310,8 @@ skip_calib_data:
 out:
         clk_disable(data->clk);
         mutex_unlock(&data->lock);
+        if (!IS_ERR(data->clk_sec))
+                clk_disable(data->clk_sec);
 
         return ret;
 }
@@ -453,12 +463,16 @@ static void exynos_tmu_work(struct work_struct *work)
         const struct exynos_tmu_registers *reg = pdata->registers;
         unsigned int val_irq, val_type;
 
+        if (!IS_ERR(data->clk_sec))
+                clk_enable(data->clk_sec);
         /* Find which sensor generated this interrupt */
         if (reg->tmu_irqstatus) {
                 val_type = readl(data->base_second + reg->tmu_irqstatus);
                 if (!((val_type >> data->id) & 0x1))
                         goto out;
         }
+        if (!IS_ERR(data->clk_sec))
+                clk_disable(data->clk_sec);
 
         exynos_report_trigger(data->reg_conf);
         mutex_lock(&data->lock);
@@ -499,6 +513,14 @@ static const struct of_device_id exynos_tmu_match[] = {