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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2012-02-14 13:22:20 -0500
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2012-02-16 00:15:03 -0500
commit13635dfdc6aa8d2890e02dc441decfcb4ae63e14 (patch)
tree817d08d8b06183bccb28e0c829213f1fceab3b3a
parent40c8cefaaf12734327db7199a56e60058d98e7b6 (diff)
powerpc/fsl/pci: Fix PCIe fixup regression
Upstream changes to the way PHB resources are registered broke the resource fixup for FSL boards. We can no longer rely on the resource pointer array for the PHB's pci_bus structure, so let's leave it alone and go straight for the PHB resources instead. This also makes the code generally more readable. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c48
1 files changed, 29 insertions, 19 deletions
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 30eb17ecad49..6073288fed29 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -385,26 +385,36 @@ static void __init setup_pci_cmd(struct pci_controller *hose)
385void fsl_pcibios_fixup_bus(struct pci_bus *bus) 385void fsl_pcibios_fixup_bus(struct pci_bus *bus)
386{ 386{
387 struct pci_controller *hose = pci_bus_to_host(bus); 387 struct pci_controller *hose = pci_bus_to_host(bus);
388 int i; 388 int i, is_pcie = 0, no_link;
389 389
390 if ((bus->parent == hose->bus) && 390 /* The root complex bridge comes up with bogus resources,
391 ((fsl_pcie_bus_fixup && 391 * we copy the PHB ones in.
392 early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP)) || 392 *
393 (hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK))) 393 * With the current generic PCI code, the PHB bus no longer
394 { 394 * has bus->resource[0..4] set, so things are a bit more
395 for (i = 0; i < 4; ++i) { 395 * tricky.
396 */
397
398 if (fsl_pcie_bus_fixup)
399 is_pcie = early_find_capability(hose, 0, 0, PCI_CAP_ID_EXP);
400 no_link = !!(hose->indirect_type & PPC_INDIRECT_TYPE_NO_PCIE_LINK);
401
402 if (bus->parent == hose->bus && (is_pcie || no_link)) {
403 for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; ++i) {
396 struct resource *res = bus->resource[i]; 404 struct resource *res = bus->resource[i];
397 struct resource *par = bus->parent->resource[i]; 405 struct resource *par;
398 if (res) { 406
399 res->start = 0; 407 if (!res)
400 res->end = 0; 408 continue;
401 res->flags = 0; 409 if (i == 0)
402 } 410 par = &hose->io_resource;
403 if (res && par) { 411 else if (i < 4)
404 res->start = par->start; 412 par = &hose->mem_resources[i-1];
405 res->end = par->end; 413 else par = NULL;
406 res->flags = par->flags; 414
407 } 415 res->start = par ? par->start : 0;
416 res->end = par ? par->end : 0;
417 res->flags = par ? par->flags : 0;
408 } 418 }
409 } 419 }
410} 420}