diff options
author | Rajendra Nayak <rnayak@ti.com> | 2014-09-10 12:04:04 -0400 |
---|---|---|
committer | Tony Lindgren <tony@atomide.com> | 2014-09-18 12:47:35 -0400 |
commit | 1306c08a7cd7e6136490ab2bc728d2c39741003e (patch) | |
tree | 79fc38c36e5f3140aa4dabe6e65ccdcebaa7f93f | |
parent | 8b9a2810b02e3d9806ba2bf307c8e8dcedaf902d (diff) |
ARM: OMAP4+: Remove static iotable mappings for SRAM
In order to handle errata I688, a page of sram was reserved by doing a
static iotable map. Now that we use gen_pool to manage sram, we can
completely remove all of these static mappings and use gen_pool_alloc()
to get the one page of sram space needed to implement errata I688.
omap_bus_sync will be NOP until SRAM initialization happens.
Suggested-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r-- | Documentation/devicetree/bindings/arm/omap/mpu.txt | 3 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap4.dtsi | 1 | ||||
-rw-r--r-- | arch/arm/boot/dts/omap5.dtsi | 3 | ||||
-rw-r--r-- | arch/arm/mach-omap2/io.c | 17 | ||||
-rw-r--r-- | arch/arm/mach-omap2/omap4-common.c | 22 | ||||
-rw-r--r-- | arch/arm/mach-omap2/sram.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-omap2/sram.h | 6 |
7 files changed, 27 insertions, 31 deletions
diff --git a/Documentation/devicetree/bindings/arm/omap/mpu.txt b/Documentation/devicetree/bindings/arm/omap/mpu.txt index 83f405bde138..763695db2bd9 100644 --- a/Documentation/devicetree/bindings/arm/omap/mpu.txt +++ b/Documentation/devicetree/bindings/arm/omap/mpu.txt | |||
@@ -10,6 +10,9 @@ Required properties: | |||
10 | Should be "ti,omap5-mpu" for OMAP5 | 10 | Should be "ti,omap5-mpu" for OMAP5 |
11 | - ti,hwmods: "mpu" | 11 | - ti,hwmods: "mpu" |
12 | 12 | ||
13 | Optional properties: | ||
14 | - sram: Phandle to the ocmcram node | ||
15 | |||
13 | Examples: | 16 | Examples: |
14 | 17 | ||
15 | - For an OMAP5 SMP system: | 18 | - For an OMAP5 SMP system: |
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi index e54992f0bf27..8a944974d72e 100644 --- a/arch/arm/boot/dts/omap4.dtsi +++ b/arch/arm/boot/dts/omap4.dtsi | |||
@@ -81,6 +81,7 @@ | |||
81 | mpu { | 81 | mpu { |
82 | compatible = "ti,omap4-mpu"; | 82 | compatible = "ti,omap4-mpu"; |
83 | ti,hwmods = "mpu"; | 83 | ti,hwmods = "mpu"; |
84 | sram = <&ocmcram>; | ||
84 | }; | 85 | }; |
85 | 86 | ||
86 | dsp { | 87 | dsp { |
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index 779d4da19f3b..4a6091d717b5 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi | |||
@@ -104,8 +104,9 @@ | |||
104 | soc { | 104 | soc { |
105 | compatible = "ti,omap-infra"; | 105 | compatible = "ti,omap-infra"; |
106 | mpu { | 106 | mpu { |
107 | compatible = "ti,omap5-mpu"; | 107 | compatible = "ti,omap4-mpu"; |
108 | ti,hwmods = "mpu"; | 108 | ti,hwmods = "mpu"; |
109 | sram = <&ocmcram>; | ||
109 | }; | 110 | }; |
110 | }; | 111 | }; |
111 | 112 | ||
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 831805e40529..b8ad045bcb8d 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
@@ -231,15 +231,6 @@ static struct map_desc omap44xx_io_desc[] __initdata = { | |||
231 | .length = L4_PER_44XX_SIZE, | 231 | .length = L4_PER_44XX_SIZE, |
232 | .type = MT_DEVICE, | 232 | .type = MT_DEVICE, |
233 | }, | 233 | }, |
234 | #ifdef CONFIG_OMAP4_ERRATA_I688 | ||
235 | { | ||
236 | .virtual = OMAP4_SRAM_VA, | ||
237 | .pfn = __phys_to_pfn(OMAP4_SRAM_PA), | ||
238 | .length = PAGE_SIZE, | ||
239 | .type = MT_MEMORY_RW_SO, | ||
240 | }, | ||
241 | #endif | ||
242 | |||
243 | }; | 234 | }; |
244 | #endif | 235 | #endif |
245 | 236 | ||
@@ -269,14 +260,6 @@ static struct map_desc omap54xx_io_desc[] __initdata = { | |||
269 | .length = L4_PER_54XX_SIZE, | 260 | .length = L4_PER_54XX_SIZE, |
270 | .type = MT_DEVICE, | 261 | .type = MT_DEVICE, |
271 | }, | 262 | }, |
272 | #ifdef CONFIG_OMAP4_ERRATA_I688 | ||
273 | { | ||
274 | .virtual = OMAP4_SRAM_VA, | ||
275 | .pfn = __phys_to_pfn(OMAP4_SRAM_PA), | ||
276 | .length = PAGE_SIZE, | ||
277 | .type = MT_MEMORY_RW_SO, | ||
278 | }, | ||
279 | #endif | ||
280 | }; | 263 | }; |
281 | #endif | 264 | #endif |
282 | 265 | ||
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index a0fe747634c1..16b20cedc38d 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/irqchip/irq-crossbar.h> | 25 | #include <linux/irqchip/irq-crossbar.h> |
26 | #include <linux/of_address.h> | 26 | #include <linux/of_address.h> |
27 | #include <linux/reboot.h> | 27 | #include <linux/reboot.h> |
28 | #include <linux/genalloc.h> | ||
28 | 29 | ||
29 | #include <asm/hardware/cache-l2x0.h> | 30 | #include <asm/hardware/cache-l2x0.h> |
30 | #include <asm/mach/map.h> | 31 | #include <asm/mach/map.h> |
@@ -71,6 +72,26 @@ void omap_bus_sync(void) | |||
71 | } | 72 | } |
72 | EXPORT_SYMBOL(omap_bus_sync); | 73 | EXPORT_SYMBOL(omap_bus_sync); |
73 | 74 | ||
75 | static int __init omap4_sram_init(void) | ||
76 | { | ||
77 | struct device_node *np; | ||
78 | struct gen_pool *sram_pool; | ||
79 | |||
80 | np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu"); | ||
81 | if (!np) | ||
82 | pr_warn("%s:Unable to allocate sram needed to handle errata I688\n", | ||
83 | __func__); | ||
84 | sram_pool = of_get_named_gen_pool(np, "sram", 0); | ||
85 | if (!sram_pool) | ||
86 | pr_warn("%s:Unable to get sram pool needed to handle errata I688\n", | ||
87 | __func__); | ||
88 | else | ||
89 | sram_sync = (void *)gen_pool_alloc(sram_pool, PAGE_SIZE); | ||
90 | |||
91 | return 0; | ||
92 | } | ||
93 | omap_arch_initcall(omap4_sram_init); | ||
94 | |||
74 | /* Steal one page physical memory for barrier implementation */ | 95 | /* Steal one page physical memory for barrier implementation */ |
75 | int __init omap_barrier_reserve_memblock(void) | 96 | int __init omap_barrier_reserve_memblock(void) |
76 | { | 97 | { |
@@ -91,7 +112,6 @@ void __init omap_barriers_init(void) | |||
91 | dram_io_desc[0].type = MT_MEMORY_RW_SO; | 112 | dram_io_desc[0].type = MT_MEMORY_RW_SO; |
92 | iotable_init(dram_io_desc, ARRAY_SIZE(dram_io_desc)); | 113 | iotable_init(dram_io_desc, ARRAY_SIZE(dram_io_desc)); |
93 | dram_sync = (void __iomem *) dram_io_desc[0].virtual; | 114 | dram_sync = (void __iomem *) dram_io_desc[0].virtual; |
94 | sram_sync = (void __iomem *) OMAP4_SRAM_VA; | ||
95 | 115 | ||
96 | pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n", | 116 | pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n", |
97 | (long long) paddr, dram_io_desc[0].virtual); | 117 | (long long) paddr, dram_io_desc[0].virtual); |
diff --git a/arch/arm/mach-omap2/sram.c b/arch/arm/mach-omap2/sram.c index e5ac29d69810..cd488b80ba36 100644 --- a/arch/arm/mach-omap2/sram.c +++ b/arch/arm/mach-omap2/sram.c | |||
@@ -124,12 +124,6 @@ static void __init omap2_map_sram(void) | |||
124 | { | 124 | { |
125 | int cached = 1; | 125 | int cached = 1; |
126 | 126 | ||
127 | #ifdef CONFIG_OMAP4_ERRATA_I688 | ||
128 | if (cpu_is_omap44xx()) { | ||
129 | omap_sram_start += PAGE_SIZE; | ||
130 | omap_sram_size -= SZ_16K; | ||
131 | } | ||
132 | #endif | ||
133 | if (cpu_is_omap34xx()) { | 127 | if (cpu_is_omap34xx()) { |
134 | /* | 128 | /* |
135 | * SRAM must be marked as non-cached on OMAP3 since the | 129 | * SRAM must be marked as non-cached on OMAP3 since the |
diff --git a/arch/arm/mach-omap2/sram.h b/arch/arm/mach-omap2/sram.h index 3f83b802dbb2..948d3edefc38 100644 --- a/arch/arm/mach-omap2/sram.h +++ b/arch/arm/mach-omap2/sram.h | |||
@@ -74,9 +74,3 @@ static inline void omap_push_sram_idle(void) {} | |||
74 | */ | 74 | */ |
75 | #define OMAP2_SRAM_PA 0x40200000 | 75 | #define OMAP2_SRAM_PA 0x40200000 |
76 | #define OMAP3_SRAM_PA 0x40200000 | 76 | #define OMAP3_SRAM_PA 0x40200000 |
77 | #ifdef CONFIG_OMAP4_ERRATA_I688 | ||
78 | #define OMAP4_SRAM_PA 0x40304000 | ||
79 | #define OMAP4_SRAM_VA 0xfe404000 | ||
80 | #else | ||
81 | #define OMAP4_SRAM_PA 0x40300000 | ||
82 | #endif | ||