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authorPhilippe Begnic <philippe.begnic@st.com>2013-05-27 08:41:29 -0400
committerMike Turquette <mturquette@linaro.org>2013-06-06 21:16:04 -0400
commit1237e598a94b5a44a0162a4f4534d18ef8a81a7d (patch)
tree819febac1b0cc844509deedd3068977a43e93f58
parent88235988d7ff394f77c0a5a8a9803962d0026ef1 (diff)
clk: ux500: Pass clock base adresses in initcall for u8540 and u9540
Align on u8500 version, pass clock base address in clk_init functions for u8540 and u9540. Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Philippe Begnic <philippe.begnic@st.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
-rw-r--r--arch/arm/mach-ux500/cpu.c6
-rw-r--r--drivers/clk/ux500/u8540_clk.c4
-rw-r--r--drivers/clk/ux500/u9540_clk.c4
-rw-r--r--include/linux/platform_data/clk-ux500.h6
4 files changed, 12 insertions, 8 deletions
diff --git a/arch/arm/mach-ux500/cpu.c b/arch/arm/mach-ux500/cpu.c
index b6145ea51641..e6fb0239151b 100644
--- a/arch/arm/mach-ux500/cpu.c
+++ b/arch/arm/mach-ux500/cpu.c
@@ -76,13 +76,15 @@ void __init ux500_init_irq(void)
76 } else if (cpu_is_u9540()) { 76 } else if (cpu_is_u9540()) {
77 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1); 77 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K - 1);
78 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1); 78 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K - 1);
79 u8500_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE, 79 u9540_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
80 U8500_CLKRST3_BASE, U8500_CLKRST5_BASE, 80 U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
81 U8500_CLKRST6_BASE); 81 U8500_CLKRST6_BASE);
82 } else if (cpu_is_u8540()) { 82 } else if (cpu_is_u8540()) {
83 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1); 83 prcmu_early_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1);
84 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1); 84 ux500_pm_init(U8500_PRCMU_BASE, SZ_8K + SZ_4K - 1);
85 u8540_clk_init(); 85 u8540_clk_init(U8500_CLKRST1_BASE, U8500_CLKRST2_BASE,
86 U8500_CLKRST3_BASE, U8500_CLKRST5_BASE,
87 U8500_CLKRST6_BASE);
86 } 88 }
87} 89}
88 90
diff --git a/drivers/clk/ux500/u8540_clk.c b/drivers/clk/ux500/u8540_clk.c
index 10adfd2ead21..90f3c88694b9 100644
--- a/drivers/clk/ux500/u8540_clk.c
+++ b/drivers/clk/ux500/u8540_clk.c
@@ -12,10 +12,10 @@
12#include <linux/clk-provider.h> 12#include <linux/clk-provider.h>
13#include <linux/mfd/dbx500-prcmu.h> 13#include <linux/mfd/dbx500-prcmu.h>
14#include <linux/platform_data/clk-ux500.h> 14#include <linux/platform_data/clk-ux500.h>
15
16#include "clk.h" 15#include "clk.h"
17 16
18void u8540_clk_init(void) 17void u8540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
18 u32 clkrst5_base, u32 clkrst6_base)
19{ 19{
20 /* register clocks here */ 20 /* register clocks here */
21} 21}
diff --git a/drivers/clk/ux500/u9540_clk.c b/drivers/clk/ux500/u9540_clk.c
index dbc0191e16c8..44794782e7e0 100644
--- a/drivers/clk/ux500/u9540_clk.c
+++ b/drivers/clk/ux500/u9540_clk.c
@@ -12,10 +12,10 @@
12#include <linux/clk-provider.h> 12#include <linux/clk-provider.h>
13#include <linux/mfd/dbx500-prcmu.h> 13#include <linux/mfd/dbx500-prcmu.h>
14#include <linux/platform_data/clk-ux500.h> 14#include <linux/platform_data/clk-ux500.h>
15
16#include "clk.h" 15#include "clk.h"
17 16
18void u9540_clk_init(void) 17void u9540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
18 u32 clkrst5_base, u32 clkrst6_base)
19{ 19{
20 /* register clocks here */ 20 /* register clocks here */
21} 21}
diff --git a/include/linux/platform_data/clk-ux500.h b/include/linux/platform_data/clk-ux500.h
index 320d9c39ea0a..9d98f3aaa16c 100644
--- a/include/linux/platform_data/clk-ux500.h
+++ b/include/linux/platform_data/clk-ux500.h
@@ -12,7 +12,9 @@
12 12
13void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base, 13void u8500_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
14 u32 clkrst5_base, u32 clkrst6_base); 14 u32 clkrst5_base, u32 clkrst6_base);
15void u9540_clk_init(void); 15void u9540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
16void u8540_clk_init(void); 16 u32 clkrst5_base, u32 clkrst6_base);
17void u8540_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
18 u32 clkrst5_base, u32 clkrst6_base);
17 19
18#endif /* __CLK_UX500_H */ 20#endif /* __CLK_UX500_H */