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authorJoe Perches <joe@perches.com>2008-03-23 04:02:00 -0400
committerIngo Molnar <mingo@elte.hu>2008-04-17 11:41:22 -0400
commit113cbebac7c88ce78a48801e159108ce6c9d1fb3 (patch)
treebf3d7378b2242c9e120f4f402944b9445b372895
parent925a09b27fc73593eb705e50e6db86c4a22091db (diff)
include/asm-x86/dma.h: checkpatch cleanups - formatting only
Signed-off-by: Joe Perches <joe@perches.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
-rw-r--r--include/asm-x86/dma.h45
1 files changed, 22 insertions, 23 deletions
diff --git a/include/asm-x86/dma.h b/include/asm-x86/dma.h
index e9733ce89880..ca1098a7e580 100644
--- a/include/asm-x86/dma.h
+++ b/include/asm-x86/dma.h
@@ -12,7 +12,6 @@
12#include <asm/io.h> /* need byte IO */ 12#include <asm/io.h> /* need byte IO */
13#include <linux/delay.h> 13#include <linux/delay.h>
14 14
15
16#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER 15#ifdef HAVE_REALLY_SLOW_DMA_CONTROLLER
17#define dma_outb outb_p 16#define dma_outb outb_p
18#else 17#else
@@ -74,15 +73,15 @@
74#ifdef CONFIG_X86_32 73#ifdef CONFIG_X86_32
75 74
76/* The maximum address that we can perform a DMA transfer to on this platform */ 75/* The maximum address that we can perform a DMA transfer to on this platform */
77#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x1000000) 76#define MAX_DMA_ADDRESS (PAGE_OFFSET + 0x1000000)
78 77
79#else 78#else
80 79
81/* 16MB ISA DMA zone */ 80/* 16MB ISA DMA zone */
82#define MAX_DMA_PFN ((16*1024*1024) >> PAGE_SHIFT) 81#define MAX_DMA_PFN ((16 * 1024 * 1024) >> PAGE_SHIFT)
83 82
84/* 4GB broken PCI/AGP hardware bus master zone */ 83/* 4GB broken PCI/AGP hardware bus master zone */
85#define MAX_DMA32_PFN ((4UL*1024*1024*1024) >> PAGE_SHIFT) 84#define MAX_DMA32_PFN ((4UL * 1024 * 1024 * 1024) >> PAGE_SHIFT)
86 85
87/* Compat define for old dma zone */ 86/* Compat define for old dma zone */
88#define MAX_DMA_ADDRESS ((unsigned long)__va(MAX_DMA_PFN << PAGE_SHIFT)) 87#define MAX_DMA_ADDRESS ((unsigned long)__va(MAX_DMA_PFN << PAGE_SHIFT))
@@ -154,20 +153,20 @@
154 153
155extern spinlock_t dma_spin_lock; 154extern spinlock_t dma_spin_lock;
156 155
157static __inline__ unsigned long claim_dma_lock(void) 156static inline unsigned long claim_dma_lock(void)
158{ 157{
159 unsigned long flags; 158 unsigned long flags;
160 spin_lock_irqsave(&dma_spin_lock, flags); 159 spin_lock_irqsave(&dma_spin_lock, flags);
161 return flags; 160 return flags;
162} 161}
163 162
164static __inline__ void release_dma_lock(unsigned long flags) 163static inline void release_dma_lock(unsigned long flags)
165{ 164{
166 spin_unlock_irqrestore(&dma_spin_lock, flags); 165 spin_unlock_irqrestore(&dma_spin_lock, flags);
167} 166}
168 167
169/* enable/disable a specific DMA channel */ 168/* enable/disable a specific DMA channel */
170static __inline__ void enable_dma(unsigned int dmanr) 169static inline void enable_dma(unsigned int dmanr)
171{ 170{
172 if (dmanr <= 3) 171 if (dmanr <= 3)
173 dma_outb(dmanr, DMA1_MASK_REG); 172 dma_outb(dmanr, DMA1_MASK_REG);
@@ -175,7 +174,7 @@ static __inline__ void enable_dma(unsigned int dmanr)
175 dma_outb(dmanr & 3, DMA2_MASK_REG); 174 dma_outb(dmanr & 3, DMA2_MASK_REG);
176} 175}
177 176
178static __inline__ void disable_dma(unsigned int dmanr) 177static inline void disable_dma(unsigned int dmanr)
179{ 178{
180 if (dmanr <= 3) 179 if (dmanr <= 3)
181 dma_outb(dmanr | 4, DMA1_MASK_REG); 180 dma_outb(dmanr | 4, DMA1_MASK_REG);
@@ -190,7 +189,7 @@ static __inline__ void disable_dma(unsigned int dmanr)
190 * --- In order to do that, the DMA routines below should --- 189 * --- In order to do that, the DMA routines below should ---
191 * --- only be used while holding the DMA lock ! --- 190 * --- only be used while holding the DMA lock ! ---
192 */ 191 */
193static __inline__ void clear_dma_ff(unsigned int dmanr) 192static inline void clear_dma_ff(unsigned int dmanr)
194{ 193{
195 if (dmanr <= 3) 194 if (dmanr <= 3)
196 dma_outb(0, DMA1_CLEAR_FF_REG); 195 dma_outb(0, DMA1_CLEAR_FF_REG);
@@ -199,7 +198,7 @@ static __inline__ void clear_dma_ff(unsigned int dmanr)
199} 198}
200 199
201/* set mode (above) for a specific DMA channel */ 200/* set mode (above) for a specific DMA channel */
202static __inline__ void set_dma_mode(unsigned int dmanr, char mode) 201static inline void set_dma_mode(unsigned int dmanr, char mode)
203{ 202{
204 if (dmanr <= 3) 203 if (dmanr <= 3)
205 dma_outb(mode | dmanr, DMA1_MODE_REG); 204 dma_outb(mode | dmanr, DMA1_MODE_REG);
@@ -212,7 +211,7 @@ static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
212 * the lower 16 bits of the DMA current address register, but a 64k boundary 211 * the lower 16 bits of the DMA current address register, but a 64k boundary
213 * may have been crossed. 212 * may have been crossed.
214 */ 213 */
215static __inline__ void set_dma_page(unsigned int dmanr, char pagenr) 214static inline void set_dma_page(unsigned int dmanr, char pagenr)
216{ 215{
217 switch (dmanr) { 216 switch (dmanr) {
218 case 0: 217 case 0:
@@ -243,15 +242,15 @@ static __inline__ void set_dma_page(unsigned int dmanr, char pagenr)
243/* Set transfer address & page bits for specific DMA channel. 242/* Set transfer address & page bits for specific DMA channel.
244 * Assumes dma flipflop is clear. 243 * Assumes dma flipflop is clear.
245 */ 244 */
246static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a) 245static inline void set_dma_addr(unsigned int dmanr, unsigned int a)
247{ 246{
248 set_dma_page(dmanr, a>>16); 247 set_dma_page(dmanr, a>>16);
249 if (dmanr <= 3) { 248 if (dmanr <= 3) {
250 dma_outb(a & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE); 249 dma_outb(a & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE);
251 dma_outb((a >> 8) & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE); 250 dma_outb((a >> 8) & 0xff, ((dmanr & 3) << 1) + IO_DMA1_BASE);
252 } else { 251 } else {
253 dma_outb((a >> 1) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE); 252 dma_outb((a >> 1) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
254 dma_outb((a >> 9) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE); 253 dma_outb((a >> 9) & 0xff, ((dmanr & 3) << 2) + IO_DMA2_BASE);
255 } 254 }
256} 255}
257 256
@@ -264,18 +263,18 @@ static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
264 * Assumes dma flip-flop is clear. 263 * Assumes dma flip-flop is clear.
265 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7. 264 * NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
266 */ 265 */
267static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count) 266static inline void set_dma_count(unsigned int dmanr, unsigned int count)
268{ 267{
269 count--; 268 count--;
270 if (dmanr <= 3) { 269 if (dmanr <= 3) {
271 dma_outb(count & 0xff, ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE); 270 dma_outb(count & 0xff, ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
272 dma_outb((count >> 8) & 0xff, 271 dma_outb((count >> 8) & 0xff,
273 ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE); 272 ((dmanr & 3) << 1) + 1 + IO_DMA1_BASE);
274 } else { 273 } else {
275 dma_outb((count >> 1) & 0xff, 274 dma_outb((count >> 1) & 0xff,
276 ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE); 275 ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
277 dma_outb((count >> 9) & 0xff, 276 dma_outb((count >> 9) & 0xff,
278 ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE); 277 ((dmanr & 3) << 2) + 2 + IO_DMA2_BASE);
279 } 278 }
280} 279}
281 280
@@ -288,7 +287,7 @@ static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
288 * 287 *
289 * Assumes DMA flip-flop is clear. 288 * Assumes DMA flip-flop is clear.
290 */ 289 */
291static __inline__ int get_dma_residue(unsigned int dmanr) 290static inline int get_dma_residue(unsigned int dmanr)
292{ 291{
293 unsigned int io_port; 292 unsigned int io_port;
294 /* using short to get 16-bit wrap around */ 293 /* using short to get 16-bit wrap around */