mfd: mc13xxx: Use regmap irq framework for interrupts

This patch convert mc13xxx MFD driver to use regmap irq framework
for interrupt registration.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

5 files changed, 65 insertions, 281 deletions

diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 207c433074af..defe58d65940 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -187,6 +187,7 @@ config MFD_MC13XXX
         tristate
         depends on (SPI_MASTER || I2C)
         select MFD_CORE
+        select REGMAP_IRQ
         help
           Enable support for the Freescale MC13783 and MC13892 PMICs.
           This driver provides common support for accessing the device,
diff --git a/drivers/mfd/mc13xxx-core.c b/drivers/mfd/mc13xxx-core.c
index acf5dd712eb2..2b6bc868cd3d 100644
--- a/drivers/mfd/mc13xxx-core.c
+++ b/drivers/mfd/mc13xxx-core.c
@@ -10,106 +10,18 @@
  * Free Software Foundation.
  */
 
-#include <linux/slab.h>
 #include <linux/module.h>
-#include <linux/platform_device.h>
-#include <linux/mutex.h>
-#include <linux/interrupt.h>
-#include <linux/mfd/core.h>
-#include <linux/mfd/mc13xxx.h>
 #include <linux/of.h>
 #include <linux/of_device.h>
-#include <linux/of_gpio.h>
+#include <linux/platform_device.h>
+#include <linux/mfd/core.h>
 
 #include "mc13xxx.h"
 
 #define MC13XXX_IRQSTAT0        0
-#define MC13XXX_IRQSTAT0_ADCDONEI       (1 << 0)
-#define MC13XXX_IRQSTAT0_ADCBISDONEI    (1 << 1)
-#define MC13XXX_IRQSTAT0_TSI            (1 << 2)
-#define MC13783_IRQSTAT0_WHIGHI         (1 << 3)
-#define MC13783_IRQSTAT0_WLOWI          (1 << 4)
-#define MC13XXX_IRQSTAT0_CHGDETI        (1 << 6)
-#define MC13783_IRQSTAT0_CHGOVI         (1 << 7)
-#define MC13XXX_IRQSTAT0_CHGREVI        (1 << 8)
-#define MC13XXX_IRQSTAT0_CHGSHORTI      (1 << 9)
-#define MC13XXX_IRQSTAT0_CCCVI          (1 << 10)
-#define MC13XXX_IRQSTAT0_CHGCURRI       (1 << 11)
-#define MC13XXX_IRQSTAT0_BPONI          (1 << 12)
-#define MC13XXX_IRQSTAT0_LOBATLI        (1 << 13)
-#define MC13XXX_IRQSTAT0_LOBATHI        (1 << 14)
-#define MC13783_IRQSTAT0_UDPI           (1 << 15)
-#define MC13783_IRQSTAT0_USBI           (1 << 16)
-#define MC13783_IRQSTAT0_IDI            (1 << 19)
-#define MC13783_IRQSTAT0_SE1I           (1 << 21)
-#define MC13783_IRQSTAT0_CKDETI         (1 << 22)
-#define MC13783_IRQSTAT0_UDMI           (1 << 23)
-
 #define MC13XXX_IRQMASK0        1
-#define MC13XXX_IRQMASK0_ADCDONEM       MC13XXX_IRQSTAT0_ADCDONEI
-#define MC13XXX_IRQMASK0_ADCBISDONEM    MC13XXX_IRQSTAT0_ADCBISDONEI
-#define MC13XXX_IRQMASK0_TSM            MC13XXX_IRQSTAT0_TSI
-#define MC13783_IRQMASK0_WHIGHM         MC13783_IRQSTAT0_WHIGHI
-#define MC13783_IRQMASK0_WLOWM          MC13783_IRQSTAT0_WLOWI
-#define MC13XXX_IRQMASK0_CHGDETM        MC13XXX_IRQSTAT0_CHGDETI
-#define MC13783_IRQMASK0_CHGOVM         MC13783_IRQSTAT0_CHGOVI
-#define MC13XXX_IRQMASK0_CHGREVM        MC13XXX_IRQSTAT0_CHGREVI
-#define MC13XXX_IRQMASK0_CHGSHORTM      MC13XXX_IRQSTAT0_CHGSHORTI
-#define MC13XXX_IRQMASK0_CCCVM          MC13XXX_IRQSTAT0_CCCVI
-#define MC13XXX_IRQMASK0_CHGCURRM       MC13XXX_IRQSTAT0_CHGCURRI
-#define MC13XXX_IRQMASK0_BPONM          MC13XXX_IRQSTAT0_BPONI
-#define MC13XXX_IRQMASK0_LOBATLM        MC13XXX_IRQSTAT0_LOBATLI
-#define MC13XXX_IRQMASK0_LOBATHM        MC13XXX_IRQSTAT0_LOBATHI
-#define MC13783_IRQMASK0_UDPM           MC13783_IRQSTAT0_UDPI
-#define MC13783_IRQMASK0_USBM           MC13783_IRQSTAT0_USBI
-#define MC13783_IRQMASK0_IDM            MC13783_IRQSTAT0_IDI
-#define MC13783_IRQMASK0_SE1M           MC13783_IRQSTAT0_SE1I
-#define MC13783_IRQMASK0_CKDETM         MC13783_IRQSTAT0_CKDETI
-#define MC13783_IRQMASK0_UDMM           MC13783_IRQSTAT0_UDMI
-
 #define MC13XXX_IRQSTAT1        3
-#define MC13XXX_IRQSTAT1_1HZI           (1 << 0)
-#define MC13XXX_IRQSTAT1_TODAI          (1 << 1)
-#define MC13783_IRQSTAT1_ONOFD1I        (1 << 3)
-#define MC13783_IRQSTAT1_ONOFD2I        (1 << 4)
-#define MC13783_IRQSTAT1_ONOFD3I        (1 << 5)
-#define MC13XXX_IRQSTAT1_SYSRSTI        (1 << 6)
-#define MC13XXX_IRQSTAT1_RTCRSTI        (1 << 7)
-#define MC13XXX_IRQSTAT1_PCI            (1 << 8)
-#define MC13XXX_IRQSTAT1_WARMI          (1 << 9)
-#define MC13XXX_IRQSTAT1_MEMHLDI        (1 << 10)
-#define MC13783_IRQSTAT1_PWRRDYI        (1 << 11)
-#define MC13XXX_IRQSTAT1_THWARNLI       (1 << 12)
-#define MC13XXX_IRQSTAT1_THWARNHI       (1 << 13)
-#define MC13XXX_IRQSTAT1_CLKI           (1 << 14)
-#define MC13783_IRQSTAT1_SEMAFI         (1 << 15)
-#define MC13783_IRQSTAT1_MC2BI          (1 << 17)
-#define MC13783_IRQSTAT1_HSDETI         (1 << 18)
-#define MC13783_IRQSTAT1_HSLI           (1 << 19)
-#define MC13783_IRQSTAT1_ALSPTHI        (1 << 20)
-#define MC13783_IRQSTAT1_AHSSHORTI      (1 << 21)
-
 #define MC13XXX_IRQMASK1        4
-#define MC13XXX_IRQMASK1_1HZM           MC13XXX_IRQSTAT1_1HZI
-#define MC13XXX_IRQMASK1_TODAM          MC13XXX_IRQSTAT1_TODAI
-#define MC13783_IRQMASK1_ONOFD1M        MC13783_IRQSTAT1_ONOFD1I
-#define MC13783_IRQMASK1_ONOFD2M        MC13783_IRQSTAT1_ONOFD2I
-#define MC13783_IRQMASK1_ONOFD3M        MC13783_IRQSTAT1_ONOFD3I
-#define MC13XXX_IRQMASK1_SYSRSTM        MC13XXX_IRQSTAT1_SYSRSTI
-#define MC13XXX_IRQMASK1_RTCRSTM        MC13XXX_IRQSTAT1_RTCRSTI
-#define MC13XXX_IRQMASK1_PCM            MC13XXX_IRQSTAT1_PCI
-#define MC13XXX_IRQMASK1_WARMM          MC13XXX_IRQSTAT1_WARMI
-#define MC13XXX_IRQMASK1_MEMHLDM        MC13XXX_IRQSTAT1_MEMHLDI
-#define MC13783_IRQMASK1_PWRRDYM        MC13783_IRQSTAT1_PWRRDYI
-#define MC13XXX_IRQMASK1_THWARNLM       MC13XXX_IRQSTAT1_THWARNLI
-#define MC13XXX_IRQMASK1_THWARNHM       MC13XXX_IRQSTAT1_THWARNHI
-#define MC13XXX_IRQMASK1_CLKM           MC13XXX_IRQSTAT1_CLKI
-#define MC13783_IRQMASK1_SEMAFM         MC13783_IRQSTAT1_SEMAFI
-#define MC13783_IRQMASK1_MC2BM          MC13783_IRQSTAT1_MC2BI
-#define MC13783_IRQMASK1_HSDETM         MC13783_IRQSTAT1_HSDETI
-#define MC13783_IRQMASK1_HSLM           MC13783_IRQSTAT1_HSLI
-#define MC13783_IRQMASK1_ALSPTHM        MC13783_IRQSTAT1_ALSPTHI
-#define MC13783_IRQMASK1_AHSSHORTM      MC13783_IRQSTAT1_AHSSHORTI
 
 #define MC13XXX_REVISION        7
 #define MC13XXX_REVISION_REVMETAL       (0x07 <<  0)
@@ -189,45 +101,21 @@ EXPORT_SYMBOL(mc13xxx_reg_rmw);
 
 int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq)
 {
-        int ret;
-        unsigned int offmask = irq < 24 ? MC13XXX_IRQMASK0 : MC13XXX_IRQMASK1;
-        u32 irqbit = 1 << (irq < 24 ? irq : irq - 24);
-        u32 mask;
-
-        if (irq < 0 || irq >= MC13XXX_NUM_IRQ)
-                return -EINVAL;
-
-        ret = mc13xxx_reg_read(mc13xxx, offmask, &mask);
-        if (ret)
-                return ret;
+        int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
 
-        if (mask & irqbit)
-                /* already masked */
-                return 0;
+        disable_irq_nosync(virq);
 
-        return mc13xxx_reg_write(mc13xxx, offmask, mask | irqbit);
+        return 0;
 }
 EXPORT_SYMBOL(mc13xxx_irq_mask);
 
 int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq)
 {
-        int ret;
-        unsigned int offmask = irq < 24 ? MC13XXX_IRQMASK0 : MC13XXX_IRQMASK1;
-        u32 irqbit = 1 << (irq < 24 ? irq : irq - 24);
-        u32 mask;
-
-        if (irq < 0 || irq >= MC13XXX_NUM_IRQ)
-                return -EINVAL;
+        int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq);
 
-        ret = mc13xxx_reg_read(mc13xxx, offmask, &mask);
-        if (ret)
-                return ret;
+        enable_irq(virq);
 
-        if (!(mask & irqbit))
-                /* already unmasked */
-                return 0;
-
-        return mc13xxx_reg_write(mc13xxx, offmask, mask & ~irqbit);
+        return 0;
 }
 EXPORT_SYMBOL(mc13xxx_irq_unmask);