diff options
author | Ben Widawsky <ben@bwidawsk.net> | 2013-04-05 17:29:23 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-04-18 03:43:17 -0400 |
commit | 10e084979411a2f066eac5500615ca617aeaf3c9 (patch) | |
tree | b83535ac61eb9b2b4b2b021a76b5933e89cb4467 | |
parent | 31c77388662de2efe1dd74a3b7e106e633e8a833 (diff) |
drm/i915: Don't default to overclock max
Requested-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 059c77367701..baea4fce5a34 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c | |||
@@ -2643,11 +2643,10 @@ static void gen6_enable_rps(struct drm_device *dev) | |||
2643 | pcu_mbox = 0; | 2643 | pcu_mbox = 0; |
2644 | ret = sandybridge_pcode_read(dev_priv, GEN6_READ_OC_PARAMS, &pcu_mbox); | 2644 | ret = sandybridge_pcode_read(dev_priv, GEN6_READ_OC_PARAMS, &pcu_mbox); |
2645 | if (!ret && (pcu_mbox & (1<<31))) { /* OC supported */ | 2645 | if (!ret && (pcu_mbox & (1<<31))) { /* OC supported */ |
2646 | DRM_DEBUG_DRIVER("overclocking supported, adjusting frequency max from %dMHz to %dMHz\n", | 2646 | DRM_DEBUG_DRIVER("Overclocking supported. Max: %dMHz, Overclock max: %dMHz\n", |
2647 | (dev_priv->rps.max_delay & 0xff) * 50, | 2647 | (dev_priv->rps.max_delay & 0xff) * 50, |
2648 | (pcu_mbox & 0xff) * 50); | 2648 | (pcu_mbox & 0xff) * 50); |
2649 | dev_priv->rps.hw_max = pcu_mbox & 0xff; | 2649 | dev_priv->rps.hw_max = pcu_mbox & 0xff; |
2650 | dev_priv->rps.max_delay = pcu_mbox & 0xff; | ||
2651 | } | 2650 | } |
2652 | } else { | 2651 | } else { |
2653 | DRM_DEBUG_DRIVER("Failed to set the min frequency\n"); | 2652 | DRM_DEBUG_DRIVER("Failed to set the min frequency\n"); |