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authorAntti Palosaari <crope@iki.fi>2013-02-28 17:02:19 -0500
committerMauro Carvalho Chehab <mchehab@redhat.com>2013-03-21 17:59:02 -0400
commit108597979297c75646889e307e276db57aa6d5b8 (patch)
treec3f72fb0d03d07bdb4d6488a065678fb9ab36913
parent44af747f4e0174d5dbc8c565a4d329dbcf599921 (diff)
[media] it913x: remove unused variables
Signed-off-by: Antti Palosaari <crope@iki.fi> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-rw-r--r--drivers/media/tuners/it913x.c14
-rw-r--r--drivers/media/tuners/it913x_priv.h12
2 files changed, 2 insertions, 24 deletions
diff --git a/drivers/media/tuners/it913x.c b/drivers/media/tuners/it913x.c
index 66d4b72d97ab..6ae9d5ae9654 100644
--- a/drivers/media/tuners/it913x.c
+++ b/drivers/media/tuners/it913x.c
@@ -23,25 +23,15 @@
23#include "it913x_priv.h" 23#include "it913x_priv.h"
24 24
25struct it913x_state { 25struct it913x_state {
26 struct dvb_frontend frontend;
27 struct i2c_adapter *i2c_adap; 26 struct i2c_adapter *i2c_adap;
28 u8 chip_ver;
29 u8 firmware_ver;
30 u8 i2c_addr; 27 u8 i2c_addr;
31 u32 frequency; 28 u8 chip_ver;
32 fe_modulation_t constellation;
33 fe_transmit_mode_t transmission_mode;
34 u8 priority;
35 u32 crystalFrequency;
36 u32 adcFrequency;
37 u8 tuner_type; 29 u8 tuner_type;
38 struct adctable *table; 30 u8 firmware_ver;
39 fe_status_t it913x_status;
40 u16 tun_xtal; 31 u16 tun_xtal;
41 u8 tun_fdiv; 32 u8 tun_fdiv;
42 u8 tun_clk_mode; 33 u8 tun_clk_mode;
43 u32 tun_fn_min; 34 u32 tun_fn_min;
44 u32 ucblocks;
45}; 35};
46 36
47/* read multiple registers */ 37/* read multiple registers */
diff --git a/drivers/media/tuners/it913x_priv.h b/drivers/media/tuners/it913x_priv.h
index e4a0136efc3d..315ff6c72c53 100644
--- a/drivers/media/tuners/it913x_priv.h
+++ b/drivers/media/tuners/it913x_priv.h
@@ -34,22 +34,10 @@
34#define IT9135_61 0x61 34#define IT9135_61 0x61
35#define IT9135_62 0x62 35#define IT9135_62 0x62
36 36
37#define I2C_BASE_ADDR 0x10
38#define DEV_0 0x0
39#define DEV_1 0x10
40#define PRO_LINK 0x0 37#define PRO_LINK 0x0
41#define PRO_DMOD 0x1 38#define PRO_DMOD 0x1
42#define DEV_0_DMOD (PRO_DMOD << 0x7)
43#define DEV_1_DMOD (DEV_0_DMOD | DEV_1)
44#define CHIP2_I2C_ADDR 0x3a
45
46#define PADODPU 0xd827
47#define THIRDODPU 0xd828
48#define AGC_O_D 0xd829
49
50#define TRIGGER_OFSM 0x0000 39#define TRIGGER_OFSM 0x0000
51 40
52
53struct it913xset { u32 pro; 41struct it913xset { u32 pro;
54 u32 address; 42 u32 address;
55 u8 reg[15]; 43 u8 reg[15];