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authorRodrigo Vivi <rodrigo.vivi@gmail.com>2013-07-11 17:45:02 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-07-18 04:17:36 -0400
commit105b7c11f036f734988990541674a93e54cf4ec1 (patch)
treefef6aef2e19b7ef28941eae178b44f3770ef47d7
parent3f51e4713fc57ab0fc225c3f0e67578a53c24a11 (diff)
drm/intel: add enable_psr module option and disable psr by default
v2: prefer seq_puts to seq_printf detected by Paulo Zanoni. v3: PSR is disabled by default. Without userspace ready it will cause regression for kde and xdm users Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com> Reviewed-by: Shobhit Kumar <shobhit.kumar@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c3
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c4
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h2
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c6
4 files changed, 15 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 973f2727d703..9d871c7eeaee 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1565,6 +1565,9 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
1565 case PSR_NO_SINK: 1565 case PSR_NO_SINK:
1566 seq_puts(m, "not supported by panel"); 1566 seq_puts(m, "not supported by panel");
1567 break; 1567 break;
1568 case PSR_MODULE_PARAM:
1569 seq_puts(m, "disabled by flag");
1570 break;
1568 case PSR_CRTC_NOT_ACTIVE: 1571 case PSR_CRTC_NOT_ACTIVE:
1569 seq_puts(m, "crtc not active"); 1572 seq_puts(m, "crtc not active");
1570 break; 1573 break;
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 0485f435eeea..b178a7ca1294 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -118,6 +118,10 @@ module_param_named(i915_enable_ppgtt, i915_enable_ppgtt, int, 0600);
118MODULE_PARM_DESC(i915_enable_ppgtt, 118MODULE_PARM_DESC(i915_enable_ppgtt,
119 "Enable PPGTT (default: true)"); 119 "Enable PPGTT (default: true)");
120 120
121int i915_enable_psr __read_mostly = 0;
122module_param_named(enable_psr, i915_enable_psr, int, 0600);
123MODULE_PARM_DESC(enable_psr, "Enable PSR (default: false)");
124
121unsigned int i915_preliminary_hw_support __read_mostly = 0; 125unsigned int i915_preliminary_hw_support __read_mostly = 0;
122module_param_named(preliminary_hw_support, i915_preliminary_hw_support, int, 0600); 126module_param_named(preliminary_hw_support, i915_preliminary_hw_support, int, 0600);
123MODULE_PARM_DESC(preliminary_hw_support, 127MODULE_PARM_DESC(preliminary_hw_support,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 21d55f855d16..36d1c806e092 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -596,6 +596,7 @@ struct i915_fbc {
596enum no_psr_reason { 596enum no_psr_reason {
597 PSR_NO_SOURCE, /* Not supported on platform */ 597 PSR_NO_SOURCE, /* Not supported on platform */
598 PSR_NO_SINK, /* Not supported by panel */ 598 PSR_NO_SINK, /* Not supported by panel */
599 PSR_MODULE_PARAM,
599 PSR_CRTC_NOT_ACTIVE, 600 PSR_CRTC_NOT_ACTIVE,
600 PSR_PWR_WELL_ENABLED, 601 PSR_PWR_WELL_ENABLED,
601 PSR_NOT_TILED, 602 PSR_NOT_TILED,
@@ -1621,6 +1622,7 @@ extern int i915_enable_rc6 __read_mostly;
1621extern int i915_enable_fbc __read_mostly; 1622extern int i915_enable_fbc __read_mostly;
1622extern bool i915_enable_hangcheck __read_mostly; 1623extern bool i915_enable_hangcheck __read_mostly;
1623extern int i915_enable_ppgtt __read_mostly; 1624extern int i915_enable_ppgtt __read_mostly;
1625extern int i915_enable_psr __read_mostly;
1624extern unsigned int i915_preliminary_hw_support __read_mostly; 1626extern unsigned int i915_preliminary_hw_support __read_mostly;
1625extern int i915_disable_power_well __read_mostly; 1627extern int i915_disable_power_well __read_mostly;
1626extern int i915_enable_ips __read_mostly; 1628extern int i915_enable_ips __read_mostly;
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 3ce1b872935e..6a4cdea76274 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1521,6 +1521,12 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
1521 return false; 1521 return false;
1522 } 1522 }
1523 1523
1524 if (!i915_enable_psr) {
1525 DRM_DEBUG_KMS("PSR disable by flag\n");
1526 dev_priv->no_psr_reason = PSR_MODULE_PARAM;
1527 return false;
1528 }
1529
1524 if (!intel_crtc->active || !crtc->fb || !crtc->mode.clock) { 1530 if (!intel_crtc->active || !crtc->fb || !crtc->mode.clock) {
1525 DRM_DEBUG_KMS("crtc not active for PSR\n"); 1531 DRM_DEBUG_KMS("crtc not active for PSR\n");
1526 dev_priv->no_psr_reason = PSR_CRTC_NOT_ACTIVE; 1532 dev_priv->no_psr_reason = PSR_CRTC_NOT_ACTIVE;