Merge tag 'drm-intel-fixes-2014-06-26' of git://anongit.freedesktop.org/drm-intel into drm-fixes

Fixes for 3.16-rc2; regressions, races, and warns; Broadwell PCI IDs.

* tag 'drm-intel-fixes-2014-06-26' of git://anongit.freedesktop.org/drm-intel:
  drm/i915: vlv_prepare_pll is only needed in case of non DSI interfaces
  drm/i915: Hold the table lock whilst walking the file's idr and counting the objects in debugfs
  drm/i915: BDW: Adding Reserved PCI IDs.
  drm/i915: Only mark the ctx as initialised after a SET_CONTEXT operation
  drm/i915: default to having backlight if VBT not available
  drm/i915: cache hw power well enabled state

8 files changed, 46 insertions, 38 deletions

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 601caa88c092..b8c689202c40 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -446,7 +446,9 @@ static int i915_gem_object_info(struct seq_file *m, void* data)
 
                 memset(&stats, 0, sizeof(stats));
                 stats.file_priv = file->driver_priv;
+                spin_lock(&file->table_lock);
                 idr_for_each(&file->object_idr, per_file_stats, &stats);
+                spin_unlock(&file->table_lock);
                 /*
                  * Although we have a valid reference on file->pid, that does
                  * not guarantee that the task_struct who called get_pid() is
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 49414d30e8d4..a47fbf60b781 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -977,6 +977,8 @@ struct i915_power_well {
         bool always_on;
         /* power well enable/disable usage count */
         int count;
+        /* cached hw enabled state */
+        bool hw_enabled;
         unsigned long domains;
         unsigned long data;
         const struct i915_power_well_ops *ops;
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 3ffe308d5893..a5ddf3bce9c3 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -598,6 +598,7 @@ static int do_switch(struct intel_engine_cs *ring,
         struct intel_context *from = ring->last_context;
         struct i915_hw_ppgtt *ppgtt = ctx_to_ppgtt(to);
         u32 hw_flags = 0;
+        bool uninitialized = false;
         int ret, i;
 
         if (from != NULL && ring == &dev_priv->ring[RCS]) {
@@ -696,19 +697,20 @@ static int do_switch(struct intel_engine_cs *ring,
                 i915_gem_context_unreference(from);
         }
 
+        uninitialized = !to->is_initialized && from == NULL;
+        to->is_initialized = true;
+
 done:
         i915_gem_context_reference(to);
         ring->last_context = to;
         to->last_ring = ring;
 
-        if (ring->id == RCS && !to->is_initialized && from == NULL) {
+        if (uninitialized) {
                 ret = i915_gem_render_state_init(ring);
                 if (ret)
                         DRM_ERROR("init render state: %d\n", ret);
         }
 
-        to->is_initialized = true;
-
         return 0;
 
 unpin_out:
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 1ee98f121a00..827498e081df 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -315,9 +315,6 @@ parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
         const struct bdb_lfp_backlight_data *backlight_data;
         const struct bdb_lfp_backlight_data_entry *entry;
 
-        /* Err to enabling backlight if no backlight block. */
-        dev_priv->vbt.backlight.present = true;
-
         backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
         if (!backlight_data)
                 return;
@@ -1088,6 +1085,9 @@ init_vbt_defaults(struct drm_i915_private *dev_priv)
 
         dev_priv->vbt.crt_ddc_pin = GMBUS_PORT_VGADDC;
 
+        /* Default to having backlight */
+        dev_priv->vbt.backlight.present = true;
+
         /* LFP panel data */
         dev_priv->vbt.lvds_dither = 1;
         dev_priv->vbt.lvds_vbt = 0;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index efd3cf50cb0f..5f285fba4e41 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4564,7 +4564,10 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
         if (intel_crtc->active)
                 return;
 
-        vlv_prepare_pll(intel_crtc);
+        is_dsi = intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI);
+
+        if (!is_dsi && !IS_CHERRYVIEW(dev))
+                vlv_prepare_pll(intel_crtc);
 
         /* Set up the display plane register */
         dspcntr = DISPPLANE_GAMMA_ENABLE;
@@ -4598,8 +4601,6 @@ static void valleyview_crtc_enable(struct drm_crtc *crtc)
                 if (encoder->pre_pll_enable)
                         encoder->pre_pll_enable(encoder);
 
-        is_dsi = intel_pipe_has_type(crtc, INTEL_OUTPUT_DSI);
-
         if (!is_dsi) {
                 if (IS_CHERRYVIEW(dev))
                         chv_enable_pll(intel_crtc);
@@ -12411,8 +12412,8 @@ intel_display_capture_error_state(struct drm_device *dev)
 
         for_each_pipe(i) {
                 error->pipe[i].power_domain_on =
-                        intel_display_power_enabled_sw(dev_priv,
-                                                       POWER_DOMAIN_PIPE(i));
+                        intel_display_power_enabled_unlocked(dev_priv,
+                                                           POWER_DOMAIN_PIPE(i));
                 if (!error->pipe[i].power_domain_on)
                         continue;
 
@@ -12447,7 +12448,7 @@ intel_display_capture_error_state(struct drm_device *dev)
                 enum transcoder cpu_transcoder = transcoders[i];
 
                 error->transcoder[i].power_domain_on =
-                        intel_display_power_enabled_sw(dev_priv,
+                        intel_display_power_enabled_unlocked(dev_priv,
                                 POWER_DOMAIN_TRANSCODER(cpu_transcoder));
                 if (!error->transcoder[i].power_domain_on)
                         continue;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index bda0ae3d80cc..eaa27ee9e367 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -950,8 +950,8 @@ int intel_power_domains_init(struct drm_i915_private *);
 void intel_power_domains_remove(struct drm_i915_private *);
 bool intel_display_power_enabled(struct drm_i915_private *dev_priv,
                                  enum intel_display_power_domain domain);
-bool intel_display_power_enabled_sw(struct drm_i915_private *dev_priv,
-                                    enum intel_display_power_domain domain);
+bool intel_display_power_enabled_unlocked(struct drm_i915_private *dev_priv,
+                                          enum intel_display_power_domain domain);
 void intel_display_power_get(struct drm_i915_private *dev_priv,
                              enum intel_display_power_domain domain);
 void intel_display_power_put(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 54242e4f6f4c..9ad0c6afc487 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5603,8 +5603,8 @@ static bool hsw_power_well_enabled(struct drm_i915_private *dev_priv,
                      (HSW_PWR_WELL_ENABLE_REQUEST | HSW_PWR_WELL_STATE_ENABLED);
 }
 
-bool intel_display_power_enabled_sw(struct drm_i915_private *dev_priv,
-                                    enum intel_display_power_domain domain)
+bool intel_display_power_enabled_unlocked(struct drm_i915_private *dev_priv,
+                                          enum intel_display_power_domain domain)
 {
         struct i915_power_domains *power_domains;
         struct i915_power_well *power_well;
@@ -5615,16 +5615,19 @@ bool intel_display_power_enabled_sw(struct drm_i915_private *dev_priv,
                 return false;
 
         power_domains = &dev_priv->power_domains;
+
         is_enabled = true;
+
         for_each_power_well_rev(i, power_well, BIT(domain), power_domains) {
                 if (power_well->always_on)
                         continue;
 
-                if (!power_well->count) {
+                if (!power_well->hw_enabled) {
                         is_enabled = false;
                         break;
                 }
         }
+
         return is_enabled;
 }
 
@@ -5632,30 +5635,15 @@ bool intel_display_power_enabled(struct drm_i915_private *dev_priv,
                                  enum intel_display_power_domain domain)
 {
         struct i915_power_domains *power_domains;
-        struct i915_power_well *power_well;
-        bool is_enabled;
-        int i;
-
-        if (dev_priv->pm.suspended)
-                return false;
+        bool ret;
 
         power_domains = &dev_priv->power_domains;
 
-        is_enabled = true;
-
         mutex_lock(&power_domains->lock);
-        for_each_power_well_rev(i, power_well, BIT(domain), power_domains) {
-                if (power_well->always_on)
-                        continue;
-
-                if (!power_well->ops->is_enabled(dev_priv, power_well)) {
-                        is_enabled = false;
-                        break;
-                }
-        }
+        ret = intel_display_power_enabled_unlocked(dev_priv, domain);
         mutex_unlock(&power_domains->lock);
 
-        return is_enabled;
+        return ret;
 }
 
 /*
@@ -5976,6 +5964,7 @@ void intel_display_power_get(struct drm_i915_private *dev_priv,
                 if (!power_well->count++) {
                         DRM_DEBUG_KMS("enabling %s\n", power_well->name);
                         power_well->ops->enable(dev_priv, power_well);
+                        power_well->hw_enabled = true;
                 }
 
                 check_power_well_state(dev_priv, power_well);
@@ -6005,6 +5994,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
 
                 if (!--power_well->count && i915.disable_power_well) {
                         DRM_DEBUG_KMS("disabling %s\n", power_well->name);
+                        power_well->hw_enabled = false;
                         power_well->ops->disable(dev_priv, power_well);
                 }
 
@@ -6267,8 +6257,11 @@ static void intel_power_domains_resume(struct drm_i915_private *dev_priv)
         int i;
 
         mutex_lock(&power_domains->lock);
-        for_each_power_well(i, power_well, POWER_DOMAIN_MASK, power_domains)
+        for_each_power_well(i, power_well, POWER_DOMAIN_MASK, power_domains) {
                 power_well->ops->sync_hw(dev_priv, power_well);
+                power_well->hw_enabled = power_well->ops->is_enabled(dev_priv,
+                                                                     power_well);
+        }
         mutex_unlock(&power_domains->lock);
 }
 
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 0572035673f3..a70d45647898 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -237,13 +237,21 @@
 #define INTEL_BDW_GT3D_IDS(info) \
         _INTEL_BDW_D_IDS(3, info)
 
+#define INTEL_BDW_RSVDM_IDS(info) \
+        _INTEL_BDW_M_IDS(4, info)
+
+#define INTEL_BDW_RSVDD_IDS(info) \
+        _INTEL_BDW_D_IDS(4, info)
+
 #define INTEL_BDW_M_IDS(info) \
         INTEL_BDW_GT12M_IDS(info), \
-        INTEL_BDW_GT3M_IDS(info)
+        INTEL_BDW_GT3M_IDS(info), \
+        INTEL_BDW_RSVDM_IDS(info)
 
 #define INTEL_BDW_D_IDS(info) \
         INTEL_BDW_GT12D_IDS(info), \
-        INTEL_BDW_GT3D_IDS(info)
+        INTEL_BDW_GT3D_IDS(info), \
+        INTEL_BDW_RSVDD_IDS(info)
 
 #define INTEL_CHV_IDS(info) \
         INTEL_VGA_DEVICE(0x22b0, info), \