diff options
author | Steffen Trumtrar <s.trumtrar@pengutronix.de> | 2014-01-02 13:34:14 -0500 |
---|---|---|
committer | Mike Turquette <mturquette@linaro.org> | 2014-02-18 17:08:12 -0500 |
commit | 0c5a1872ba04dbcf8430d805a8c34e0ee22f1f75 (patch) | |
tree | 7f89f5397131896457715edd53b1321d6db0f64d | |
parent | ef5043c2d91eb5476cf2a810caf3aee37a8b4709 (diff) |
clk: socfpga: fix define typo
It should be SOCFPGA instead of SOCFGPA.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
-rw-r--r-- | drivers/clk/socfpga/clk.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/clk/socfpga/clk.c b/drivers/clk/socfpga/clk.c index eb98c1afa15c..61aa29debdc8 100644 --- a/drivers/clk/socfpga/clk.c +++ b/drivers/clk/socfpga/clk.c | |||
@@ -44,7 +44,7 @@ | |||
44 | #define SOCFPGA_PLL_DIVF_SHIFT 3 | 44 | #define SOCFPGA_PLL_DIVF_SHIFT 3 |
45 | #define SOCFPGA_PLL_DIVQ_MASK 0x003F0000 | 45 | #define SOCFPGA_PLL_DIVQ_MASK 0x003F0000 |
46 | #define SOCFPGA_PLL_DIVQ_SHIFT 16 | 46 | #define SOCFPGA_PLL_DIVQ_SHIFT 16 |
47 | #define SOCFGPA_MAX_PARENTS 3 | 47 | #define SOCFPGA_MAX_PARENTS 3 |
48 | 48 | ||
49 | #define SOCFPGA_L4_MP_CLK "l4_mp_clk" | 49 | #define SOCFPGA_L4_MP_CLK "l4_mp_clk" |
50 | #define SOCFPGA_L4_SP_CLK "l4_sp_clk" | 50 | #define SOCFPGA_L4_SP_CLK "l4_sp_clk" |
@@ -258,7 +258,7 @@ static void __init socfpga_gate_clk_init(struct device_node *node, | |||
258 | struct clk *clk; | 258 | struct clk *clk; |
259 | struct socfpga_clk *socfpga_clk; | 259 | struct socfpga_clk *socfpga_clk; |
260 | const char *clk_name = node->name; | 260 | const char *clk_name = node->name; |
261 | const char *parent_name[SOCFGPA_MAX_PARENTS]; | 261 | const char *parent_name[SOCFPGA_MAX_PARENTS]; |
262 | struct clk_init_data init; | 262 | struct clk_init_data init; |
263 | int rc; | 263 | int rc; |
264 | int i = 0; | 264 | int i = 0; |
@@ -299,7 +299,7 @@ static void __init socfpga_gate_clk_init(struct device_node *node, | |||
299 | init.name = clk_name; | 299 | init.name = clk_name; |
300 | init.ops = ops; | 300 | init.ops = ops; |
301 | init.flags = 0; | 301 | init.flags = 0; |
302 | while (i < SOCFGPA_MAX_PARENTS && (parent_name[i] = | 302 | while (i < SOCFPGA_MAX_PARENTS && (parent_name[i] = |
303 | of_clk_get_parent_name(node, i)) != NULL) | 303 | of_clk_get_parent_name(node, i)) != NULL) |
304 | i++; | 304 | i++; |
305 | 305 | ||