diff options
author | Gregory CLEMENT <gregory.clement@free-electrons.com> | 2014-04-14 09:50:31 -0400 |
---|---|---|
committer | Jason Cooper <jason@lakedaemon.net> | 2014-04-24 01:24:26 -0400 |
commit | 0c3acc746d2cd84c3654b6cc07eda2411584f4af (patch) | |
tree | 2beddcd8e1838d16224c4ca655adebbb3dc56c88 | |
parent | bd045a1ebb48e5901508574188404d9bd3bdd72f (diff) |
ARM: mvebu: extend the PMSU registers
The initial binding for PMSU was wrong, as it didn't take into account
all the registers from the PMSU and moreover it referred to the CPU
reset registers which are not part of PMSU.
The Power Management Unit Service block also controls the Coherency
Fabric subsystem. These registers are needed for the CPU idle
implementation for the Armada 370/XP, it allows to enter a deep CPU
idle state where the Coherency Fabric and the L2 cache are powered
down.
This commit adds support for a new compatible for the PMSU node which
includes the registers related to the coherency fabric. It also keeps
compatibility with the old compatible string.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397483433-25836-5-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Link: https://lkml.kernel.org/r/1397483433-25836-5-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
-rw-r--r-- | Documentation/devicetree/bindings/arm/armada-370-xp-pmsu.txt | 14 | ||||
-rw-r--r-- | arch/arm/mach-mvebu/pmsu.c | 14 |
2 files changed, 18 insertions, 10 deletions
diff --git a/Documentation/devicetree/bindings/arm/armada-370-xp-pmsu.txt b/Documentation/devicetree/bindings/arm/armada-370-xp-pmsu.txt index 926b4d6aae7e..976188770079 100644 --- a/Documentation/devicetree/bindings/arm/armada-370-xp-pmsu.txt +++ b/Documentation/devicetree/bindings/arm/armada-370-xp-pmsu.txt | |||
@@ -4,17 +4,15 @@ Available on Marvell SOCs: Armada 370 and Armada XP | |||
4 | 4 | ||
5 | Required properties: | 5 | Required properties: |
6 | 6 | ||
7 | - compatible: "marvell,armada-370-xp-pmsu" | 7 | - compatible: should be "marvell,armada-370-pmsu", whereas |
8 | "marvell,armada-370-xp-pmsu" is deprecated and will be removed | ||
8 | 9 | ||
9 | - reg: Should contain PMSU registers location and length. First pair | 10 | - reg: Should contain PMSU registers location and length. |
10 | for the per-CPU SW Reset Control registers, second pair for the | ||
11 | Power Management Service Unit. | ||
12 | 11 | ||
13 | Example: | 12 | Example: |
14 | 13 | ||
15 | armada-370-xp-pmsu@d0022000 { | 14 | armada-370-xp-pmsu@22000 { |
16 | compatible = "marvell,armada-370-xp-pmsu"; | 15 | compatible = "marvell,armada-370-pmsu"; |
17 | reg = <0xd0022100 0x430>, | 16 | reg = <0x22000 0x1000>; |
18 | <0xd0020800 0x20>; | ||
19 | }; | 17 | }; |
20 | 18 | ||
diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c index b337fe56bae5..4ae3ea1af7c3 100644 --- a/arch/arm/mach-mvebu/pmsu.c +++ b/arch/arm/mach-mvebu/pmsu.c | |||
@@ -30,10 +30,14 @@ | |||
30 | 30 | ||
31 | static void __iomem *pmsu_mp_base; | 31 | static void __iomem *pmsu_mp_base; |
32 | 32 | ||
33 | #define PMSU_BOOT_ADDR_REDIRECT_OFFSET(cpu) ((cpu * 0x100) + 0x24) | 33 | #define PMSU_BASE_OFFSET 0x100 |
34 | #define PMSU_REG_SIZE 0x1000 | ||
35 | |||
36 | #define PMSU_BOOT_ADDR_REDIRECT_OFFSET(cpu) ((cpu * 0x100) + 0x124) | ||
34 | 37 | ||
35 | static struct of_device_id of_pmsu_table[] = { | 38 | static struct of_device_id of_pmsu_table[] = { |
36 | {.compatible = "marvell,armada-370-xp-pmsu"}, | 39 | { .compatible = "marvell,armada-370-pmsu", }, |
40 | { .compatible = "marvell,armada-370-xp-pmsu", }, | ||
37 | { /* end of list */ }, | 41 | { /* end of list */ }, |
38 | }; | 42 | }; |
39 | 43 | ||
@@ -80,6 +84,12 @@ static int __init armada_370_xp_pmsu_init(void) | |||
80 | goto out; | 84 | goto out; |
81 | } | 85 | } |
82 | 86 | ||
87 | if (of_device_is_compatible(np, "marvell,armada-370-xp-pmsu")) { | ||
88 | pr_warn(FW_WARN "deprecated pmsu binding\n"); | ||
89 | res.start = res.start - PMSU_BASE_OFFSET; | ||
90 | res.end = res.start + PMSU_REG_SIZE - 1; | ||
91 | } | ||
92 | |||
83 | if (!request_mem_region(res.start, resource_size(&res), | 93 | if (!request_mem_region(res.start, resource_size(&res), |
84 | np->full_name)) { | 94 | np->full_name)) { |
85 | pr_err("unable to request region\n"); | 95 | pr_err("unable to request region\n"); |