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authorRussell King <rmk+kernel@arm.linux.org.uk>2013-07-07 06:42:46 -0400
committerRussell King <rmk+kernel@arm.linux.org.uk>2013-08-25 12:11:03 -0400
commit0b4cccbec60678212eccdb42dc1e1c233ddf7092 (patch)
tree6459ff818dec42f9e640bc3a6b4ab149f92b53cd
parent2facbc88733b34e1f992cde054c88b8e07607043 (diff)
ARM: debug: add support for word accesses to debug/8250.S
Add 32-bit word access support to debug/8250.S and convert Picoxcell and SoCFPGA to this. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--arch/arm/Kconfig.debug14
-rw-r--r--arch/arm/include/debug/8250.S24
-rw-r--r--arch/arm/include/debug/8250_32.S27
-rw-r--r--arch/arm/include/debug/picoxcell.S19
-rw-r--r--arch/arm/include/debug/socfpga.S21
5 files changed, 33 insertions, 72 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index f27f8eebded1..09e70090cfdc 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -451,6 +451,7 @@ choice
451 config DEBUG_PICOXCELL_UART 451 config DEBUG_PICOXCELL_UART
452 depends on ARCH_PICOXCELL 452 depends on ARCH_PICOXCELL
453 bool "Use PicoXcell UART for low-level debug" 453 bool "Use PicoXcell UART for low-level debug"
454 select DEBUG_UART_8250
454 help 455 help
455 Say Y here if you want kernel low-level debugging support 456 Say Y here if you want kernel low-level debugging support
456 on PicoXcell based platforms. 457 on PicoXcell based platforms.
@@ -593,6 +594,7 @@ choice
593 config DEBUG_SOCFPGA_UART 594 config DEBUG_SOCFPGA_UART
594 depends on ARCH_SOCFPGA 595 depends on ARCH_SOCFPGA
595 bool "Use SOCFPGA UART for low-level debug" 596 bool "Use SOCFPGA UART for low-level debug"
597 select DEBUG_UART_8250
596 help 598 help
597 Say Y here if you want kernel low-level debugging support 599 Say Y here if you want kernel low-level debugging support
598 on SOCFPGA based platforms. 600 on SOCFPGA based platforms.
@@ -851,9 +853,7 @@ config DEBUG_LL_INCLUDE
851 default "debug/nomadik.S" if DEBUG_NOMADIK_UART 853 default "debug/nomadik.S" if DEBUG_NOMADIK_UART
852 default "debug/nspire.S" if DEBUG_NSPIRE_CX_UART 854 default "debug/nspire.S" if DEBUG_NSPIRE_CX_UART
853 default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART 855 default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART
854 default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
855 default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1 856 default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1
856 default "debug/socfpga.S" if DEBUG_SOCFPGA_UART
857 default "debug/sti.S" if DEBUG_STI_UART 857 default "debug/sti.S" if DEBUG_STI_UART
858 default "debug/tegra.S" if DEBUG_TEGRA_UART 858 default "debug/tegra.S" if DEBUG_TEGRA_UART
859 default "debug/u300.S" if DEBUG_U300_UART 859 default "debug/u300.S" if DEBUG_U300_UART
@@ -886,6 +886,7 @@ config DEBUG_UART_PHYS
886 default 0x40100000 if DEBUG_PXA_UART1 886 default 0x40100000 if DEBUG_PXA_UART1
887 default 0x42000000 if ARCH_GEMINI 887 default 0x42000000 if ARCH_GEMINI
888 default 0x7c0003f8 if FOOTBRIDGE 888 default 0x7c0003f8 if FOOTBRIDGE
889 default 0x80230000 if DEBUG_PICOXCELL_UART
889 default 0x90020000 if DEBUG_NSPIRE_CLASSIC_UART 890 default 0x90020000 if DEBUG_NSPIRE_CLASSIC_UART
890 default 0xc8000000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN 891 default 0xc8000000 if ARCH_IXP4XX && !CPU_BIG_ENDIAN
891 default 0xc8000003 if ARCH_IXP4XX && CPU_BIG_ENDIAN 892 default 0xc8000003 if ARCH_IXP4XX && CPU_BIG_ENDIAN
@@ -897,6 +898,7 @@ config DEBUG_UART_PHYS
897 default 0xf1012000 if ARCH_DOVE || ARCH_KIRKWOOD || ARCH_MV78XX0 || \ 898 default 0xf1012000 if ARCH_DOVE || ARCH_KIRKWOOD || ARCH_MV78XX0 || \
898 ARCH_ORION5X 899 ARCH_ORION5X
899 default 0xfe800000 if ARCH_IOP32X 900 default 0xfe800000 if ARCH_IOP32X
901 default 0xffc02000 if DEBUG_SOCFPGA_UART
900 default 0xffd82340 if ARCH_IOP13XX 902 default 0xffd82340 if ARCH_IOP13XX
901 default 0xfffff700 if ARCH_IOP33X 903 default 0xfffff700 if ARCH_IOP33X
902 depends on DEBUG_UART_8250 904 depends on DEBUG_UART_8250
@@ -915,6 +917,7 @@ config DEBUG_UART_VIRT
915 default 0xfe012000 if ARCH_ORION5X 917 default 0xfe012000 if ARCH_ORION5X
916 default 0xfe017000 if DEBUG_MMP_UART2 918 default 0xfe017000 if DEBUG_MMP_UART2
917 default 0xfe018000 if DEBUG_MMP_UART3 919 default 0xfe018000 if DEBUG_MMP_UART3
920 default 0xfe230000 if DEBUG_PICOXCELL_UART
918 default 0xfe800000 if ARCH_IOP32X 921 default 0xfe800000 if ARCH_IOP32X
919 default 0xfeb24000 if DEBUG_RK3X_UART0 922 default 0xfeb24000 if DEBUG_RK3X_UART0
920 default 0xfeb26000 if DEBUG_RK3X_UART1 923 default 0xfeb26000 if DEBUG_RK3X_UART1
@@ -922,6 +925,7 @@ config DEBUG_UART_VIRT
922 default 0xfed60000 if DEBUG_RK29_UART0 925 default 0xfed60000 if DEBUG_RK29_UART0
923 default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2 926 default 0xfed64000 if DEBUG_RK29_UART1 || DEBUG_RK3X_UART2
924 default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3 927 default 0xfed68000 if DEBUG_RK29_UART2 || DEBUG_RK3X_UART3
928 default 0xfec02000 if DEBUG_SOCFPGA_UART
925 default 0xfed12000 if ARCH_KIRKWOOD 929 default 0xfed12000 if ARCH_KIRKWOOD
926 default 0xfee003f8 if FOOTBRIDGE 930 default 0xfee003f8 if FOOTBRIDGE
927 default 0xfee20000 if DEBUG_NSPIRE_CLASSIC_UART 931 default 0xfee20000 if DEBUG_NSPIRE_CLASSIC_UART
@@ -937,6 +941,12 @@ config DEBUG_UART_8250_SHIFT
937 default 0 if FOOTBRIDGE || ARCH_IOP32X 941 default 0 if FOOTBRIDGE || ARCH_IOP32X
938 default 2 942 default 2
939 943
944config DEBUG_UART_8250_WORD
945 bool "Use 32-bit accesses for 8250 UART"
946 depends on DEBUG_UART_8250
947 depends on DEBUG_UART_8250_SHIFT >= 2
948 default y if DEBUG_PICOXCELL_UART || DEBUG_SOCFPGA_UART
949
940config DEBUG_UART_8250_FLOW_CONTROL 950config DEBUG_UART_8250_FLOW_CONTROL
941 bool "Enable flow control for 8250 UART" 951 bool "Enable flow control for 8250 UART"
942 depends on DEBUG_UART_8250 952 depends on DEBUG_UART_8250
diff --git a/arch/arm/include/debug/8250.S b/arch/arm/include/debug/8250.S
index 92cab395677a..7a2baf913aa0 100644
--- a/arch/arm/include/debug/8250.S
+++ b/arch/arm/include/debug/8250.S
@@ -14,14 +14,32 @@
14 ldr \rv, =CONFIG_DEBUG_UART_VIRT 14 ldr \rv, =CONFIG_DEBUG_UART_VIRT
15 .endm 15 .endm
16 16
17#ifdef CONFIG_DEBUG_UART_8250_WORD
18 .macro store, rd, rx:vararg
19 str \rd, \rx
20 .endm
21
22 .macro load, rd, rx:vararg
23 ldr \rd, \rx
24 .endm
25#else
26 .macro store, rd, rx:vararg
27 strb \rd, \rx
28 .endm
29
30 .macro load, rd, rx:vararg
31 ldrb \rd, \rx
32 .endm
33#endif
34
17#define UART_SHIFT CONFIG_DEBUG_UART_8250_SHIFT 35#define UART_SHIFT CONFIG_DEBUG_UART_8250_SHIFT
18 36
19 .macro senduart,rd,rx 37 .macro senduart,rd,rx
20 strb \rd, [\rx, #UART_TX << UART_SHIFT] 38 store \rd, [\rx, #UART_TX << UART_SHIFT]
21 .endm 39 .endm
22 40
23 .macro busyuart,rd,rx 41 .macro busyuart,rd,rx
241002: ldrb \rd, [\rx, #UART_LSR << UART_SHIFT] 421002: load \rd, [\rx, #UART_LSR << UART_SHIFT]
25 and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE 43 and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
26 teq \rd, #UART_LSR_TEMT | UART_LSR_THRE 44 teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
27 bne 1002b 45 bne 1002b
@@ -29,7 +47,7 @@
29 47
30 .macro waituart,rd,rx 48 .macro waituart,rd,rx
31#ifdef CONFIG_DEBUG_UART_8250_FLOW_CONTROL 49#ifdef CONFIG_DEBUG_UART_8250_FLOW_CONTROL
321001: ldrb \rd, [\rx, #UART_MSR << UART_SHIFT] 501001: load \rd, [\rx, #UART_MSR << UART_SHIFT]
33 tst \rd, #UART_MSR_CTS 51 tst \rd, #UART_MSR_CTS
34 beq 1001b 52 beq 1001b
35#endif 53#endif
diff --git a/arch/arm/include/debug/8250_32.S b/arch/arm/include/debug/8250_32.S
deleted file mode 100644
index 8db01eeabbb4..000000000000
--- a/arch/arm/include/debug/8250_32.S
+++ /dev/null
@@ -1,27 +0,0 @@
1/*
2 * Copyright (c) 2011 Picochip Ltd., Jamie Iles
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Derived from arch/arm/mach-davinci/include/mach/debug-macro.S to use 32-bit
9 * accesses to the 8250.
10 */
11
12#include <linux/serial_reg.h>
13
14 .macro senduart,rd,rx
15 str \rd, [\rx, #UART_TX << UART_SHIFT]
16 .endm
17
18 .macro busyuart,rd,rx
191002: ldr \rd, [\rx, #UART_LSR << UART_SHIFT]
20 and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
21 teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
22 bne 1002b
23 .endm
24
25 /* The UART's don't have any flow control IO's wired up. */
26 .macro waituart,rd,rx
27 .endm
diff --git a/arch/arm/include/debug/picoxcell.S b/arch/arm/include/debug/picoxcell.S
deleted file mode 100644
index bc1f07c49cd4..000000000000
--- a/arch/arm/include/debug/picoxcell.S
+++ /dev/null
@@ -1,19 +0,0 @@
1/*
2 * Copyright (c) 2011 Picochip Ltd., Jamie Iles
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 */
9
10#define UART_SHIFT 2
11#define PICOXCELL_UART1_BASE 0x80230000
12#define PHYS_TO_IO(x) (((x) & 0x00ffffff) | 0xfe000000)
13
14 .macro addruart, rp, rv, tmp
15 ldr \rv, =PHYS_TO_IO(PICOXCELL_UART1_BASE)
16 ldr \rp, =PICOXCELL_UART1_BASE
17 .endm
18
19#include "8250_32.S"
diff --git a/arch/arm/include/debug/socfpga.S b/arch/arm/include/debug/socfpga.S
deleted file mode 100644
index 966b2f994946..000000000000
--- a/arch/arm/include/debug/socfpga.S
+++ /dev/null
@@ -1,21 +0,0 @@
1/*
2 * Copyright (C) 1994-1999 Russell King
3 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#define UART_SHIFT 2
11#define DEBUG_LL_UART_OFFSET 0x00002000
12
13 .macro addruart, rp, rv, tmp
14 mov \rp, #DEBUG_LL_UART_OFFSET
15 orr \rp, \rp, #0x00c00000
16 orr \rv, \rp, #0xfe000000 @ virtual base
17 orr \rp, \rp, #0xff000000 @ physical base
18 .endm
19
20#include "8250_32.S"
21