diff options
| author | Alex Deucher <alexander.deucher@amd.com> | 2014-11-03 11:27:17 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2014-11-06 15:42:45 -0500 |
| commit | 0b021c5802fbe5addf6f89f5030f684adf04f7b7 (patch) | |
| tree | 93ea604c65699747d69750f8e0d748c5787e11d7 | |
| parent | 8efe82ca908400785253c8f0dfcf301e6bd93488 (diff) | |
drm/radeon: use gart for DMA IB tests
Use gart rather than vram to avoid having to deal with
the HDP cache.
Port of adfed2b0587289013f8143c54913ddfd44ac1fd3
(drm/radeon: use gart memory for DMA ring tests)
to the IB tests.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
| -rw-r--r-- | drivers/gpu/drm/radeon/cik_sdma.c | 21 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/r600_dma.c | 20 |
2 files changed, 22 insertions, 19 deletions
diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c index 4e8432d07f15..d748963af08b 100644 --- a/drivers/gpu/drm/radeon/cik_sdma.c +++ b/drivers/gpu/drm/radeon/cik_sdma.c | |||
| @@ -667,17 +667,20 @@ int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
| 667 | { | 667 | { |
| 668 | struct radeon_ib ib; | 668 | struct radeon_ib ib; |
| 669 | unsigned i; | 669 | unsigned i; |
| 670 | unsigned index; | ||
| 670 | int r; | 671 | int r; |
| 671 | void __iomem *ptr = (void *)rdev->vram_scratch.ptr; | ||
| 672 | u32 tmp = 0; | 672 | u32 tmp = 0; |
| 673 | u64 gpu_addr; | ||
| 673 | 674 | ||
| 674 | if (!ptr) { | 675 | if (ring->idx == R600_RING_TYPE_DMA_INDEX) |
| 675 | DRM_ERROR("invalid vram scratch pointer\n"); | 676 | index = R600_WB_DMA_RING_TEST_OFFSET; |
| 676 | return -EINVAL; | 677 | else |
| 677 | } | 678 | index = CAYMAN_WB_DMA1_RING_TEST_OFFSET; |
| 679 | |||
| 680 | gpu_addr = rdev->wb.gpu_addr + index; | ||
| 678 | 681 | ||
| 679 | tmp = 0xCAFEDEAD; | 682 | tmp = 0xCAFEDEAD; |
| 680 | writel(tmp, ptr); | 683 | rdev->wb.wb[index/4] = cpu_to_le32(tmp); |
| 681 | 684 | ||
| 682 | r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); | 685 | r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); |
| 683 | if (r) { | 686 | if (r) { |
| @@ -686,8 +689,8 @@ int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
| 686 | } | 689 | } |
| 687 | 690 | ||
| 688 | ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0); | 691 | ib.ptr[0] = SDMA_PACKET(SDMA_OPCODE_WRITE, SDMA_WRITE_SUB_OPCODE_LINEAR, 0); |
| 689 | ib.ptr[1] = rdev->vram_scratch.gpu_addr & 0xfffffffc; | 692 | ib.ptr[1] = lower_32_bits(gpu_addr); |
| 690 | ib.ptr[2] = upper_32_bits(rdev->vram_scratch.gpu_addr); | 693 | ib.ptr[2] = upper_32_bits(gpu_addr); |
| 691 | ib.ptr[3] = 1; | 694 | ib.ptr[3] = 1; |
| 692 | ib.ptr[4] = 0xDEADBEEF; | 695 | ib.ptr[4] = 0xDEADBEEF; |
| 693 | ib.length_dw = 5; | 696 | ib.length_dw = 5; |
| @@ -704,7 +707,7 @@ int cik_sdma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
| 704 | return r; | 707 | return r; |
| 705 | } | 708 | } |
| 706 | for (i = 0; i < rdev->usec_timeout; i++) { | 709 | for (i = 0; i < rdev->usec_timeout; i++) { |
| 707 | tmp = readl(ptr); | 710 | tmp = le32_to_cpu(rdev->wb.wb[index/4]); |
| 708 | if (tmp == 0xDEADBEEF) | 711 | if (tmp == 0xDEADBEEF) |
| 709 | break; | 712 | break; |
| 710 | DRM_UDELAY(1); | 713 | DRM_UDELAY(1); |
diff --git a/drivers/gpu/drm/radeon/r600_dma.c b/drivers/gpu/drm/radeon/r600_dma.c index aabc343b9a8f..cf0df45d455e 100644 --- a/drivers/gpu/drm/radeon/r600_dma.c +++ b/drivers/gpu/drm/radeon/r600_dma.c | |||
| @@ -338,17 +338,17 @@ int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
| 338 | { | 338 | { |
| 339 | struct radeon_ib ib; | 339 | struct radeon_ib ib; |
| 340 | unsigned i; | 340 | unsigned i; |
| 341 | unsigned index; | ||
| 341 | int r; | 342 | int r; |
| 342 | void __iomem *ptr = (void *)rdev->vram_scratch.ptr; | ||
| 343 | u32 tmp = 0; | 343 | u32 tmp = 0; |
| 344 | u64 gpu_addr; | ||
| 344 | 345 | ||
| 345 | if (!ptr) { | 346 | if (ring->idx == R600_RING_TYPE_DMA_INDEX) |
| 346 | DRM_ERROR("invalid vram scratch pointer\n"); | 347 | index = R600_WB_DMA_RING_TEST_OFFSET; |
| 347 | return -EINVAL; | 348 | else |
| 348 | } | 349 | index = CAYMAN_WB_DMA1_RING_TEST_OFFSET; |
| 349 | 350 | ||
| 350 | tmp = 0xCAFEDEAD; | 351 | gpu_addr = rdev->wb.gpu_addr + index; |
| 351 | writel(tmp, ptr); | ||
| 352 | 352 | ||
| 353 | r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); | 353 | r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256); |
| 354 | if (r) { | 354 | if (r) { |
| @@ -357,8 +357,8 @@ int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
| 357 | } | 357 | } |
| 358 | 358 | ||
| 359 | ib.ptr[0] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 1); | 359 | ib.ptr[0] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 1); |
| 360 | ib.ptr[1] = rdev->vram_scratch.gpu_addr & 0xfffffffc; | 360 | ib.ptr[1] = lower_32_bits(gpu_addr); |
| 361 | ib.ptr[2] = upper_32_bits(rdev->vram_scratch.gpu_addr) & 0xff; | 361 | ib.ptr[2] = upper_32_bits(gpu_addr) & 0xff; |
| 362 | ib.ptr[3] = 0xDEADBEEF; | 362 | ib.ptr[3] = 0xDEADBEEF; |
| 363 | ib.length_dw = 4; | 363 | ib.length_dw = 4; |
| 364 | 364 | ||
| @@ -374,7 +374,7 @@ int r600_dma_ib_test(struct radeon_device *rdev, struct radeon_ring *ring) | |||
| 374 | return r; | 374 | return r; |
| 375 | } | 375 | } |
| 376 | for (i = 0; i < rdev->usec_timeout; i++) { | 376 | for (i = 0; i < rdev->usec_timeout; i++) { |
| 377 | tmp = readl(ptr); | 377 | tmp = le32_to_cpu(rdev->wb.wb[index/4]); |
| 378 | if (tmp == 0xDEADBEEF) | 378 | if (tmp == 0xDEADBEEF) |
| 379 | break; | 379 | break; |
| 380 | DRM_UDELAY(1); | 380 | DRM_UDELAY(1); |
