diff options
author | Ezequiel Garcia <ezequiel.garcia@free-electrons.com> | 2013-08-08 17:03:09 -0400 |
---|---|---|
committer | Jason Cooper <jason@lakedaemon.net> | 2013-08-09 09:17:17 -0400 |
commit | 0af83305254e2725e45242a16003567c79ea55b3 (patch) | |
tree | 1dbc76ddd291421e29d804e85bd9836ba97478ae | |
parent | d10ff4d745fe0388d0d8d3dd0c1003c61f97f257 (diff) |
ARM: mvebu: Relocate PCIe node in Armada 370 RD board
The pcie-controller node needs to be relocated according the MBus
DT binding, since it's now a child of the mbus-compatible node.
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
-rw-r--r-- | arch/arm/boot/dts/armada-370-rd.dts | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/boot/dts/armada-370-rd.dts b/arch/arm/boot/dts/armada-370-rd.dts index 0b3acf378a95..f81810a59629 100644 --- a/arch/arm/boot/dts/armada-370-rd.dts +++ b/arch/arm/boot/dts/armada-370-rd.dts | |||
@@ -31,6 +31,22 @@ | |||
31 | ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 | 31 | ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000 |
32 | MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; | 32 | MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>; |
33 | 33 | ||
34 | pcie-controller { | ||
35 | status = "okay"; | ||
36 | |||
37 | /* Internal mini-PCIe connector */ | ||
38 | pcie@1,0 { | ||
39 | /* Port 0, Lane 0 */ | ||
40 | status = "okay"; | ||
41 | }; | ||
42 | |||
43 | /* Internal mini-PCIe connector */ | ||
44 | pcie@2,0 { | ||
45 | /* Port 1, Lane 0 */ | ||
46 | status = "okay"; | ||
47 | }; | ||
48 | }; | ||
49 | |||
34 | internal-regs { | 50 | internal-regs { |
35 | serial@12000 { | 51 | serial@12000 { |
36 | clock-frequency = <200000000>; | 52 | clock-frequency = <200000000>; |
@@ -88,22 +104,6 @@ | |||
88 | gpios = <&gpio0 6 1>; | 104 | gpios = <&gpio0 6 1>; |
89 | }; | 105 | }; |
90 | }; | 106 | }; |
91 | |||
92 | pcie-controller { | ||
93 | status = "okay"; | ||
94 | |||
95 | /* Internal mini-PCIe connector */ | ||
96 | pcie@1,0 { | ||
97 | /* Port 0, Lane 0 */ | ||
98 | status = "okay"; | ||
99 | }; | ||
100 | |||
101 | /* Internal mini-PCIe connector */ | ||
102 | pcie@2,0 { | ||
103 | /* Port 1, Lane 0 */ | ||
104 | status = "okay"; | ||
105 | }; | ||
106 | }; | ||
107 | }; | 107 | }; |
108 | }; | 108 | }; |
109 | }; | 109 | }; |