diff options
author | Jani Nikula <jani.nikula@intel.com> | 2013-09-27 12:01:01 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2013-10-01 01:28:57 -0400 |
commit | 0aec288130713cf7bcf97c929ac5fab6a8e00e44 (patch) | |
tree | 3fb1b235e3bb502a7dcd6cf9351d12725697c436 | |
parent | 4ddc773b60497dcefbd9824f8931ae297659e6cc (diff) |
drm/dp: constify DP DPCD helpers
None of the DP DPCD helpers need to modify the DPCD.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
-rw-r--r-- | drivers/gpu/drm/drm_dp_helper.c | 16 | ||||
-rw-r--r-- | include/drm/drm_dp_helper.h | 16 |
2 files changed, 16 insertions, 16 deletions
diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index 89e196627160..9e978aae8972 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c | |||
@@ -228,12 +228,12 @@ i2c_dp_aux_add_bus(struct i2c_adapter *adapter) | |||
228 | EXPORT_SYMBOL(i2c_dp_aux_add_bus); | 228 | EXPORT_SYMBOL(i2c_dp_aux_add_bus); |
229 | 229 | ||
230 | /* Helpers for DP link training */ | 230 | /* Helpers for DP link training */ |
231 | static u8 dp_link_status(u8 link_status[DP_LINK_STATUS_SIZE], int r) | 231 | static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r) |
232 | { | 232 | { |
233 | return link_status[r - DP_LANE0_1_STATUS]; | 233 | return link_status[r - DP_LANE0_1_STATUS]; |
234 | } | 234 | } |
235 | 235 | ||
236 | static u8 dp_get_lane_status(u8 link_status[DP_LINK_STATUS_SIZE], | 236 | static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE], |
237 | int lane) | 237 | int lane) |
238 | { | 238 | { |
239 | int i = DP_LANE0_1_STATUS + (lane >> 1); | 239 | int i = DP_LANE0_1_STATUS + (lane >> 1); |
@@ -242,7 +242,7 @@ static u8 dp_get_lane_status(u8 link_status[DP_LINK_STATUS_SIZE], | |||
242 | return (l >> s) & 0xf; | 242 | return (l >> s) & 0xf; |
243 | } | 243 | } |
244 | 244 | ||
245 | bool drm_dp_channel_eq_ok(u8 link_status[DP_LINK_STATUS_SIZE], | 245 | bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE], |
246 | int lane_count) | 246 | int lane_count) |
247 | { | 247 | { |
248 | u8 lane_align; | 248 | u8 lane_align; |
@@ -262,7 +262,7 @@ bool drm_dp_channel_eq_ok(u8 link_status[DP_LINK_STATUS_SIZE], | |||
262 | } | 262 | } |
263 | EXPORT_SYMBOL(drm_dp_channel_eq_ok); | 263 | EXPORT_SYMBOL(drm_dp_channel_eq_ok); |
264 | 264 | ||
265 | bool drm_dp_clock_recovery_ok(u8 link_status[DP_LINK_STATUS_SIZE], | 265 | bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE], |
266 | int lane_count) | 266 | int lane_count) |
267 | { | 267 | { |
268 | int lane; | 268 | int lane; |
@@ -277,7 +277,7 @@ bool drm_dp_clock_recovery_ok(u8 link_status[DP_LINK_STATUS_SIZE], | |||
277 | } | 277 | } |
278 | EXPORT_SYMBOL(drm_dp_clock_recovery_ok); | 278 | EXPORT_SYMBOL(drm_dp_clock_recovery_ok); |
279 | 279 | ||
280 | u8 drm_dp_get_adjust_request_voltage(u8 link_status[DP_LINK_STATUS_SIZE], | 280 | u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE], |
281 | int lane) | 281 | int lane) |
282 | { | 282 | { |
283 | int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1); | 283 | int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1); |
@@ -290,7 +290,7 @@ u8 drm_dp_get_adjust_request_voltage(u8 link_status[DP_LINK_STATUS_SIZE], | |||
290 | } | 290 | } |
291 | EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage); | 291 | EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage); |
292 | 292 | ||
293 | u8 drm_dp_get_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE], | 293 | u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE], |
294 | int lane) | 294 | int lane) |
295 | { | 295 | { |
296 | int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1); | 296 | int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1); |
@@ -303,7 +303,7 @@ u8 drm_dp_get_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE], | |||
303 | } | 303 | } |
304 | EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis); | 304 | EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis); |
305 | 305 | ||
306 | void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]) { | 306 | void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { |
307 | if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0) | 307 | if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0) |
308 | udelay(100); | 308 | udelay(100); |
309 | else | 309 | else |
@@ -311,7 +311,7 @@ void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]) { | |||
311 | } | 311 | } |
312 | EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay); | 312 | EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay); |
313 | 313 | ||
314 | void drm_dp_link_train_channel_eq_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]) { | 314 | void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { |
315 | if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0) | 315 | if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0) |
316 | udelay(400); | 316 | udelay(400); |
317 | else | 317 | else |
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h index 83da4eb1575b..110f4f1f51d7 100644 --- a/include/drm/drm_dp_helper.h +++ b/include/drm/drm_dp_helper.h | |||
@@ -333,20 +333,20 @@ i2c_dp_aux_add_bus(struct i2c_adapter *adapter); | |||
333 | 333 | ||
334 | 334 | ||
335 | #define DP_LINK_STATUS_SIZE 6 | 335 | #define DP_LINK_STATUS_SIZE 6 |
336 | bool drm_dp_channel_eq_ok(u8 link_status[DP_LINK_STATUS_SIZE], | 336 | bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE], |
337 | int lane_count); | 337 | int lane_count); |
338 | bool drm_dp_clock_recovery_ok(u8 link_status[DP_LINK_STATUS_SIZE], | 338 | bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE], |
339 | int lane_count); | 339 | int lane_count); |
340 | u8 drm_dp_get_adjust_request_voltage(u8 link_status[DP_LINK_STATUS_SIZE], | 340 | u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE], |
341 | int lane); | 341 | int lane); |
342 | u8 drm_dp_get_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE], | 342 | u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE], |
343 | int lane); | 343 | int lane); |
344 | 344 | ||
345 | #define DP_RECEIVER_CAP_SIZE 0xf | 345 | #define DP_RECEIVER_CAP_SIZE 0xf |
346 | #define EDP_PSR_RECEIVER_CAP_SIZE 2 | 346 | #define EDP_PSR_RECEIVER_CAP_SIZE 2 |
347 | 347 | ||
348 | void drm_dp_link_train_clock_recovery_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]); | 348 | void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]); |
349 | void drm_dp_link_train_channel_eq_delay(u8 dpcd[DP_RECEIVER_CAP_SIZE]); | 349 | void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]); |
350 | 350 | ||
351 | u8 drm_dp_link_rate_to_bw_code(int link_rate); | 351 | u8 drm_dp_link_rate_to_bw_code(int link_rate); |
352 | int drm_dp_bw_code_to_link_rate(u8 link_bw); | 352 | int drm_dp_bw_code_to_link_rate(u8 link_bw); |
@@ -379,13 +379,13 @@ struct edp_vsc_psr { | |||
379 | #define EDP_VSC_PSR_CRC_VALUES_VALID (1<<2) | 379 | #define EDP_VSC_PSR_CRC_VALUES_VALID (1<<2) |
380 | 380 | ||
381 | static inline int | 381 | static inline int |
382 | drm_dp_max_link_rate(u8 dpcd[DP_RECEIVER_CAP_SIZE]) | 382 | drm_dp_max_link_rate(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) |
383 | { | 383 | { |
384 | return drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]); | 384 | return drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]); |
385 | } | 385 | } |
386 | 386 | ||
387 | static inline u8 | 387 | static inline u8 |
388 | drm_dp_max_lane_count(u8 dpcd[DP_RECEIVER_CAP_SIZE]) | 388 | drm_dp_max_lane_count(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) |
389 | { | 389 | { |
390 | return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; | 390 | return dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; |
391 | } | 391 | } |